/freebsd/sys/contrib/ck/include/ |
H A D | ck_rwcohort.h | 44 #define CK_RWCOHORT_WP_INIT(N, RW, WL) ck_rwcohort_wp_##N##_init(RW, WL) argument 45 #define CK_RWCOHORT_WP_READ_LOCK(N, RW, C, GC, LC) \ argument 47 #define CK_RWCOHORT_WP_READ_UNLOCK(N, RW, C, GC, LC) \ argument 49 #define CK_RWCOHORT_WP_WRITE_LOCK(N, RW, C, GC, LC) \ argument 51 #define CK_RWCOHORT_WP_WRITE_UNLOCK(N, RW, C, GC, LC) \ argument 148 #define CK_RWCOHORT_RP_INIT(N, RW, WL) ck_rwcohort_rp_##N##_init(RW, WL) argument 149 #define CK_RWCOHORT_RP_READ_LOCK(N, RW, C, GC, LC) \ argument 151 #define CK_RWCOHORT_RP_READ_UNLOCK(N, RW, C, GC, LC) \ argument 153 #define CK_RWCOHORT_RP_WRITE_LOCK(N, RW, C, GC, LC) \ argument 155 #define CK_RWCOHORT_RP_WRITE_UNLOCK(N, RW, C, GC, LC) \ argument [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonBitTracker.cpp | 94 uint16_t RW = getRegBitWidth(RegisterRef(Reg, Sub)); in mask() local 281 auto hi = [this] (const BT::RegisterCell &RC, uint16_t RW) in evaluate() 282 -> BT::RegisterCell { in evaluate() 345 uint16_t RW = W0; in evaluate() local 354 uint16_t RW = W0; in evaluate() local 969 uint16_t RW = getRegBitWidth(PD); in evaluate() local
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H A D | HexagonBitSimplify.cpp | 1587 unsigned RW = RC.width(); in findMatch() local 2432 unsigned RW = W; in simplifyExtractLow() local
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/freebsd/usr.bin/bintrans/ |
H A D | uuencode.c | 127 #define RW (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) in main_encode() macro
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/freebsd/contrib/ntp/include/ |
H A D | ntpd.h | 95 #define RW global() macro
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/freebsd/libexec/getty/ |
H A D | gettytab.h | 158 #define RW gettyflags[11].value macro
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/freebsd/sys/dev/rtwn/ |
H A D | if_rtwnreg.h | 113 #define RW(var, field, val) \ macro
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/ |
H A D | EmulateInstructionARM64.h | 147 RW : 1, // Current register width – 0 is AArch64, 1 is AArch32 member
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/freebsd/sys/dev/aic7xxx/aicasm/ |
H A D | aicasm_symbol.h | 67 RW = 0x03 enumerator
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MLRegallocEvictAdvisor.cpp |
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H A D | MLRegAllocEvictAdvisor.cpp | 273 double RW = 0; member 855 double RW = 0.0; in extractFeatures() local
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
H A D | CodeGenSchedule.cpp | 702 CodeGenSchedRW &RW = getSchedRW(MatchDef); in collectSchedRW() local 745 RWVec, [Def](const CodeGenSchedRW &RW) { return RW.TheDef == Def; }); in getSchedRWIdx() 842 auto I = find_if(RWVec, [Seq](CodeGenSchedRW &RW) { in findRWForSequence()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.cpp | 1143 unsigned RW, in buildPrefetch()
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H A D | IRTranslator.cpp | 2575 unsigned RW = cast<ConstantInt>(CI.getOperand(1))->getZExtValue(); in translateKnownIntrinsic() local
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/freebsd/sys/dev/usb/wlan/ |
H A D | if_rsureg.h | 241 #define RW(var, field, val) \ macro
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 3569 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); in EmitBuiltinExpr() local 8625 Value *RW = EmitScalarExpr(E->getArg(1)); in EmitARMBuiltinExpr() local 11591 Value *RW = llvm::ConstantInt::get(Int32Ty, 0); in EmitAArch64BuiltinExpr() local 14422 Value *RW = ConstantInt::get(Int32Ty, (C->getZExtValue() >> 2) & 0x1); in EmitX86BuiltinExpr() local
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