1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #if defined(__FreeBSD__)
5 #define LINUXKPI_PARAM_PREFIX mt7915_
6 #endif
7
8 #include <linux/fs.h>
9 #include "mt7915.h"
10 #include "mcu.h"
11 #include "mac.h"
12 #include "eeprom.h"
13
14 #define fw_name(_dev, name, ...) ({ \
15 char *_fw; \
16 switch (mt76_chip(&(_dev)->mt76)) { \
17 case 0x7915: \
18 _fw = MT7915_##name; \
19 break; \
20 case 0x7981: \
21 _fw = MT7981_##name; \
22 break; \
23 case 0x7986: \
24 _fw = MT7986_##name##__VA_ARGS__; \
25 break; \
26 default: \
27 _fw = MT7916_##name; \
28 break; \
29 } \
30 _fw; \
31 })
32
33 #define fw_name_var(_dev, name) (mt7915_check_adie(dev, false) ? \
34 fw_name(_dev, name) : \
35 fw_name(_dev, name, _MT7975))
36
37 #define MCU_PATCH_ADDRESS 0x200000
38
39 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
40 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
41
42 static bool sr_scene_detect = true;
43 module_param(sr_scene_detect, bool, 0644);
44 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm");
45
46 static u8
mt7915_mcu_get_sta_nss(u16 mcs_map)47 mt7915_mcu_get_sta_nss(u16 mcs_map)
48 {
49 u8 nss;
50
51 for (nss = 8; nss > 0; nss--) {
52 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3;
53
54 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED)
55 break;
56 }
57
58 return nss - 1;
59 }
60
61 static void
mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta * sta,__le16 * he_mcs,u16 mcs_map)62 mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs,
63 u16 mcs_map)
64 {
65 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
66 struct mt7915_dev *dev = msta->vif->phy->dev;
67 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band;
68 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs;
69 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
70
71 for (nss = 0; nss < max_nss; nss++) {
72 int mcs;
73
74 switch ((mcs_map >> (2 * nss)) & 0x3) {
75 case IEEE80211_HE_MCS_SUPPORT_0_11:
76 mcs = GENMASK(11, 0);
77 break;
78 case IEEE80211_HE_MCS_SUPPORT_0_9:
79 mcs = GENMASK(9, 0);
80 break;
81 case IEEE80211_HE_MCS_SUPPORT_0_7:
82 mcs = GENMASK(7, 0);
83 break;
84 default:
85 mcs = 0;
86 }
87
88 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1;
89
90 switch (mcs) {
91 case 0 ... 7:
92 mcs = IEEE80211_HE_MCS_SUPPORT_0_7;
93 break;
94 case 8 ... 9:
95 mcs = IEEE80211_HE_MCS_SUPPORT_0_9;
96 break;
97 case 10 ... 11:
98 mcs = IEEE80211_HE_MCS_SUPPORT_0_11;
99 break;
100 default:
101 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED;
102 break;
103 }
104 mcs_map &= ~(0x3 << (nss * 2));
105 mcs_map |= mcs << (nss * 2);
106
107 /* only support 2ss on 160MHz for mt7915 */
108 if (is_mt7915(&dev->mt76) && nss > 1 &&
109 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
110 break;
111 }
112
113 *he_mcs = cpu_to_le16(mcs_map);
114 }
115
116 static void
mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta * sta,__le16 * vht_mcs,const u16 * mask)117 mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs,
118 const u16 *mask)
119 {
120 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
121 struct mt7915_dev *dev = msta->vif->phy->dev;
122 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
123 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
124 u16 mcs;
125
126 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) {
127 switch (mcs_map & 0x3) {
128 case IEEE80211_VHT_MCS_SUPPORT_0_9:
129 mcs = GENMASK(9, 0);
130 break;
131 case IEEE80211_VHT_MCS_SUPPORT_0_8:
132 mcs = GENMASK(8, 0);
133 break;
134 case IEEE80211_VHT_MCS_SUPPORT_0_7:
135 mcs = GENMASK(7, 0);
136 break;
137 default:
138 mcs = 0;
139 }
140
141 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]);
142
143 /* only support 2ss on 160MHz for mt7915 */
144 if (is_mt7915(&dev->mt76) && nss > 1 &&
145 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
146 break;
147 }
148 }
149
150 static void
mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta * sta,u8 * ht_mcs,const u8 * mask)151 mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs,
152 const u8 *mask)
153 {
154 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
155
156 for (nss = 0; nss < max_nss; nss++)
157 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss];
158 }
159
160 static int
mt7915_mcu_parse_response(struct mt76_dev * mdev,int cmd,struct sk_buff * skb,int seq)161 mt7915_mcu_parse_response(struct mt76_dev *mdev, int cmd,
162 struct sk_buff *skb, int seq)
163 {
164 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
165 struct mt76_connac2_mcu_rxd *rxd;
166 int ret = 0;
167
168 if (!skb) {
169 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",
170 cmd, seq);
171
172 if (!test_and_set_bit(MT76_MCU_RESET, &dev->mphy.state)) {
173 dev->recovery.restart = true;
174 wake_up(&dev->mt76.mcu.wait);
175 queue_work(dev->mt76.wq, &dev->reset_work);
176 wake_up(&dev->reset_wait);
177 }
178
179 return -ETIMEDOUT;
180 }
181
182 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
183 if (seq != rxd->seq &&
184 !(rxd->eid == MCU_CMD_EXT_CID &&
185 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT))
186 return -EAGAIN;
187
188 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) {
189 skb_pull(skb, sizeof(*rxd) - 4);
190 ret = *skb->data;
191 } else if (cmd == MCU_EXT_CMD(THERMAL_CTRL)) {
192 skb_pull(skb, sizeof(*rxd) + 4);
193 ret = le32_to_cpu(*(__le32 *)skb->data);
194 } else {
195 skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd));
196 }
197
198 return ret;
199 }
200
201 static void
mt7915_mcu_set_timeout(struct mt76_dev * mdev,int cmd)202 mt7915_mcu_set_timeout(struct mt76_dev *mdev, int cmd)
203 {
204 mdev->mcu.timeout = 5 * HZ;
205
206 if ((cmd & __MCU_CMD_FIELD_ID) != MCU_CMD_EXT_CID)
207 return;
208
209 switch (FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd)) {
210 case MCU_EXT_CMD_THERMAL_CTRL:
211 case MCU_EXT_CMD_GET_MIB_INFO:
212 case MCU_EXT_CMD_PHY_STAT_INFO:
213 case MCU_EXT_CMD_STA_REC_UPDATE:
214 case MCU_EXT_CMD_BSS_INFO_UPDATE:
215 mdev->mcu.timeout = 2 * HZ;
216 return;
217 case MCU_EXT_CMD_EFUSE_BUFFER_MODE:
218 mdev->mcu.timeout = 10 * HZ;
219 return;
220 default:
221 break;
222 }
223 }
224
225 static int
mt7915_mcu_send_message(struct mt76_dev * mdev,struct sk_buff * skb,int cmd,int * wait_seq)226 mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
227 int cmd, int *wait_seq)
228 {
229 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
230 enum mt76_mcuq_id qid;
231
232 if (cmd == MCU_CMD(FW_SCATTER))
233 qid = MT_MCUQ_FWDL;
234 else if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
235 qid = MT_MCUQ_WA;
236 else
237 qid = MT_MCUQ_WM;
238
239 mt7915_mcu_set_timeout(mdev, cmd);
240
241 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0);
242 }
243
mt7915_mcu_wa_cmd(struct mt7915_dev * dev,int cmd,u32 a1,u32 a2,u32 a3)244 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3)
245 {
246 struct {
247 __le32 args[3];
248 } req = {
249 .args = {
250 cpu_to_le32(a1),
251 cpu_to_le32(a2),
252 cpu_to_le32(a3),
253 },
254 };
255
256 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false);
257 }
258
259 static void
mt7915_mcu_csa_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)260 mt7915_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
261 {
262 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION)
263 return;
264
265 ieee80211_csa_finish(vif, 0);
266 }
267
268 static void
mt7915_mcu_rx_csa_notify(struct mt7915_dev * dev,struct sk_buff * skb)269 mt7915_mcu_rx_csa_notify(struct mt7915_dev *dev, struct sk_buff *skb)
270 {
271 struct mt76_phy *mphy = &dev->mt76.phy;
272 struct mt7915_mcu_csa_notify *c;
273
274 c = (struct mt7915_mcu_csa_notify *)skb->data;
275
276 if (c->band_idx > MT_BAND1)
277 return;
278
279 if ((c->band_idx && !dev->phy.mt76->band_idx) &&
280 dev->mt76.phys[MT_BAND1])
281 mphy = dev->mt76.phys[MT_BAND1];
282
283 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
284 IEEE80211_IFACE_ITER_RESUME_ALL,
285 mt7915_mcu_csa_finish, mphy->hw);
286 }
287
288 static void
mt7915_mcu_rx_thermal_notify(struct mt7915_dev * dev,struct sk_buff * skb)289 mt7915_mcu_rx_thermal_notify(struct mt7915_dev *dev, struct sk_buff *skb)
290 {
291 struct mt76_phy *mphy = &dev->mt76.phy;
292 struct mt7915_mcu_thermal_notify *t;
293 struct mt7915_phy *phy;
294
295 t = (struct mt7915_mcu_thermal_notify *)skb->data;
296 if (t->ctrl.ctrl_id != THERMAL_PROTECT_ENABLE)
297 return;
298
299 if (t->ctrl.band_idx > MT_BAND1)
300 return;
301
302 if ((t->ctrl.band_idx && !dev->phy.mt76->band_idx) &&
303 dev->mt76.phys[MT_BAND1])
304 mphy = dev->mt76.phys[MT_BAND1];
305
306 phy = mphy->priv;
307 phy->throttle_state = t->ctrl.duty.duty_cycle;
308 }
309
310 static void
mt7915_mcu_rx_radar_detected(struct mt7915_dev * dev,struct sk_buff * skb)311 mt7915_mcu_rx_radar_detected(struct mt7915_dev *dev, struct sk_buff *skb)
312 {
313 struct mt76_phy *mphy = &dev->mt76.phy;
314 struct mt7915_mcu_rdd_report *r;
315 u32 sku;
316
317 r = (struct mt7915_mcu_rdd_report *)skb->data;
318
319 switch (r->rdd_idx) {
320 case MT_RDD_IDX_BAND0:
321 break;
322 case MT_RDD_IDX_BAND1:
323 sku = mt7915_check_adie(dev, true);
324 /* the main phy is bound to band 1 for this sku */
325 if (is_mt7986(&dev->mt76) &&
326 (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE))
327 break;
328 mphy = dev->mt76.phys[MT_BAND1];
329 break;
330 case MT_RDD_IDX_BACKGROUND:
331 if (!dev->rdd2_phy)
332 return;
333 mphy = dev->rdd2_phy->mt76;
334 break;
335 default:
336 dev_err(dev->mt76.dev, "Unknown RDD idx %d\n", r->rdd_idx);
337 return;
338 }
339
340 if (!mphy)
341 return;
342
343 if (r->rdd_idx == MT_RDD_IDX_BACKGROUND)
344 cfg80211_background_radar_event(mphy->hw->wiphy,
345 &dev->rdd2_chandef,
346 GFP_ATOMIC);
347 else
348 ieee80211_radar_detected(mphy->hw, NULL);
349 dev->hw_pattern++;
350 }
351
352 static void
mt7915_mcu_rx_log_message(struct mt7915_dev * dev,struct sk_buff * skb)353 mt7915_mcu_rx_log_message(struct mt7915_dev *dev, struct sk_buff *skb)
354 {
355 struct mt76_connac2_mcu_rxd *rxd;
356 int len = skb->len - sizeof(*rxd);
357 const char *data, *type;
358
359 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
360 data = (char *)&rxd[1];
361
362 switch (rxd->s2d_index) {
363 case 0:
364 #if !defined(__FreeBSD__) || defined(CONFIG_MT7915_DEBUGFS)
365 if (mt7915_debugfs_rx_log(dev, data, len))
366 return;
367 #endif
368
369 type = "WM";
370 break;
371 case 2:
372 type = "WA";
373 break;
374 default:
375 type = "unknown";
376 break;
377 }
378
379 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data);
380 }
381
382 static void
mt7915_mcu_cca_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)383 mt7915_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
384 {
385 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION)
386 return;
387
388 ieee80211_color_change_finish(vif, 0);
389 }
390
391 static void
mt7915_mcu_rx_bcc_notify(struct mt7915_dev * dev,struct sk_buff * skb)392 mt7915_mcu_rx_bcc_notify(struct mt7915_dev *dev, struct sk_buff *skb)
393 {
394 struct mt76_phy *mphy = &dev->mt76.phy;
395 struct mt7915_mcu_bcc_notify *b;
396
397 b = (struct mt7915_mcu_bcc_notify *)skb->data;
398
399 if (b->band_idx > MT_BAND1)
400 return;
401
402 if ((b->band_idx && !dev->phy.mt76->band_idx) &&
403 dev->mt76.phys[MT_BAND1])
404 mphy = dev->mt76.phys[MT_BAND1];
405
406 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
407 IEEE80211_IFACE_ITER_RESUME_ALL,
408 mt7915_mcu_cca_finish, mphy->hw);
409 }
410
411 static void
mt7915_mcu_rx_ext_event(struct mt7915_dev * dev,struct sk_buff * skb)412 mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb)
413 {
414 struct mt76_connac2_mcu_rxd *rxd;
415
416 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
417 switch (rxd->ext_eid) {
418 case MCU_EXT_EVENT_THERMAL_PROTECT:
419 mt7915_mcu_rx_thermal_notify(dev, skb);
420 break;
421 case MCU_EXT_EVENT_RDD_REPORT:
422 mt7915_mcu_rx_radar_detected(dev, skb);
423 break;
424 case MCU_EXT_EVENT_CSA_NOTIFY:
425 mt7915_mcu_rx_csa_notify(dev, skb);
426 break;
427 case MCU_EXT_EVENT_FW_LOG_2_HOST:
428 mt7915_mcu_rx_log_message(dev, skb);
429 break;
430 case MCU_EXT_EVENT_BCC_NOTIFY:
431 mt7915_mcu_rx_bcc_notify(dev, skb);
432 break;
433 default:
434 break;
435 }
436 }
437
438 static void
mt7915_mcu_rx_unsolicited_event(struct mt7915_dev * dev,struct sk_buff * skb)439 mt7915_mcu_rx_unsolicited_event(struct mt7915_dev *dev, struct sk_buff *skb)
440 {
441 struct mt76_connac2_mcu_rxd *rxd;
442
443 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
444 switch (rxd->eid) {
445 case MCU_EVENT_EXT:
446 mt7915_mcu_rx_ext_event(dev, skb);
447 break;
448 default:
449 break;
450 }
451 dev_kfree_skb(skb);
452 }
453
mt7915_mcu_rx_event(struct mt7915_dev * dev,struct sk_buff * skb)454 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb)
455 {
456 struct mt76_connac2_mcu_rxd *rxd;
457
458 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
459 if ((rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT ||
460 rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST ||
461 rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP ||
462 rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC ||
463 rxd->ext_eid == MCU_EXT_EVENT_BCC_NOTIFY ||
464 !rxd->seq) &&
465 !(rxd->eid == MCU_CMD_EXT_CID &&
466 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT))
467 mt7915_mcu_rx_unsolicited_event(dev, skb);
468 else
469 mt76_mcu_rx_event(&dev->mt76, skb);
470 }
471
472 static struct tlv *
mt7915_mcu_add_nested_subtlv(struct sk_buff * skb,int sub_tag,int sub_len,__le16 * sub_ntlv,__le16 * len)473 mt7915_mcu_add_nested_subtlv(struct sk_buff *skb, int sub_tag, int sub_len,
474 __le16 *sub_ntlv, __le16 *len)
475 {
476 struct tlv *ptlv, tlv = {
477 .tag = cpu_to_le16(sub_tag),
478 .len = cpu_to_le16(sub_len),
479 };
480
481 ptlv = skb_put_zero(skb, sub_len);
482 memcpy(ptlv, &tlv, sizeof(tlv));
483
484 le16_add_cpu(sub_ntlv, 1);
485 le16_add_cpu(len, sub_len);
486
487 return ptlv;
488 }
489
490 /** bss info **/
491 struct mt7915_he_obss_narrow_bw_ru_data {
492 bool tolerated;
493 };
494
mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy * wiphy,struct cfg80211_bss * bss,void * _data)495 static void mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy *wiphy,
496 struct cfg80211_bss *bss,
497 void *_data)
498 {
499 struct mt7915_he_obss_narrow_bw_ru_data *data = _data;
500 const struct element *elem;
501
502 rcu_read_lock();
503 elem = ieee80211_bss_get_elem(bss, WLAN_EID_EXT_CAPABILITY);
504
505 if (!elem || elem->datalen <= 10 ||
506 !(elem->data[10] &
507 WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT))
508 data->tolerated = false;
509
510 rcu_read_unlock();
511 }
512
mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw * hw,struct ieee80211_vif * vif)513 static bool mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw *hw,
514 struct ieee80211_vif *vif)
515 {
516 struct mt7915_he_obss_narrow_bw_ru_data iter_data = {
517 .tolerated = true,
518 };
519
520 if (!(vif->bss_conf.chanreq.oper.chan->flags & IEEE80211_CHAN_RADAR))
521 return false;
522
523 cfg80211_bss_iter(hw->wiphy, &vif->bss_conf.chanreq.oper,
524 mt7915_check_he_obss_narrow_bw_ru_iter,
525 &iter_data);
526
527 /*
528 * If there is at least one AP on radar channel that cannot
529 * tolerate 26-tone RU UL OFDMA transmissions using HE TB PPDU.
530 */
531 return !iter_data.tolerated;
532 }
533
534 static void
mt7915_mcu_bss_rfch_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)535 mt7915_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
536 struct mt7915_phy *phy)
537 {
538 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
539 struct bss_info_rf_ch *ch;
540 struct tlv *tlv;
541 int freq1 = chandef->center_freq1;
542
543 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RF_CH, sizeof(*ch));
544
545 ch = (struct bss_info_rf_ch *)tlv;
546 ch->pri_ch = chandef->chan->hw_value;
547 ch->center_ch0 = ieee80211_frequency_to_channel(freq1);
548 ch->bw = mt76_connac_chan_bw(chandef);
549
550 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
551 int freq2 = chandef->center_freq2;
552
553 ch->center_ch1 = ieee80211_frequency_to_channel(freq2);
554 }
555
556 if (vif->bss_conf.he_support && vif->type == NL80211_IFTYPE_STATION) {
557 struct mt76_phy *mphy = phy->mt76;
558
559 ch->he_ru26_block =
560 mt7915_check_he_obss_narrow_bw_ru(mphy->hw, vif);
561 ch->he_all_disable = false;
562 } else {
563 ch->he_all_disable = true;
564 }
565 }
566
567 static void
mt7915_mcu_bss_ra_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)568 mt7915_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
569 struct mt7915_phy *phy)
570 {
571 int max_nss = hweight8(phy->mt76->antenna_mask);
572 struct bss_info_ra *ra;
573 struct tlv *tlv;
574
575 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RA, sizeof(*ra));
576
577 ra = (struct bss_info_ra *)tlv;
578 ra->op_mode = vif->type == NL80211_IFTYPE_AP;
579 ra->adhoc_en = vif->type == NL80211_IFTYPE_ADHOC;
580 ra->short_preamble = true;
581 ra->tx_streams = max_nss;
582 ra->rx_streams = max_nss;
583 ra->algo = 4;
584 ra->train_up_rule = 2;
585 ra->train_up_high_thres = 110;
586 ra->train_up_rule_rssi = -70;
587 ra->low_traffic_thres = 2;
588 ra->phy_cap = cpu_to_le32(0xfdf);
589 ra->interval = cpu_to_le32(500);
590 ra->fast_interval = cpu_to_le32(100);
591 }
592
593 static void
mt7915_mcu_bss_he_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)594 mt7915_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
595 struct mt7915_phy *phy)
596 {
597 #define DEFAULT_HE_PE_DURATION 4
598 #define DEFAULT_HE_DURATION_RTS_THRES 1023
599 const struct ieee80211_sta_he_cap *cap;
600 struct bss_info_he *he;
601 struct tlv *tlv;
602
603 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif);
604
605 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HE_BASIC, sizeof(*he));
606
607 he = (struct bss_info_he *)tlv;
608 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
609 if (!he->he_pe_duration)
610 he->he_pe_duration = DEFAULT_HE_PE_DURATION;
611
612 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
613 if (!he->he_rts_thres)
614 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
615
616 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
617 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
618 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
619 }
620
621 static void
mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff * skb)622 mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff *skb)
623 {
624 #define TXD_CMP_MAP1 GENMASK(15, 0)
625 #define TXD_CMP_MAP2 (GENMASK(31, 0) & ~BIT(23))
626 struct bss_info_hw_amsdu *amsdu;
627 struct tlv *tlv;
628
629 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HW_AMSDU, sizeof(*amsdu));
630
631 amsdu = (struct bss_info_hw_amsdu *)tlv;
632 amsdu->cmp_bitmap_0 = cpu_to_le32(TXD_CMP_MAP1);
633 amsdu->cmp_bitmap_1 = cpu_to_le32(TXD_CMP_MAP2);
634 amsdu->trig_thres = cpu_to_le16(2);
635 amsdu->enable = true;
636 }
637
638 static void
mt7915_mcu_bss_bmc_tlv(struct sk_buff * skb,struct mt7915_phy * phy)639 mt7915_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt7915_phy *phy)
640 {
641 struct bss_info_bmc_rate *bmc;
642 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
643 enum nl80211_band band = chandef->chan->band;
644 struct tlv *tlv;
645
646 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BMC_RATE, sizeof(*bmc));
647
648 bmc = (struct bss_info_bmc_rate *)tlv;
649 if (band == NL80211_BAND_2GHZ) {
650 bmc->short_preamble = true;
651 } else {
652 bmc->bc_trans = cpu_to_le16(0x2000);
653 bmc->mc_trans = cpu_to_le16(0x2080);
654 }
655 }
656
657 static int
mt7915_mcu_muar_config(struct mt7915_phy * phy,struct ieee80211_vif * vif,bool bssid,bool enable)658 mt7915_mcu_muar_config(struct mt7915_phy *phy, struct ieee80211_vif *vif,
659 bool bssid, bool enable)
660 {
661 struct mt7915_dev *dev = phy->dev;
662 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
663 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START;
664 u32 mask = phy->omac_mask >> 32 & ~BIT(idx);
665 const u8 *addr = vif->addr;
666 struct {
667 u8 mode;
668 u8 force_clear;
669 u8 clear_bitmap[8];
670 u8 entry_count;
671 u8 write;
672 u8 band;
673
674 u8 index;
675 u8 bssid;
676 u8 addr[ETH_ALEN];
677 } __packed req = {
678 .mode = !!mask || enable,
679 .entry_count = 1,
680 .write = 1,
681 .band = phy->mt76->band_idx,
682 .index = idx * 2 + bssid,
683 };
684
685 if (bssid)
686 addr = vif->bss_conf.bssid;
687
688 if (enable)
689 ether_addr_copy(req.addr, addr);
690
691 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MUAR_UPDATE), &req,
692 sizeof(req), true);
693 }
694
mt7915_mcu_add_bss_info(struct mt7915_phy * phy,struct ieee80211_vif * vif,int enable)695 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
696 struct ieee80211_vif *vif, int enable)
697 {
698 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
699 struct mt7915_dev *dev = phy->dev;
700 struct sk_buff *skb;
701
702 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) {
703 mt7915_mcu_muar_config(phy, vif, false, enable);
704 mt7915_mcu_muar_config(phy, vif, true, enable);
705 }
706
707 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL,
708 MT7915_BSS_UPDATE_MAX_SIZE);
709 if (IS_ERR(skb))
710 return PTR_ERR(skb);
711
712 /* bss_omac must be first */
713 if (enable)
714 mt76_connac_mcu_bss_omac_tlv(skb, vif);
715
716 mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,
717 mvif->sta.wcid.idx, enable);
718
719 if (vif->type == NL80211_IFTYPE_MONITOR)
720 goto out;
721
722 if (enable) {
723 mt7915_mcu_bss_rfch_tlv(skb, vif, phy);
724 mt7915_mcu_bss_bmc_tlv(skb, phy);
725 mt7915_mcu_bss_ra_tlv(skb, vif, phy);
726 mt7915_mcu_bss_hw_amsdu_tlv(skb);
727
728 if (vif->bss_conf.he_support)
729 mt7915_mcu_bss_he_tlv(skb, vif, phy);
730
731 if (mvif->mt76.omac_idx >= EXT_BSSID_START &&
732 mvif->mt76.omac_idx < REPEATER_BSSID_START)
733 mt76_connac_mcu_bss_ext_tlv(skb, &mvif->mt76);
734 }
735 out:
736 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
737 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
738 }
739
740 /** starec & wtbl **/
mt7915_mcu_add_tx_ba(struct mt7915_dev * dev,struct ieee80211_ampdu_params * params,bool enable)741 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
742 struct ieee80211_ampdu_params *params,
743 bool enable)
744 {
745 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv;
746 struct mt7915_vif *mvif = msta->vif;
747 int ret;
748
749 mt76_worker_disable(&dev->mt76.tx_worker);
750 if (enable && !params->amsdu)
751 msta->wcid.amsdu = false;
752 ret = mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
753 MCU_EXT_CMD(STA_REC_UPDATE),
754 enable, true);
755 mt76_worker_enable(&dev->mt76.tx_worker);
756
757 return ret;
758 }
759
mt7915_mcu_add_rx_ba(struct mt7915_dev * dev,struct ieee80211_ampdu_params * params,bool enable)760 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
761 struct ieee80211_ampdu_params *params,
762 bool enable)
763 {
764 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv;
765 struct mt7915_vif *mvif = msta->vif;
766
767 return mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
768 MCU_EXT_CMD(STA_REC_UPDATE),
769 enable, false);
770 }
771
772 static void
mt7915_mcu_sta_he_tlv(struct sk_buff * skb,struct ieee80211_sta * sta,struct ieee80211_vif * vif)773 mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
774 struct ieee80211_vif *vif)
775 {
776 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
777 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
778 struct ieee80211_he_mcs_nss_supp mcs_map;
779 struct sta_rec_he *he;
780 struct tlv *tlv;
781 u32 cap = 0;
782
783 if (!sta->deflink.he_cap.has_he)
784 return;
785
786 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he));
787
788 he = (struct sta_rec_he *)tlv;
789
790 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE)
791 cap |= STA_REC_HE_CAP_HTC;
792
793 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR)
794 cap |= STA_REC_HE_CAP_BSR;
795
796 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL)
797 cap |= STA_REC_HE_CAP_OM;
798
799 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU)
800 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU;
801
802 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR)
803 cap |= STA_REC_HE_CAP_BQR;
804
805 if (elem->phy_cap_info[0] &
806 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G |
807 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G))
808 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT;
809
810 if (mvif->cap.he_ldpc &&
811 (elem->phy_cap_info[1] &
812 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD))
813 cap |= STA_REC_HE_CAP_LDPC;
814
815 if (elem->phy_cap_info[1] &
816 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US)
817 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI;
818
819 if (elem->phy_cap_info[2] &
820 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US)
821 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI;
822
823 if (elem->phy_cap_info[2] &
824 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ)
825 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC;
826
827 if (elem->phy_cap_info[2] &
828 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ)
829 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC;
830
831 if (elem->phy_cap_info[6] &
832 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB)
833 cap |= STA_REC_HE_CAP_TRIG_CQI_FK;
834
835 if (elem->phy_cap_info[6] &
836 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE)
837 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE;
838
839 if (elem->phy_cap_info[7] &
840 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI)
841 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI;
842
843 if (elem->phy_cap_info[7] &
844 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ)
845 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC;
846
847 if (elem->phy_cap_info[7] &
848 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ)
849 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC;
850
851 if (elem->phy_cap_info[8] &
852 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI)
853 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI;
854
855 if (elem->phy_cap_info[8] &
856 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI)
857 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI;
858
859 if (elem->phy_cap_info[9] &
860 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU)
861 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242;
862
863 if (elem->phy_cap_info[9] &
864 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU)
865 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242;
866
867 he->he_cap = cpu_to_le32(cap);
868
869 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp;
870 switch (sta->deflink.bandwidth) {
871 case IEEE80211_STA_RX_BW_160:
872 if (elem->phy_cap_info[0] &
873 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
874 mt7915_mcu_set_sta_he_mcs(sta,
875 &he->max_nss_mcs[CMD_HE_MCS_BW8080],
876 le16_to_cpu(mcs_map.rx_mcs_80p80));
877
878 mt7915_mcu_set_sta_he_mcs(sta,
879 &he->max_nss_mcs[CMD_HE_MCS_BW160],
880 le16_to_cpu(mcs_map.rx_mcs_160));
881 fallthrough;
882 default:
883 mt7915_mcu_set_sta_he_mcs(sta,
884 &he->max_nss_mcs[CMD_HE_MCS_BW80],
885 le16_to_cpu(mcs_map.rx_mcs_80));
886 break;
887 }
888
889 he->t_frame_dur =
890 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
891 he->max_ampdu_exp =
892 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]);
893
894 he->bw_set =
895 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]);
896 he->device_class =
897 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]);
898 he->punc_pream_rx =
899 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
900
901 he->dcm_tx_mode =
902 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]);
903 he->dcm_tx_max_nss =
904 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]);
905 he->dcm_rx_mode =
906 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]);
907 he->dcm_rx_max_nss =
908 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]);
909 he->dcm_rx_max_nss =
910 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]);
911
912 he->pkt_ext = 2;
913 }
914
915 static void
mt7915_mcu_sta_muru_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_sta * sta,struct ieee80211_vif * vif)916 mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
917 struct ieee80211_sta *sta, struct ieee80211_vif *vif)
918 {
919 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
920 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
921 struct sta_rec_muru *muru;
922 struct tlv *tlv;
923
924 if (vif->type != NL80211_IFTYPE_STATION &&
925 vif->type != NL80211_IFTYPE_AP)
926 return;
927
928 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));
929
930 muru = (struct sta_rec_muru *)tlv;
931
932 muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer ||
933 mvif->cap.vht_mu_ebfer ||
934 mvif->cap.vht_mu_ebfee;
935 if (!is_mt7915(&dev->mt76))
936 muru->cfg.mimo_ul_en = true;
937 muru->cfg.ofdma_dl_en = true;
938
939 if (sta->deflink.vht_cap.vht_supported)
940 muru->mimo_dl.vht_mu_bfee =
941 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
942
943 if (!sta->deflink.he_cap.has_he)
944 return;
945
946 muru->mimo_dl.partial_bw_dl_mimo =
947 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);
948
949 muru->mimo_ul.full_ul_mimo =
950 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);
951 muru->mimo_ul.partial_ul_mimo =
952 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);
953
954 muru->ofdma_dl.punc_pream_rx =
955 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
956 muru->ofdma_dl.he_20m_in_40m_2g =
957 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);
958 muru->ofdma_dl.he_20m_in_160m =
959 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
960 muru->ofdma_dl.he_80m_in_160m =
961 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
962
963 muru->ofdma_ul.t_frame_dur =
964 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
965 muru->ofdma_ul.mu_cascading =
966 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);
967 muru->ofdma_ul.uo_ra =
968 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);
969 muru->ofdma_ul.rx_ctrl_frame_to_mbss =
970 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]);
971 }
972
973 static void
mt7915_mcu_sta_ht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)974 mt7915_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
975 {
976 struct sta_rec_ht *ht;
977 struct tlv *tlv;
978
979 if (!sta->deflink.ht_cap.ht_supported)
980 return;
981
982 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
983
984 ht = (struct sta_rec_ht *)tlv;
985 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
986 }
987
988 static void
mt7915_mcu_sta_vht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)989 mt7915_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
990 {
991 struct sta_rec_vht *vht;
992 struct tlv *tlv;
993
994 if (!sta->deflink.vht_cap.vht_supported)
995 return;
996
997 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht));
998
999 vht = (struct sta_rec_vht *)tlv;
1000 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
1001 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
1002 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
1003 }
1004
1005 static void
mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1006 mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1007 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1008 {
1009 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1010 struct sta_rec_amsdu *amsdu;
1011 struct tlv *tlv;
1012
1013 if (vif->type != NL80211_IFTYPE_STATION &&
1014 vif->type != NL80211_IFTYPE_AP)
1015 return;
1016
1017 if (!sta->deflink.agg.max_amsdu_len)
1018 return;
1019
1020 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
1021 amsdu = (struct sta_rec_amsdu *)tlv;
1022 amsdu->max_amsdu_num = 8;
1023 amsdu->amsdu_en = true;
1024 msta->wcid.amsdu = true;
1025
1026 switch (sta->deflink.agg.max_amsdu_len) {
1027 case IEEE80211_MAX_MPDU_LEN_VHT_11454:
1028 if (!is_mt7915(&dev->mt76)) {
1029 amsdu->max_mpdu_size =
1030 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
1031 return;
1032 }
1033 fallthrough;
1034 case IEEE80211_MAX_MPDU_LEN_HT_7935:
1035 case IEEE80211_MAX_MPDU_LEN_VHT_7991:
1036 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
1037 return;
1038 default:
1039 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
1040 return;
1041 }
1042 }
1043
1044 static int
mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1045 mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1046 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1047 {
1048 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1049 struct mt7915_sta *msta;
1050 struct wtbl_req_hdr *wtbl_hdr;
1051 struct mt76_wcid *wcid;
1052 struct tlv *tlv;
1053
1054 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1055 wcid = sta ? &msta->wcid : NULL;
1056
1057 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv));
1058 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
1059 WTBL_RESET_AND_SET, tlv,
1060 &skb);
1061 if (IS_ERR(wtbl_hdr))
1062 return PTR_ERR(wtbl_hdr);
1063
1064 mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, skb, vif, sta, tlv,
1065 wtbl_hdr);
1066 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, tlv, wtbl_hdr);
1067 if (sta)
1068 mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, skb, sta, tlv,
1069 wtbl_hdr, mvif->cap.ht_ldpc,
1070 mvif->cap.vht_ldpc);
1071
1072 return 0;
1073 }
1074
1075 static inline bool
mt7915_is_ebf_supported(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool bfee)1076 mt7915_is_ebf_supported(struct mt7915_phy *phy, struct ieee80211_vif *vif,
1077 struct ieee80211_sta *sta, bool bfee)
1078 {
1079 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1080 int sts = hweight16(phy->mt76->chainmask);
1081
1082 if (vif->type != NL80211_IFTYPE_STATION &&
1083 vif->type != NL80211_IFTYPE_AP)
1084 return false;
1085
1086 if (!bfee && sts < 2)
1087 return false;
1088
1089 if (sta->deflink.he_cap.has_he) {
1090 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1091
1092 if (bfee)
1093 return mvif->cap.he_su_ebfee &&
1094 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]);
1095 else
1096 return mvif->cap.he_su_ebfer &&
1097 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]);
1098 }
1099
1100 if (sta->deflink.vht_cap.vht_supported) {
1101 u32 cap = sta->deflink.vht_cap.cap;
1102
1103 if (bfee)
1104 return mvif->cap.vht_su_ebfee &&
1105 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
1106 else
1107 return mvif->cap.vht_su_ebfer &&
1108 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);
1109 }
1110
1111 return false;
1112 }
1113
1114 static void
mt7915_mcu_sta_sounding_rate(struct sta_rec_bf * bf)1115 mt7915_mcu_sta_sounding_rate(struct sta_rec_bf *bf)
1116 {
1117 bf->sounding_phy = MT_PHY_TYPE_OFDM;
1118 bf->ndp_rate = 0; /* mcs0 */
1119 bf->ndpa_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */
1120 bf->rept_poll_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */
1121 }
1122
1123 static void
mt7915_mcu_sta_bfer_ht(struct ieee80211_sta * sta,struct mt7915_phy * phy,struct sta_rec_bf * bf)1124 mt7915_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7915_phy *phy,
1125 struct sta_rec_bf *bf)
1126 {
1127 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs;
1128 u8 n = 0;
1129
1130 bf->tx_mode = MT_PHY_TYPE_HT;
1131
1132 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) &&
1133 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED))
1134 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK,
1135 mcs->tx_params);
1136 else if (mcs->rx_mask[3])
1137 n = 3;
1138 else if (mcs->rx_mask[2])
1139 n = 2;
1140 else if (mcs->rx_mask[1])
1141 n = 1;
1142
1143 bf->nrow = hweight8(phy->mt76->chainmask) - 1;
1144 bf->ncol = min_t(u8, bf->nrow, n);
1145 bf->ibf_ncol = n;
1146 }
1147
1148 static void
mt7915_mcu_sta_bfer_vht(struct ieee80211_sta * sta,struct mt7915_phy * phy,struct sta_rec_bf * bf,bool explicit)1149 mt7915_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7915_phy *phy,
1150 struct sta_rec_bf *bf, bool explicit)
1151 {
1152 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1153 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap;
1154 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map);
1155 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1156 u8 tx_ant = hweight8(phy->mt76->chainmask) - 1;
1157
1158 bf->tx_mode = MT_PHY_TYPE_VHT;
1159
1160 if (explicit) {
1161 u8 sts, snd_dim;
1162
1163 mt7915_mcu_sta_sounding_rate(bf);
1164
1165 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,
1166 pc->cap);
1167 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1168 vc->cap);
1169 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant);
1170 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1171 bf->ibf_ncol = bf->ncol;
1172
1173 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1174 bf->nrow = 1;
1175 } else {
1176 bf->nrow = tx_ant;
1177 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1178 bf->ibf_ncol = nss_mcs;
1179
1180 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1181 bf->ibf_nrow = 1;
1182 }
1183 }
1184
1185 static void
mt7915_mcu_sta_bfer_he(struct ieee80211_sta * sta,struct ieee80211_vif * vif,struct mt7915_phy * phy,struct sta_rec_bf * bf)1186 mt7915_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1187 struct mt7915_phy *phy, struct sta_rec_bf *bf)
1188 {
1189 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap;
1190 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem;
1191 const struct ieee80211_sta_he_cap *vc =
1192 mt76_connac_get_he_phy_cap(phy->mt76, vif);
1193 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem;
1194 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80);
1195 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1196 u8 snd_dim, sts;
1197
1198 bf->tx_mode = MT_PHY_TYPE_HE_SU;
1199
1200 mt7915_mcu_sta_sounding_rate(bf);
1201
1202 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB,
1203 pe->phy_cap_info[6]);
1204 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB,
1205 pe->phy_cap_info[6]);
1206 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1207 ve->phy_cap_info[5]);
1208 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK,
1209 pe->phy_cap_info[4]);
1210 bf->nrow = min_t(u8, snd_dim, sts);
1211 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1212 bf->ibf_ncol = bf->ncol;
1213
1214 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160)
1215 return;
1216
1217 /* go over for 160MHz and 80p80 */
1218 if (pe->phy_cap_info[0] &
1219 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) {
1220 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160);
1221 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1222
1223 bf->ncol_gt_bw80 = nss_mcs;
1224 }
1225
1226 if (pe->phy_cap_info[0] &
1227 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) {
1228 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80);
1229 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1230
1231 if (bf->ncol_gt_bw80)
1232 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs);
1233 else
1234 bf->ncol_gt_bw80 = nss_mcs;
1235 }
1236
1237 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
1238 ve->phy_cap_info[5]);
1239 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK,
1240 pe->phy_cap_info[4]);
1241
1242 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts);
1243 }
1244
1245 static void
mt7915_mcu_sta_bfer_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1246 mt7915_mcu_sta_bfer_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1247 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1248 {
1249 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1250 struct mt7915_phy *phy = mvif->phy;
1251 int tx_ant = hweight8(phy->mt76->chainmask) - 1;
1252 struct sta_rec_bf *bf;
1253 struct tlv *tlv;
1254 static const u8 matrix[4][4] = {
1255 {0, 0, 0, 0},
1256 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */
1257 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */
1258 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */
1259 };
1260 bool ebf;
1261
1262 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))
1263 return;
1264
1265 ebf = mt7915_is_ebf_supported(phy, vif, sta, false);
1266 if (!ebf && !dev->ibf)
1267 return;
1268
1269 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf));
1270 bf = (struct sta_rec_bf *)tlv;
1271
1272 /* he: eBF only, in accordance with spec
1273 * vht: support eBF and iBF
1274 * ht: iBF only, since mac80211 lacks of eBF support
1275 */
1276 if (sta->deflink.he_cap.has_he && ebf)
1277 mt7915_mcu_sta_bfer_he(sta, vif, phy, bf);
1278 else if (sta->deflink.vht_cap.vht_supported)
1279 mt7915_mcu_sta_bfer_vht(sta, phy, bf, ebf);
1280 else if (sta->deflink.ht_cap.ht_supported)
1281 mt7915_mcu_sta_bfer_ht(sta, phy, bf);
1282 else
1283 return;
1284
1285 bf->bf_cap = ebf ? ebf : dev->ibf << 1;
1286 bf->bw = sta->deflink.bandwidth;
1287 bf->ibf_dbw = sta->deflink.bandwidth;
1288 bf->ibf_nrow = tx_ant;
1289
1290 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol)
1291 bf->ibf_timeout = 0x48;
1292 else
1293 bf->ibf_timeout = 0x18;
1294
1295 if (ebf && bf->nrow != tx_ant)
1296 bf->mem_20m = matrix[tx_ant][bf->ncol];
1297 else
1298 bf->mem_20m = matrix[bf->nrow][bf->ncol];
1299
1300 switch (sta->deflink.bandwidth) {
1301 case IEEE80211_STA_RX_BW_160:
1302 case IEEE80211_STA_RX_BW_80:
1303 bf->mem_total = bf->mem_20m * 2;
1304 break;
1305 case IEEE80211_STA_RX_BW_40:
1306 bf->mem_total = bf->mem_20m;
1307 break;
1308 case IEEE80211_STA_RX_BW_20:
1309 default:
1310 break;
1311 }
1312 }
1313
1314 static void
mt7915_mcu_sta_bfee_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1315 mt7915_mcu_sta_bfee_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1316 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1317 {
1318 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1319 struct mt7915_phy *phy = mvif->phy;
1320 int tx_ant = hweight8(phy->mt76->chainmask) - 1;
1321 struct sta_rec_bfee *bfee;
1322 struct tlv *tlv;
1323 u8 nrow = 0;
1324
1325 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he))
1326 return;
1327
1328 if (!mt7915_is_ebf_supported(phy, vif, sta, true))
1329 return;
1330
1331 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee));
1332 bfee = (struct sta_rec_bfee *)tlv;
1333
1334 if (sta->deflink.he_cap.has_he) {
1335 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1336
1337 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1338 pe->phy_cap_info[5]);
1339 } else if (sta->deflink.vht_cap.vht_supported) {
1340 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1341
1342 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1343 pc->cap);
1344 }
1345
1346 /* reply with identity matrix to avoid 2x2 BF negative gain */
1347 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2);
1348 }
1349
1350 static enum mcu_mmps_mode
mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)1351 mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)
1352 {
1353 switch (smps) {
1354 case IEEE80211_SMPS_OFF:
1355 return MCU_MMPS_DISABLE;
1356 case IEEE80211_SMPS_STATIC:
1357 return MCU_MMPS_STATIC;
1358 case IEEE80211_SMPS_DYNAMIC:
1359 return MCU_MMPS_DYNAMIC;
1360 default:
1361 return MCU_MMPS_DISABLE;
1362 }
1363 }
1364
mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,void * data,u32 field)1365 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
1366 struct ieee80211_vif *vif,
1367 struct ieee80211_sta *sta,
1368 void *data, u32 field)
1369 {
1370 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1371 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1372 struct sta_phy *phy = data;
1373 struct sta_rec_ra_fixed *ra;
1374 struct sk_buff *skb;
1375 struct tlv *tlv;
1376
1377 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1378 &msta->wcid);
1379 if (IS_ERR(skb))
1380 return PTR_ERR(skb);
1381
1382 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra));
1383 ra = (struct sta_rec_ra_fixed *)tlv;
1384
1385 switch (field) {
1386 case RATE_PARAM_AUTO:
1387 break;
1388 case RATE_PARAM_FIXED:
1389 case RATE_PARAM_FIXED_MCS:
1390 case RATE_PARAM_FIXED_GI:
1391 case RATE_PARAM_FIXED_HE_LTF:
1392 if (phy)
1393 ra->phy = *phy;
1394 break;
1395 case RATE_PARAM_MMPS_UPDATE:
1396 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode);
1397 break;
1398 case RATE_PARAM_SPE_UPDATE:
1399 ra->spe_idx = *(u8 *)data;
1400 break;
1401 default:
1402 break;
1403 }
1404 ra->field = cpu_to_le32(field);
1405
1406 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1407 MCU_EXT_CMD(STA_REC_UPDATE), true);
1408 }
1409
mt7915_mcu_add_smps(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1410 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1411 struct ieee80211_sta *sta)
1412 {
1413 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1414 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1415 struct wtbl_req_hdr *wtbl_hdr;
1416 struct tlv *sta_wtbl;
1417 struct sk_buff *skb;
1418 int ret;
1419
1420 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1421 &msta->wcid);
1422 if (IS_ERR(skb))
1423 return PTR_ERR(skb);
1424
1425 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1426 sizeof(struct tlv));
1427 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
1428 WTBL_SET, sta_wtbl, &skb);
1429 if (IS_ERR(wtbl_hdr))
1430 return PTR_ERR(wtbl_hdr);
1431
1432 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_hdr);
1433
1434 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1435 MCU_EXT_CMD(STA_REC_UPDATE), true);
1436 if (ret)
1437 return ret;
1438
1439 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, NULL,
1440 RATE_PARAM_MMPS_UPDATE);
1441 }
1442
1443 static int
mt7915_mcu_set_spe_idx(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1444 mt7915_mcu_set_spe_idx(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1445 struct ieee80211_sta *sta)
1446 {
1447 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1448 struct mt76_phy *mphy = mvif->phy->mt76;
1449 u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask);
1450
1451 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &spe_idx,
1452 RATE_PARAM_SPE_UPDATE);
1453 }
1454
1455 static int
mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1456 mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev *dev,
1457 struct ieee80211_vif *vif,
1458 struct ieee80211_sta *sta)
1459 {
1460 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1461 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
1462 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1463 enum nl80211_band band = chandef->chan->band;
1464 struct sta_phy phy = {};
1465 int ret, nrates = 0;
1466
1467 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \
1468 do { \
1469 u8 i, gi = mask->control[band]._gi; \
1470 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \
1471 for (i = 0; i <= sta->deflink.bandwidth; i++) { \
1472 phy.sgi |= gi << (i << (_he)); \
1473 phy.he_ltf |= mask->control[band].he_ltf << (i << (_he));\
1474 } \
1475 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \
1476 if (!mask->control[band]._mcs[i]) \
1477 continue; \
1478 nrates += hweight16(mask->control[band]._mcs[i]); \
1479 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \
1480 if (_ht) \
1481 phy.mcs += 8 * i; \
1482 } \
1483 } while (0)
1484
1485 if (sta->deflink.he_cap.has_he) {
1486 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1);
1487 } else if (sta->deflink.vht_cap.vht_supported) {
1488 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0);
1489 } else if (sta->deflink.ht_cap.ht_supported) {
1490 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0);
1491 } else {
1492 nrates = hweight32(mask->control[band].legacy);
1493 phy.mcs = ffs(mask->control[band].legacy) - 1;
1494 }
1495 #undef __sta_phy_bitrate_mask_check
1496
1497 /* fall back to auto rate control */
1498 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI &&
1499 mask->control[band].he_gi == GENMASK(7, 0) &&
1500 mask->control[band].he_ltf == GENMASK(7, 0) &&
1501 nrates != 1)
1502 return 0;
1503
1504 /* fixed single rate */
1505 if (nrates == 1) {
1506 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1507 RATE_PARAM_FIXED_MCS);
1508 if (ret)
1509 return ret;
1510 }
1511
1512 /* fixed GI */
1513 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI ||
1514 mask->control[band].he_gi != GENMASK(7, 0)) {
1515 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1516 u32 addr;
1517
1518 /* firmware updates only TXCMD but doesn't take WTBL into
1519 * account, so driver should update here to reflect the
1520 * actual txrate hardware sends out.
1521 */
1522 addr = mt7915_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7);
1523 if (sta->deflink.he_cap.has_he)
1524 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi);
1525 else
1526 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi);
1527
1528 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1529 RATE_PARAM_FIXED_GI);
1530 if (ret)
1531 return ret;
1532 }
1533
1534 /* fixed HE_LTF */
1535 if (mask->control[band].he_ltf != GENMASK(7, 0)) {
1536 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1537 RATE_PARAM_FIXED_HE_LTF);
1538 if (ret)
1539 return ret;
1540 }
1541
1542 return mt7915_mcu_set_spe_idx(dev, vif, sta);
1543 }
1544
1545 static void
mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff * skb,struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1546 mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev,
1547 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1548 {
1549 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1550 struct mt76_phy *mphy = mvif->phy->mt76;
1551 struct cfg80211_chan_def *chandef = &mphy->chandef;
1552 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1553 enum nl80211_band band = chandef->chan->band;
1554 struct sta_rec_ra *ra;
1555 struct tlv *tlv;
1556 u32 supp_rate = sta->deflink.supp_rates[band];
1557 u32 cap = sta->wme ? STA_CAP_WMM : 0;
1558
1559 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra));
1560 ra = (struct sta_rec_ra *)tlv;
1561
1562 ra->valid = true;
1563 ra->auto_rate = true;
1564 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink);
1565 ra->channel = chandef->chan->hw_value;
1566 ra->bw = sta->deflink.bandwidth;
1567 ra->phy.bw = sta->deflink.bandwidth;
1568 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode);
1569
1570 if (supp_rate) {
1571 supp_rate &= mask->control[band].legacy;
1572 ra->rate_len = hweight32(supp_rate);
1573
1574 if (band == NL80211_BAND_2GHZ) {
1575 ra->supp_mode = MODE_CCK;
1576 ra->supp_cck_rate = supp_rate & GENMASK(3, 0);
1577
1578 if (ra->rate_len > 4) {
1579 ra->supp_mode |= MODE_OFDM;
1580 ra->supp_ofdm_rate = supp_rate >> 4;
1581 }
1582 } else {
1583 ra->supp_mode = MODE_OFDM;
1584 ra->supp_ofdm_rate = supp_rate;
1585 }
1586 }
1587
1588 if (sta->deflink.ht_cap.ht_supported) {
1589 ra->supp_mode |= MODE_HT;
1590 ra->af = sta->deflink.ht_cap.ampdu_factor;
1591 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD);
1592
1593 cap |= STA_CAP_HT;
1594 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
1595 cap |= STA_CAP_SGI_20;
1596 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
1597 cap |= STA_CAP_SGI_40;
1598 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC)
1599 cap |= STA_CAP_TX_STBC;
1600 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1601 cap |= STA_CAP_RX_STBC;
1602 if (mvif->cap.ht_ldpc &&
1603 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING))
1604 cap |= STA_CAP_LDPC;
1605
1606 mt7915_mcu_set_sta_ht_mcs(sta, ra->ht_mcs,
1607 mask->control[band].ht_mcs);
1608 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs;
1609 }
1610
1611 if (sta->deflink.vht_cap.vht_supported) {
1612 u8 af;
1613
1614 ra->supp_mode |= MODE_VHT;
1615 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
1616 sta->deflink.vht_cap.cap);
1617 ra->af = max_t(u8, ra->af, af);
1618
1619 cap |= STA_CAP_VHT;
1620 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
1621 cap |= STA_CAP_VHT_SGI_80;
1622 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
1623 cap |= STA_CAP_VHT_SGI_160;
1624 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC)
1625 cap |= STA_CAP_VHT_TX_STBC;
1626 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1)
1627 cap |= STA_CAP_VHT_RX_STBC;
1628 if (mvif->cap.vht_ldpc &&
1629 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC))
1630 cap |= STA_CAP_VHT_LDPC;
1631
1632 mt7915_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs,
1633 mask->control[band].vht_mcs);
1634 }
1635
1636 if (sta->deflink.he_cap.has_he) {
1637 ra->supp_mode |= MODE_HE;
1638 cap |= STA_CAP_HE;
1639
1640 if (sta->deflink.he_6ghz_capa.capa)
1641 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
1642 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
1643 }
1644
1645 ra->sta_cap = cpu_to_le32(cap);
1646 }
1647
mt7915_mcu_add_rate_ctrl(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool changed)1648 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1649 struct ieee80211_sta *sta, bool changed)
1650 {
1651 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1652 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1653 struct sk_buff *skb;
1654 int ret;
1655
1656 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1657 &msta->wcid);
1658 if (IS_ERR(skb))
1659 return PTR_ERR(skb);
1660
1661 /* firmware rc algorithm refers to sta_rec_he for HE control.
1662 * once dev->rc_work changes the settings driver should also
1663 * update sta_rec_he here.
1664 */
1665 if (changed)
1666 mt7915_mcu_sta_he_tlv(skb, sta, vif);
1667
1668 /* sta_rec_ra accommodates BW, NSS and only MCS range format
1669 * i.e 0-{7,8,9} for VHT.
1670 */
1671 mt7915_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta);
1672
1673 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1674 MCU_EXT_CMD(STA_REC_UPDATE), true);
1675 if (ret)
1676 return ret;
1677
1678 /* sta_rec_ra_fixed accommodates single rate, (HE)GI and HE_LTE,
1679 * and updates as peer fixed rate parameters, which overrides
1680 * sta_rec_ra and firmware rate control algorithm.
1681 */
1682 return mt7915_mcu_add_rate_ctrl_fixed(dev, vif, sta);
1683 }
1684
1685 static int
mt7915_mcu_add_group(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1686 mt7915_mcu_add_group(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1687 struct ieee80211_sta *sta)
1688 {
1689 #define MT_STA_BSS_GROUP 1
1690 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1691 struct mt7915_sta *msta;
1692 struct {
1693 __le32 action;
1694 u8 wlan_idx_lo;
1695 u8 status;
1696 u8 wlan_idx_hi;
1697 u8 rsv0[5];
1698 __le32 val;
1699 u8 rsv1[8];
1700 } __packed req = {
1701 .action = cpu_to_le32(MT_STA_BSS_GROUP),
1702 .val = cpu_to_le32(mvif->mt76.idx % 16),
1703 };
1704
1705 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1706 req.wlan_idx_lo = to_wcid_lo(msta->wcid.idx);
1707 req.wlan_idx_hi = to_wcid_hi(msta->wcid.idx);
1708
1709 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_DRR_CTRL), &req,
1710 sizeof(req), true);
1711 }
1712
mt7915_mcu_add_sta(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,int conn_state,bool newly)1713 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1714 struct ieee80211_sta *sta, int conn_state, bool newly)
1715 {
1716 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1717 struct ieee80211_link_sta *link_sta;
1718 struct mt7915_sta *msta;
1719 struct sk_buff *skb;
1720 int ret;
1721
1722 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1723 link_sta = sta ? &sta->deflink : NULL;
1724
1725 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1726 &msta->wcid);
1727 if (IS_ERR(skb))
1728 return PTR_ERR(skb);
1729
1730 /* starec basic */
1731 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, &vif->bss_conf, link_sta,
1732 conn_state, newly);
1733 /* tag order is in accordance with firmware dependency. */
1734 if (sta && conn_state != CONN_STATE_DISCONNECT) {
1735 /* starec bfer */
1736 mt7915_mcu_sta_bfer_tlv(dev, skb, vif, sta);
1737 /* starec ht */
1738 mt7915_mcu_sta_ht_tlv(skb, sta);
1739 /* starec vht */
1740 mt7915_mcu_sta_vht_tlv(skb, sta);
1741 /* starec uapsd */
1742 mt76_connac_mcu_sta_uapsd(skb, vif, sta);
1743 }
1744
1745 if (newly || conn_state != CONN_STATE_DISCONNECT) {
1746 ret = mt7915_mcu_sta_wtbl_tlv(dev, skb, vif, sta);
1747 if (ret) {
1748 dev_kfree_skb(skb);
1749 return ret;
1750 }
1751 }
1752
1753 if (conn_state == CONN_STATE_DISCONNECT)
1754 goto out;
1755
1756 if (sta) {
1757 /* starec amsdu */
1758 mt7915_mcu_sta_amsdu_tlv(dev, skb, vif, sta);
1759 /* starec he */
1760 mt7915_mcu_sta_he_tlv(skb, sta, vif);
1761 /* starec muru */
1762 mt7915_mcu_sta_muru_tlv(dev, skb, sta, vif);
1763 /* starec bfee */
1764 mt7915_mcu_sta_bfee_tlv(dev, skb, vif, sta);
1765 }
1766
1767 ret = mt7915_mcu_add_group(dev, vif, sta);
1768 if (ret) {
1769 dev_kfree_skb(skb);
1770 return ret;
1771 }
1772 out:
1773 ret = mt76_connac_mcu_sta_wed_update(&dev->mt76, skb);
1774 if (ret)
1775 return ret;
1776
1777 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1778 MCU_EXT_CMD(STA_REC_UPDATE), true);
1779 }
1780
mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev * dev)1781 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev)
1782 {
1783 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
1784 struct mtk_wed_device *wed = &dev->mt76.mmio.wed;
1785 struct {
1786 __le32 args[2];
1787 } req = {
1788 .args[0] = cpu_to_le32(1),
1789 .args[1] = cpu_to_le32(6),
1790 };
1791
1792 return mtk_wed_device_update_msg(wed, MTK_WED_WO_CMD_RXCNT_CTRL,
1793 &req, sizeof(req));
1794 #else
1795 return 0;
1796 #endif
1797 }
1798
mt7915_mcu_add_dev_info(struct mt7915_phy * phy,struct ieee80211_vif * vif,bool enable)1799 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,
1800 struct ieee80211_vif *vif, bool enable)
1801 {
1802 struct mt7915_dev *dev = phy->dev;
1803 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1804 struct {
1805 struct req_hdr {
1806 u8 omac_idx;
1807 u8 band_idx;
1808 __le16 tlv_num;
1809 u8 is_tlv_append;
1810 u8 rsv[3];
1811 } __packed hdr;
1812 struct req_tlv {
1813 __le16 tag;
1814 __le16 len;
1815 u8 active;
1816 u8 band_idx;
1817 u8 omac_addr[ETH_ALEN];
1818 } __packed tlv;
1819 } data = {
1820 .hdr = {
1821 .omac_idx = mvif->mt76.omac_idx,
1822 .band_idx = mvif->mt76.band_idx,
1823 .tlv_num = cpu_to_le16(1),
1824 .is_tlv_append = 1,
1825 },
1826 .tlv = {
1827 .tag = cpu_to_le16(DEV_INFO_ACTIVE),
1828 .len = cpu_to_le16(sizeof(struct req_tlv)),
1829 .active = enable,
1830 .band_idx = mvif->mt76.band_idx,
1831 },
1832 };
1833
1834 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START)
1835 return mt7915_mcu_muar_config(phy, vif, false, enable);
1836
1837 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN);
1838 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(DEV_INFO_UPDATE),
1839 &data, sizeof(data), true);
1840 }
1841
1842 static void
mt7915_mcu_beacon_cntdwn(struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1843 mt7915_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb,
1844 struct sk_buff *skb, struct bss_info_bcn *bcn,
1845 struct ieee80211_mutable_offsets *offs)
1846 {
1847 struct bss_info_bcn_cntdwn *info;
1848 struct tlv *tlv;
1849 int sub_tag;
1850
1851 if (!offs->cntdwn_counter_offs[0])
1852 return;
1853
1854 sub_tag = vif->bss_conf.csa_active ? BSS_INFO_BCN_CSA : BSS_INFO_BCN_BCC;
1855 tlv = mt7915_mcu_add_nested_subtlv(rskb, sub_tag, sizeof(*info),
1856 &bcn->sub_ntlv, &bcn->len);
1857 info = (struct bss_info_bcn_cntdwn *)tlv;
1858 info->cnt = skb->data[offs->cntdwn_counter_offs[0]];
1859 }
1860
1861 static void
mt7915_mcu_beacon_mbss(struct sk_buff * rskb,struct sk_buff * skb,struct ieee80211_vif * vif,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1862 mt7915_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb,
1863 struct ieee80211_vif *vif, struct bss_info_bcn *bcn,
1864 struct ieee80211_mutable_offsets *offs)
1865 {
1866 struct bss_info_bcn_mbss *mbss;
1867 const struct element *elem;
1868 struct tlv *tlv;
1869
1870 if (!vif->bss_conf.bssid_indicator)
1871 return;
1872
1873 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_MBSSID,
1874 sizeof(*mbss), &bcn->sub_ntlv,
1875 &bcn->len);
1876
1877 mbss = (struct bss_info_bcn_mbss *)tlv;
1878 mbss->offset[0] = cpu_to_le16(offs->tim_offset);
1879 mbss->bitmap = cpu_to_le32(1);
1880
1881 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID,
1882 &skb->data[offs->mbssid_off],
1883 skb->len - offs->mbssid_off) {
1884 const struct element *sub_elem;
1885
1886 if (elem->datalen < 2)
1887 continue;
1888
1889 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) {
1890 const struct ieee80211_bssid_index *idx;
1891 const u8 *idx_ie;
1892
1893 if (sub_elem->id || sub_elem->datalen < 4)
1894 continue; /* not a valid BSS profile */
1895
1896 /* Find WLAN_EID_MULTI_BSSID_IDX
1897 * in the merged nontransmitted profile
1898 */
1899 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX,
1900 sub_elem->data,
1901 sub_elem->datalen);
1902 if (!idx_ie || idx_ie[1] < sizeof(*idx))
1903 continue;
1904
1905 #if defined(__linux__)
1906 idx = (void *)(idx_ie + 2);
1907 #elif defined(__FreeBSD__)
1908 idx = (const void *)(idx_ie + 2);
1909 #endif
1910 if (!idx->bssid_index || idx->bssid_index > 31)
1911 continue;
1912
1913 mbss->offset[idx->bssid_index] =
1914 cpu_to_le16(idx_ie - skb->data);
1915 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index));
1916 }
1917 }
1918 }
1919
1920 static void
mt7915_mcu_beacon_cont(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1921 mt7915_mcu_beacon_cont(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1922 struct sk_buff *rskb, struct sk_buff *skb,
1923 struct bss_info_bcn *bcn,
1924 struct ieee80211_mutable_offsets *offs)
1925 {
1926 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
1927 struct bss_info_bcn_cont *cont;
1928 struct tlv *tlv;
1929 u8 *buf;
1930 int len = sizeof(*cont) + MT_TXD_SIZE + skb->len;
1931
1932 len = (len & 0x3) ? ((len | 0x3) + 1) : len;
1933 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_CONTENT,
1934 len, &bcn->sub_ntlv, &bcn->len);
1935
1936 cont = (struct bss_info_bcn_cont *)tlv;
1937 cont->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
1938 cont->tim_ofs = cpu_to_le16(offs->tim_offset);
1939
1940 if (offs->cntdwn_counter_offs[0]) {
1941 u16 offset = offs->cntdwn_counter_offs[0];
1942
1943 if (vif->bss_conf.csa_active)
1944 cont->csa_ofs = cpu_to_le16(offset - 4);
1945 if (vif->bss_conf.color_change_active)
1946 cont->bcc_ofs = cpu_to_le16(offset - 3);
1947 }
1948
1949 buf = (u8 *)tlv + sizeof(*cont);
1950 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL,
1951 0, BSS_CHANGED_BEACON);
1952 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
1953 }
1954
1955 int
mt7915_mcu_add_inband_discov(struct mt7915_dev * dev,struct ieee80211_vif * vif,u32 changed)1956 mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1957 u32 changed)
1958 {
1959 #define OFFLOAD_TX_MODE_SU BIT(0)
1960 #define OFFLOAD_TX_MODE_MU BIT(1)
1961 struct ieee80211_hw *hw = mt76_hw(dev);
1962 struct mt7915_phy *phy = mt7915_hw_phy(hw);
1963 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1964 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
1965 enum nl80211_band band = chandef->chan->band;
1966 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
1967 struct bss_info_bcn *bcn;
1968 struct bss_info_inband_discovery *discov;
1969 struct ieee80211_tx_info *info;
1970 struct sk_buff *rskb, *skb = NULL;
1971 struct tlv *tlv, *sub_tlv;
1972 bool ext_phy = phy != &dev->phy;
1973 u8 *buf, interval;
1974 int len;
1975
1976 if (vif->bss_conf.nontransmitted)
1977 return 0;
1978
1979 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL,
1980 MT7915_MAX_BSS_OFFLOAD_SIZE);
1981 if (IS_ERR(rskb))
1982 return PTR_ERR(rskb);
1983
1984 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn));
1985 bcn = (struct bss_info_bcn *)tlv;
1986 bcn->enable = true;
1987
1988 if (changed & BSS_CHANGED_FILS_DISCOVERY) {
1989 interval = vif->bss_conf.fils_discovery.max_interval;
1990 skb = ieee80211_get_fils_discovery_tmpl(hw, vif);
1991 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP &&
1992 vif->bss_conf.unsol_bcast_probe_resp_interval) {
1993 interval = vif->bss_conf.unsol_bcast_probe_resp_interval;
1994 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif);
1995 }
1996
1997 if (!skb) {
1998 dev_kfree_skb(rskb);
1999 return -EINVAL;
2000 }
2001
2002 info = IEEE80211_SKB_CB(skb);
2003 info->control.vif = vif;
2004 info->band = band;
2005 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);
2006
2007 len = sizeof(*discov) + MT_TXD_SIZE + skb->len;
2008 len = (len & 0x3) ? ((len | 0x3) + 1) : len;
2009
2010 if (skb->len > MT7915_MAX_BEACON_SIZE) {
2011 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n");
2012 dev_kfree_skb(rskb);
2013 dev_kfree_skb(skb);
2014 return -EINVAL;
2015 }
2016
2017 sub_tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_DISCOV,
2018 len, &bcn->sub_ntlv, &bcn->len);
2019 discov = (struct bss_info_inband_discovery *)sub_tlv;
2020 discov->tx_mode = OFFLOAD_TX_MODE_SU;
2021 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */
2022 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY);
2023 discov->tx_interval = interval;
2024 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
2025 discov->enable = !!interval;
2026
2027 buf = (u8 *)sub_tlv + sizeof(*discov);
2028
2029 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL,
2030 0, changed);
2031 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
2032
2033 dev_kfree_skb(skb);
2034
2035 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
2036 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
2037 }
2038
mt7915_mcu_add_beacon(struct ieee80211_hw * hw,struct ieee80211_vif * vif,int en,u32 changed)2039 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2040 int en, u32 changed)
2041 {
2042 struct mt7915_dev *dev = mt7915_hw_dev(hw);
2043 struct mt7915_phy *phy = mt7915_hw_phy(hw);
2044 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
2045 struct ieee80211_mutable_offsets offs;
2046 struct ieee80211_tx_info *info;
2047 struct sk_buff *skb, *rskb;
2048 struct tlv *tlv;
2049 struct bss_info_bcn *bcn;
2050 int len = MT7915_MAX_BSS_OFFLOAD_SIZE;
2051 bool ext_phy = phy != &dev->phy;
2052
2053 if (vif->bss_conf.nontransmitted)
2054 return 0;
2055
2056 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
2057 NULL, len);
2058 if (IS_ERR(rskb))
2059 return PTR_ERR(rskb);
2060
2061 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn));
2062 bcn = (struct bss_info_bcn *)tlv;
2063 bcn->enable = en;
2064
2065 if (!en)
2066 goto out;
2067
2068 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0);
2069 if (!skb) {
2070 dev_kfree_skb(rskb);
2071 return -EINVAL;
2072 }
2073
2074 if (skb->len > MT7915_MAX_BEACON_SIZE) {
2075 dev_err(dev->mt76.dev, "Bcn size limit exceed\n");
2076 dev_kfree_skb(rskb);
2077 dev_kfree_skb(skb);
2078 return -EINVAL;
2079 }
2080
2081 info = IEEE80211_SKB_CB(skb);
2082 info->hw_queue = FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);
2083
2084 mt7915_mcu_beacon_cntdwn(vif, rskb, skb, bcn, &offs);
2085 mt7915_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs);
2086 mt7915_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs);
2087 dev_kfree_skb(skb);
2088
2089 out:
2090 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
2091 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
2092 }
2093
mt7915_driver_own(struct mt7915_dev * dev,u8 band)2094 static int mt7915_driver_own(struct mt7915_dev *dev, u8 band)
2095 {
2096 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN);
2097 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band),
2098 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) {
2099 dev_err(dev->mt76.dev, "Timeout for driver own\n");
2100 return -EIO;
2101 }
2102
2103 /* clear irq when the driver own success */
2104 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band),
2105 MT_TOP_LPCR_HOST_BAND_STAT);
2106
2107 return 0;
2108 }
2109
2110 static int
mt7915_firmware_state(struct mt7915_dev * dev,bool wa)2111 mt7915_firmware_state(struct mt7915_dev *dev, bool wa)
2112 {
2113 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE,
2114 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD);
2115
2116 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE,
2117 state, 1000)) {
2118 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
2119 return -EIO;
2120 }
2121 return 0;
2122 }
2123
mt7915_load_firmware(struct mt7915_dev * dev)2124 static int mt7915_load_firmware(struct mt7915_dev *dev)
2125 {
2126 int ret;
2127
2128 /* Release Semaphore if taken by previous failed attempt */
2129 ret = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, false);
2130 if (ret != PATCH_REL_SEM_SUCCESS) {
2131 dev_err(dev->mt76.dev, "Could not release semaphore\n");
2132 /* Continue anyways */
2133 }
2134
2135 /* Always restart MCU firmware */
2136 mt76_connac_mcu_restart(&dev->mt76);
2137
2138 /* Check if MCU is ready */
2139 ret = mt7915_firmware_state(dev, false);
2140 if (ret) {
2141 dev_err(dev->mt76.dev, "Firmware did not enter download state\n");
2142 return ret;
2143 }
2144
2145 ret = mt76_connac2_load_patch(&dev->mt76, fw_name_var(dev, ROM_PATCH));
2146 if (ret)
2147 return ret;
2148
2149 ret = mt76_connac2_load_ram(&dev->mt76, fw_name_var(dev, FIRMWARE_WM),
2150 fw_name(dev, FIRMWARE_WA));
2151 if (ret)
2152 return ret;
2153
2154 ret = mt7915_firmware_state(dev, true);
2155 if (ret)
2156 return ret;
2157
2158 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
2159
2160 dev_dbg(dev->mt76.dev, "Firmware init done\n");
2161
2162 return 0;
2163 }
2164
mt7915_mcu_fw_log_2_host(struct mt7915_dev * dev,u8 type,u8 ctrl)2165 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl)
2166 {
2167 struct {
2168 u8 ctrl_val;
2169 u8 pad[3];
2170 } data = {
2171 .ctrl_val = ctrl
2172 };
2173
2174 if (type == MCU_FW_LOG_WA)
2175 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(FW_LOG_2_HOST),
2176 &data, sizeof(data), true);
2177
2178 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_LOG_2_HOST), &data,
2179 sizeof(data), true);
2180 }
2181
mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev * dev,u32 module,u8 level)2182 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level)
2183 {
2184 struct {
2185 u8 ver;
2186 u8 pad;
2187 __le16 len;
2188 u8 level;
2189 u8 rsv[3];
2190 __le32 module_idx;
2191 } data = {
2192 .module_idx = cpu_to_le32(module),
2193 .level = level,
2194 };
2195
2196 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_DBG_CTRL), &data,
2197 sizeof(data), false);
2198 }
2199
mt7915_mcu_muru_debug_set(struct mt7915_dev * dev,bool enabled)2200 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enabled)
2201 {
2202 struct {
2203 __le32 cmd;
2204 u8 enable;
2205 } data = {
2206 .cmd = cpu_to_le32(MURU_SET_TXC_TX_STATS_EN),
2207 .enable = enabled,
2208 };
2209
2210 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &data,
2211 sizeof(data), false);
2212 }
2213
mt7915_mcu_muru_debug_get(struct mt7915_phy * phy)2214 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy)
2215 {
2216 struct mt7915_dev *dev = phy->dev;
2217 struct sk_buff *skb;
2218 struct mt7915_mcu_muru_stats *mu_stats;
2219 int ret;
2220
2221 struct {
2222 __le32 cmd;
2223 u8 band_idx;
2224 } req = {
2225 .cmd = cpu_to_le32(MURU_GET_TXC_TX_STATS),
2226 .band_idx = phy->mt76->band_idx,
2227 };
2228
2229 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL),
2230 &req, sizeof(req), true, &skb);
2231 if (ret)
2232 return ret;
2233
2234 mu_stats = (struct mt7915_mcu_muru_stats *)(skb->data);
2235
2236 /* accumulate stats, these are clear-on-read */
2237 #define __dl_u32(s) phy->mib.dl_##s += le32_to_cpu(mu_stats->dl.s)
2238 #define __ul_u32(s) phy->mib.ul_##s += le32_to_cpu(mu_stats->ul.s)
2239 __dl_u32(cck_cnt);
2240 __dl_u32(ofdm_cnt);
2241 __dl_u32(htmix_cnt);
2242 __dl_u32(htgf_cnt);
2243 __dl_u32(vht_su_cnt);
2244 __dl_u32(vht_2mu_cnt);
2245 __dl_u32(vht_3mu_cnt);
2246 __dl_u32(vht_4mu_cnt);
2247 __dl_u32(he_su_cnt);
2248 __dl_u32(he_2ru_cnt);
2249 __dl_u32(he_2mu_cnt);
2250 __dl_u32(he_3ru_cnt);
2251 __dl_u32(he_3mu_cnt);
2252 __dl_u32(he_4ru_cnt);
2253 __dl_u32(he_4mu_cnt);
2254 __dl_u32(he_5to8ru_cnt);
2255 __dl_u32(he_9to16ru_cnt);
2256 __dl_u32(he_gtr16ru_cnt);
2257
2258 __ul_u32(hetrig_su_cnt);
2259 __ul_u32(hetrig_2ru_cnt);
2260 __ul_u32(hetrig_3ru_cnt);
2261 __ul_u32(hetrig_4ru_cnt);
2262 __ul_u32(hetrig_5to8ru_cnt);
2263 __ul_u32(hetrig_9to16ru_cnt);
2264 __ul_u32(hetrig_gtr16ru_cnt);
2265 __ul_u32(hetrig_2mu_cnt);
2266 __ul_u32(hetrig_3mu_cnt);
2267 __ul_u32(hetrig_4mu_cnt);
2268 #undef __dl_u32
2269 #undef __ul_u32
2270
2271 dev_kfree_skb(skb);
2272
2273 return 0;
2274 }
2275
mt7915_mcu_set_mwds(struct mt7915_dev * dev,bool enabled)2276 static int mt7915_mcu_set_mwds(struct mt7915_dev *dev, bool enabled)
2277 {
2278 struct {
2279 u8 enable;
2280 u8 _rsv[3];
2281 } __packed req = {
2282 .enable = enabled
2283 };
2284
2285 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req,
2286 sizeof(req), false);
2287 }
2288
mt7915_mcu_set_muru_ctrl(struct mt7915_dev * dev,u32 cmd,u32 val)2289 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val)
2290 {
2291 struct {
2292 __le32 cmd;
2293 u8 val[4];
2294 } __packed req = {
2295 .cmd = cpu_to_le32(cmd),
2296 };
2297
2298 put_unaligned_le32(val, req.val);
2299
2300 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req,
2301 sizeof(req), false);
2302 }
2303
2304 static int
mt7915_mcu_init_rx_airtime(struct mt7915_dev * dev)2305 mt7915_mcu_init_rx_airtime(struct mt7915_dev *dev)
2306 {
2307 #define RX_AIRTIME_FEATURE_CTRL 1
2308 #define RX_AIRTIME_BITWISE_CTRL 2
2309 #define RX_AIRTIME_CLEAR_EN 1
2310 struct {
2311 __le16 field;
2312 __le16 sub_field;
2313 __le32 set_status;
2314 __le32 get_status;
2315 u8 _rsv[12];
2316
2317 bool airtime_en;
2318 bool mibtime_en;
2319 bool earlyend_en;
2320 u8 _rsv1[9];
2321
2322 bool airtime_clear;
2323 bool mibtime_clear;
2324 u8 _rsv2[98];
2325 } __packed req = {
2326 .field = cpu_to_le16(RX_AIRTIME_BITWISE_CTRL),
2327 .sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN),
2328 .airtime_clear = true,
2329 };
2330 int ret;
2331
2332 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req,
2333 sizeof(req), true);
2334 if (ret)
2335 return ret;
2336
2337 req.field = cpu_to_le16(RX_AIRTIME_FEATURE_CTRL);
2338 req.sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN);
2339 req.airtime_en = true;
2340
2341 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req,
2342 sizeof(req), true);
2343 }
2344
mt7915_red_set_watermark(struct mt7915_dev * dev)2345 static int mt7915_red_set_watermark(struct mt7915_dev *dev)
2346 {
2347 #define RED_GLOBAL_TOKEN_WATERMARK 2
2348 struct {
2349 __le32 args[3];
2350 u8 cmd;
2351 u8 version;
2352 u8 __rsv1[4];
2353 __le16 len;
2354 __le16 high_mark;
2355 __le16 low_mark;
2356 u8 __rsv2[12];
2357 } __packed req = {
2358 .args[0] = cpu_to_le32(MCU_WA_PARAM_RED_SETTING),
2359 .cmd = RED_GLOBAL_TOKEN_WATERMARK,
2360 .len = cpu_to_le16(sizeof(req) - sizeof(req.args)),
2361 .high_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256),
2362 .low_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256 - 1536),
2363 };
2364
2365 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET), &req,
2366 sizeof(req), false);
2367 }
2368
mt7915_mcu_set_red(struct mt7915_dev * dev,bool enabled)2369 static int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled)
2370 {
2371 #define RED_DISABLE 0
2372 #define RED_BY_WA_ENABLE 2
2373 int ret;
2374 u32 red_type = enabled ? RED_BY_WA_ENABLE : RED_DISABLE;
2375 __le32 req = cpu_to_le32(red_type);
2376
2377 if (enabled) {
2378 ret = mt7915_red_set_watermark(dev);
2379 if (ret < 0)
2380 return ret;
2381 }
2382
2383 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RED_ENABLE), &req,
2384 sizeof(req), false);
2385 if (ret < 0)
2386 return ret;
2387
2388 return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
2389 MCU_WA_PARAM_RED, enabled, 0);
2390 }
2391
mt7915_mcu_init_firmware(struct mt7915_dev * dev)2392 int mt7915_mcu_init_firmware(struct mt7915_dev *dev)
2393 {
2394 int ret;
2395
2396 /* force firmware operation mode into normal state,
2397 * which should be set before firmware download stage.
2398 */
2399 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
2400
2401 ret = mt7915_driver_own(dev, 0);
2402 if (ret)
2403 return ret;
2404 /* set driver own for band1 when two hif exist */
2405 if (dev->hif2) {
2406 ret = mt7915_driver_own(dev, 1);
2407 if (ret)
2408 return ret;
2409 }
2410
2411 ret = mt7915_load_firmware(dev);
2412 if (ret)
2413 return ret;
2414
2415 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
2416 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
2417 if (ret)
2418 return ret;
2419
2420 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);
2421 if (ret)
2422 return ret;
2423
2424 mt76_connac_mcu_del_wtbl_all(&dev->mt76);
2425
2426 if ((mtk_wed_device_active(&dev->mt76.mmio.wed) &&
2427 is_mt7915(&dev->mt76)) ||
2428 !mtk_wed_get_rx_capa(&dev->mt76.mmio.wed))
2429 mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0);
2430
2431 ret = mt7915_mcu_set_mwds(dev, 1);
2432 if (ret)
2433 return ret;
2434
2435 ret = mt7915_mcu_set_muru_ctrl(dev, MURU_SET_PLATFORM_TYPE,
2436 MURU_PLATFORM_TYPE_PERF_LEVEL_2);
2437 if (ret)
2438 return ret;
2439
2440 ret = mt7915_mcu_init_rx_airtime(dev);
2441 if (ret)
2442 return ret;
2443
2444 return mt7915_mcu_set_red(dev, mtk_wed_device_active(&dev->mt76.mmio.wed));
2445 }
2446
mt7915_mcu_init(struct mt7915_dev * dev)2447 int mt7915_mcu_init(struct mt7915_dev *dev)
2448 {
2449 static const struct mt76_mcu_ops mt7915_mcu_ops = {
2450 .max_retry = 1,
2451 .headroom = sizeof(struct mt76_connac2_mcu_txd),
2452 .mcu_skb_prepare_msg = mt76_connac2_mcu_fill_message,
2453 .mcu_skb_send_msg = mt7915_mcu_send_message,
2454 .mcu_parse_response = mt7915_mcu_parse_response,
2455 };
2456
2457 dev->mt76.mcu_ops = &mt7915_mcu_ops;
2458
2459 return mt7915_mcu_init_firmware(dev);
2460 }
2461
mt7915_mcu_exit(struct mt7915_dev * dev)2462 void mt7915_mcu_exit(struct mt7915_dev *dev)
2463 {
2464 mt76_connac_mcu_restart(&dev->mt76);
2465 if (mt7915_firmware_state(dev, false)) {
2466 dev_err(dev->mt76.dev, "Failed to exit mcu\n");
2467 goto out;
2468 }
2469
2470 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN);
2471 if (dev->hif2)
2472 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1),
2473 MT_TOP_LPCR_HOST_FW_OWN);
2474 out:
2475 skb_queue_purge(&dev->mt76.mcu.res_q);
2476 }
2477
2478 static int
mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev * dev,int band)2479 mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev *dev, int band)
2480 {
2481 struct {
2482 u8 operation;
2483 u8 count;
2484 u8 _rsv[2];
2485 u8 index;
2486 u8 enable;
2487 __le16 etype;
2488 } req = {
2489 .operation = 1,
2490 .count = 1,
2491 .enable = 1,
2492 .etype = cpu_to_le16(ETH_P_PAE),
2493 };
2494
2495 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),
2496 &req, sizeof(req), false);
2497 }
2498
mt7915_mcu_set_mac(struct mt7915_dev * dev,int band,bool enable,bool hdr_trans)2499 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band,
2500 bool enable, bool hdr_trans)
2501 {
2502 struct {
2503 u8 operation;
2504 u8 enable;
2505 u8 check_bssid;
2506 u8 insert_vlan;
2507 u8 remove_vlan;
2508 u8 tid;
2509 u8 mode;
2510 u8 rsv;
2511 } __packed req_trans = {
2512 .enable = hdr_trans,
2513 };
2514 struct {
2515 u8 enable;
2516 u8 band;
2517 u8 rsv[2];
2518 } __packed req_mac = {
2519 .enable = enable,
2520 .band = band,
2521 };
2522 int ret;
2523
2524 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),
2525 &req_trans, sizeof(req_trans), false);
2526 if (ret)
2527 return ret;
2528
2529 if (hdr_trans)
2530 mt7915_mcu_set_rx_hdr_trans_blacklist(dev, band);
2531
2532 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MAC_INIT_CTRL),
2533 &req_mac, sizeof(req_mac), true);
2534 }
2535
mt7915_mcu_update_edca(struct mt7915_dev * dev,void * param)2536 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *param)
2537 {
2538 struct mt7915_mcu_tx *req = (struct mt7915_mcu_tx *)param;
2539 u8 num = req->total;
2540 size_t len = sizeof(*req) -
2541 (IEEE80211_NUM_ACS - num) * sizeof(struct edca);
2542
2543 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCA_UPDATE), req,
2544 len, true);
2545 }
2546
mt7915_mcu_set_tx(struct mt7915_dev * dev,struct ieee80211_vif * vif)2547 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif)
2548 {
2549 #define TX_CMD_MODE 1
2550 struct mt7915_mcu_tx req = {
2551 .valid = true,
2552 .mode = TX_CMD_MODE,
2553 .total = IEEE80211_NUM_ACS,
2554 };
2555 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
2556 int ac;
2557
2558 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
2559 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac];
2560 struct edca *e = &req.edca[ac];
2561
2562 e->set = WMM_PARAM_SET;
2563 e->queue = ac + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS;
2564 e->aifs = q->aifs;
2565 e->txop = cpu_to_le16(q->txop);
2566
2567 if (q->cw_min)
2568 e->cw_min = fls(q->cw_min);
2569 else
2570 e->cw_min = 5;
2571
2572 if (q->cw_max)
2573 e->cw_max = cpu_to_le16(fls(q->cw_max));
2574 else
2575 e->cw_max = cpu_to_le16(10);
2576 }
2577
2578 return mt7915_mcu_update_edca(dev, &req);
2579 }
2580
mt7915_mcu_set_fcc5_lpn(struct mt7915_dev * dev,int val)2581 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val)
2582 {
2583 struct {
2584 __le32 tag;
2585 __le16 min_lpn;
2586 u8 rsv[2];
2587 } __packed req = {
2588 .tag = cpu_to_le32(0x1),
2589 .min_lpn = cpu_to_le16(val),
2590 };
2591
2592 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2593 sizeof(req), true);
2594 }
2595
mt7915_mcu_set_pulse_th(struct mt7915_dev * dev,const struct mt7915_dfs_pulse * pulse)2596 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
2597 const struct mt7915_dfs_pulse *pulse)
2598 {
2599 struct {
2600 __le32 tag;
2601
2602 __le32 max_width; /* us */
2603 __le32 max_pwr; /* dbm */
2604 __le32 min_pwr; /* dbm */
2605 __le32 min_stgr_pri; /* us */
2606 __le32 max_stgr_pri; /* us */
2607 __le32 min_cr_pri; /* us */
2608 __le32 max_cr_pri; /* us */
2609 } __packed req = {
2610 .tag = cpu_to_le32(0x3),
2611
2612 #define __req_field(field) .field = cpu_to_le32(pulse->field)
2613 __req_field(max_width),
2614 __req_field(max_pwr),
2615 __req_field(min_pwr),
2616 __req_field(min_stgr_pri),
2617 __req_field(max_stgr_pri),
2618 __req_field(min_cr_pri),
2619 __req_field(max_cr_pri),
2620 #undef __req_field
2621 };
2622
2623 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2624 sizeof(req), true);
2625 }
2626
mt7915_mcu_set_radar_th(struct mt7915_dev * dev,int index,const struct mt7915_dfs_pattern * pattern)2627 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
2628 const struct mt7915_dfs_pattern *pattern)
2629 {
2630 struct {
2631 __le32 tag;
2632 __le16 radar_type;
2633
2634 u8 enb;
2635 u8 stgr;
2636 u8 min_crpn;
2637 u8 max_crpn;
2638 u8 min_crpr;
2639 u8 min_pw;
2640 __le32 min_pri;
2641 __le32 max_pri;
2642 u8 max_pw;
2643 u8 min_crbn;
2644 u8 max_crbn;
2645 u8 min_stgpn;
2646 u8 max_stgpn;
2647 u8 min_stgpr;
2648 u8 rsv[2];
2649 __le32 min_stgpr_diff;
2650 } __packed req = {
2651 .tag = cpu_to_le32(0x2),
2652 .radar_type = cpu_to_le16(index),
2653
2654 #define __req_field_u8(field) .field = pattern->field
2655 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
2656 __req_field_u8(enb),
2657 __req_field_u8(stgr),
2658 __req_field_u8(min_crpn),
2659 __req_field_u8(max_crpn),
2660 __req_field_u8(min_crpr),
2661 __req_field_u8(min_pw),
2662 __req_field_u32(min_pri),
2663 __req_field_u32(max_pri),
2664 __req_field_u8(max_pw),
2665 __req_field_u8(min_crbn),
2666 __req_field_u8(max_crbn),
2667 __req_field_u8(min_stgpn),
2668 __req_field_u8(max_stgpn),
2669 __req_field_u8(min_stgpr),
2670 __req_field_u32(min_stgpr_diff),
2671 #undef __req_field_u8
2672 #undef __req_field_u32
2673 };
2674
2675 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2676 sizeof(req), true);
2677 }
2678
2679 static int
mt7915_mcu_background_chain_ctrl(struct mt7915_phy * phy,struct cfg80211_chan_def * chandef,int cmd)2680 mt7915_mcu_background_chain_ctrl(struct mt7915_phy *phy,
2681 struct cfg80211_chan_def *chandef,
2682 int cmd)
2683 {
2684 struct mt7915_dev *dev = phy->dev;
2685 struct mt76_phy *mphy = phy->mt76;
2686 struct ieee80211_channel *chan = mphy->chandef.chan;
2687 int freq = mphy->chandef.center_freq1;
2688 struct mt7915_mcu_background_chain_ctrl req = {
2689 .monitor_scan_type = 2, /* simple rx */
2690 };
2691
2692 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP)
2693 return -EINVAL;
2694
2695 if (!cfg80211_chandef_valid(&mphy->chandef))
2696 return -EINVAL;
2697
2698 switch (cmd) {
2699 case CH_SWITCH_BACKGROUND_SCAN_START: {
2700 req.chan = chan->hw_value;
2701 req.central_chan = ieee80211_frequency_to_channel(freq);
2702 req.bw = mt76_connac_chan_bw(&mphy->chandef);
2703 req.monitor_chan = chandef->chan->hw_value;
2704 req.monitor_central_chan =
2705 ieee80211_frequency_to_channel(chandef->center_freq1);
2706 req.monitor_bw = mt76_connac_chan_bw(chandef);
2707 req.band_idx = phy->mt76->band_idx;
2708 req.scan_mode = 1;
2709 break;
2710 }
2711 case CH_SWITCH_BACKGROUND_SCAN_RUNNING:
2712 req.monitor_chan = chandef->chan->hw_value;
2713 req.monitor_central_chan =
2714 ieee80211_frequency_to_channel(chandef->center_freq1);
2715 req.band_idx = phy->mt76->band_idx;
2716 req.scan_mode = 2;
2717 break;
2718 case CH_SWITCH_BACKGROUND_SCAN_STOP:
2719 req.chan = chan->hw_value;
2720 req.central_chan = ieee80211_frequency_to_channel(freq);
2721 req.bw = mt76_connac_chan_bw(&mphy->chandef);
2722 req.tx_stream = hweight8(mphy->antenna_mask);
2723 req.rx_stream = mphy->antenna_mask;
2724 break;
2725 default:
2726 return -EINVAL;
2727 }
2728 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1;
2729
2730 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(OFFCH_SCAN_CTRL),
2731 &req, sizeof(req), false);
2732 }
2733
mt7915_mcu_rdd_background_enable(struct mt7915_phy * phy,struct cfg80211_chan_def * chandef)2734 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
2735 struct cfg80211_chan_def *chandef)
2736 {
2737 struct mt7915_dev *dev = phy->dev;
2738 int err, region, rdd_idx;
2739
2740 rdd_idx = mt7915_get_rdd_idx(phy, true);
2741 if (rdd_idx < 0)
2742 return -EINVAL;
2743
2744 if (!chandef) { /* disable offchain */
2745 err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, rdd_idx, 0, 0);
2746 if (err)
2747 return err;
2748
2749 return mt7915_mcu_background_chain_ctrl(phy, NULL,
2750 CH_SWITCH_BACKGROUND_SCAN_STOP);
2751 }
2752
2753 err = mt7915_mcu_background_chain_ctrl(phy, chandef,
2754 CH_SWITCH_BACKGROUND_SCAN_START);
2755 if (err)
2756 return err;
2757
2758 switch (dev->mt76.region) {
2759 case NL80211_DFS_ETSI:
2760 region = 0;
2761 break;
2762 case NL80211_DFS_JP:
2763 region = 2;
2764 break;
2765 case NL80211_DFS_FCC:
2766 default:
2767 region = 1;
2768 break;
2769 }
2770
2771 return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, rdd_idx, 0, region);
2772 }
2773
mt7915_mcu_set_chan_info(struct mt7915_phy * phy,int cmd)2774 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd)
2775 {
2776 static const u8 ch_band[] = {
2777 [NL80211_BAND_2GHZ] = 0,
2778 [NL80211_BAND_5GHZ] = 1,
2779 [NL80211_BAND_6GHZ] = 2,
2780 };
2781 struct mt7915_dev *dev = phy->dev;
2782 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
2783 int freq1 = chandef->center_freq1;
2784 u8 band = phy->mt76->band_idx;
2785 struct {
2786 u8 control_ch;
2787 u8 center_ch;
2788 u8 bw;
2789 u8 tx_path_num;
2790 u8 rx_path; /* mask or num */
2791 u8 switch_reason;
2792 u8 band_idx;
2793 u8 center_ch2; /* for 80+80 only */
2794 __le16 cac_case;
2795 u8 channel_band;
2796 u8 rsv0;
2797 __le32 outband_freq;
2798 u8 txpower_drop;
2799 u8 ap_bw;
2800 u8 ap_center_ch;
2801 u8 rsv1[57];
2802 } __packed req = {
2803 .control_ch = chandef->chan->hw_value,
2804 .center_ch = ieee80211_frequency_to_channel(freq1),
2805 .bw = mt76_connac_chan_bw(chandef),
2806 .tx_path_num = hweight16(phy->mt76->chainmask),
2807 .rx_path = phy->mt76->chainmask >> (dev->chainshift * band),
2808 .band_idx = band,
2809 .channel_band = ch_band[chandef->chan->band],
2810 };
2811
2812 #ifdef CONFIG_NL80211_TESTMODE
2813 if (phy->mt76->test.tx_antenna_mask &&
2814 mt76_testmode_enabled(phy->mt76)) {
2815 req.tx_path_num = fls(phy->mt76->test.tx_antenna_mask);
2816 req.rx_path = phy->mt76->test.tx_antenna_mask;
2817 }
2818 #endif
2819
2820 if (mt76_connac_spe_idx(phy->mt76->antenna_mask))
2821 req.tx_path_num = fls(phy->mt76->antenna_mask);
2822
2823 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR)
2824 req.switch_reason = CH_SWITCH_NORMAL;
2825 else if (phy->mt76->offchannel ||
2826 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE)
2827 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;
2828 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,
2829 NL80211_IFTYPE_AP))
2830 req.switch_reason = CH_SWITCH_DFS;
2831 else
2832 req.switch_reason = CH_SWITCH_NORMAL;
2833
2834 if (cmd == MCU_EXT_CMD(CHANNEL_SWITCH))
2835 req.rx_path = hweight8(req.rx_path);
2836
2837 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
2838 int freq2 = chandef->center_freq2;
2839
2840 req.center_ch2 = ieee80211_frequency_to_channel(freq2);
2841 }
2842
2843 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true);
2844 }
2845
mt7915_mcu_set_eeprom_flash(struct mt7915_dev * dev)2846 static int mt7915_mcu_set_eeprom_flash(struct mt7915_dev *dev)
2847 {
2848 #define MAX_PAGE_IDX_MASK GENMASK(7, 5)
2849 #define PAGE_IDX_MASK GENMASK(4, 2)
2850 #define PER_PAGE_SIZE 0x400
2851 struct mt7915_mcu_eeprom req = { .buffer_mode = EE_MODE_BUFFER };
2852 u16 eeprom_size = mt7915_eeprom_size(dev);
2853 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE);
2854 u8 *eep = (u8 *)dev->mt76.eeprom.data;
2855 int eep_len;
2856 int i;
2857
2858 for (i = 0; i < total; i++, eep += eep_len) {
2859 struct sk_buff *skb;
2860 int ret;
2861
2862 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE))
2863 eep_len = eeprom_size % PER_PAGE_SIZE;
2864 else
2865 eep_len = PER_PAGE_SIZE;
2866
2867 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,
2868 sizeof(req) + eep_len);
2869 if (!skb)
2870 return -ENOMEM;
2871
2872 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |
2873 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;
2874 req.len = cpu_to_le16(eep_len);
2875
2876 skb_put_data(skb, &req, sizeof(req));
2877 skb_put_data(skb, eep, eep_len);
2878
2879 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
2880 MCU_EXT_CMD(EFUSE_BUFFER_MODE), true);
2881 if (ret)
2882 return ret;
2883 }
2884
2885 return 0;
2886 }
2887
mt7915_mcu_set_eeprom(struct mt7915_dev * dev)2888 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev)
2889 {
2890 struct mt7915_mcu_eeprom req = {
2891 .buffer_mode = EE_MODE_EFUSE,
2892 .format = EE_FORMAT_WHOLE,
2893 };
2894
2895 if (dev->flash_mode)
2896 return mt7915_mcu_set_eeprom_flash(dev);
2897
2898 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EFUSE_BUFFER_MODE),
2899 &req, sizeof(req), true);
2900 }
2901
mt7915_mcu_get_eeprom(struct mt7915_dev * dev,u32 offset,u8 * read_buf)2902 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf)
2903 {
2904 struct mt7915_mcu_eeprom_info req = {
2905 .addr = cpu_to_le32(round_down(offset,
2906 MT7915_EEPROM_BLOCK_SIZE)),
2907 };
2908 struct mt7915_mcu_eeprom_info *res;
2909 struct sk_buff *skb;
2910 u8 *buf = read_buf;
2911 int ret;
2912
2913 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
2914 MCU_EXT_QUERY(EFUSE_ACCESS),
2915 &req, sizeof(req), true, &skb);
2916 if (ret)
2917 return ret;
2918
2919 res = (struct mt7915_mcu_eeprom_info *)skb->data;
2920 if (!buf)
2921 #if defined(__linux__)
2922 buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr);
2923 #elif defined(__FreeBSD__)
2924 buf = (u8 *)dev->mt76.eeprom.data + le32_to_cpu(res->addr);
2925 #endif
2926 memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE);
2927
2928 dev_kfree_skb(skb);
2929
2930 return 0;
2931 }
2932
mt7915_mcu_get_eeprom_free_block(struct mt7915_dev * dev,u8 * block_num)2933 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num)
2934 {
2935 struct {
2936 u8 _rsv;
2937 u8 version;
2938 u8 die_idx;
2939 u8 _rsv2;
2940 } __packed req = {
2941 .version = 1,
2942 };
2943 struct sk_buff *skb;
2944 int ret;
2945
2946 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
2947 MCU_EXT_QUERY(EFUSE_FREE_BLOCK),
2948 &req, sizeof(req), true, &skb);
2949 if (ret)
2950 return ret;
2951
2952 *block_num = *(u8 *)skb->data;
2953 dev_kfree_skb(skb);
2954
2955 return 0;
2956 }
2957
mt7915_mcu_set_pre_cal(struct mt7915_dev * dev,u8 idx,u8 * data,u32 len,int cmd)2958 static int mt7915_mcu_set_pre_cal(struct mt7915_dev *dev, u8 idx,
2959 u8 *data, u32 len, int cmd)
2960 {
2961 struct {
2962 u8 dir;
2963 u8 valid;
2964 __le16 bitmap;
2965 s8 precal;
2966 u8 action;
2967 u8 band;
2968 u8 idx;
2969 u8 rsv[4];
2970 __le32 len;
2971 } req = {};
2972 struct sk_buff *skb;
2973
2974 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, sizeof(req) + len);
2975 if (!skb)
2976 return -ENOMEM;
2977
2978 req.idx = idx;
2979 req.len = cpu_to_le32(len);
2980 skb_put_data(skb, &req, sizeof(req));
2981 skb_put_data(skb, data, len);
2982
2983 return mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, false);
2984 }
2985
mt7915_mcu_apply_group_cal(struct mt7915_dev * dev)2986 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev)
2987 {
2988 u8 idx = 0, *cal = dev->cal, *eep = dev->mt76.eeprom.data;
2989 u32 total = mt7915_get_cal_group_size(dev);
2990 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2;
2991
2992 if (!(eep[offs] & MT_EE_WIFI_CAL_GROUP))
2993 return 0;
2994
2995 /*
2996 * Items: Rx DCOC, RSSI DCOC, Tx TSSI DCOC, Tx LPFG
2997 * Tx FDIQ, Tx DCIQ, Rx FDIQ, Rx FIIQ, ADCDCOC
2998 */
2999 while (total > 0) {
3000 int ret, len;
3001
3002 len = min_t(u32, total, MT_EE_CAL_UNIT);
3003
3004 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, len,
3005 MCU_EXT_CMD(GROUP_PRE_CAL_INFO));
3006 if (ret)
3007 return ret;
3008
3009 total -= len;
3010 cal += len;
3011 idx++;
3012 }
3013
3014 return 0;
3015 }
3016
mt7915_find_freq_idx(const u16 * freqs,int n_freqs,u16 cur)3017 static int mt7915_find_freq_idx(const u16 *freqs, int n_freqs, u16 cur)
3018 {
3019 int i;
3020
3021 for (i = 0; i < n_freqs; i++)
3022 if (cur == freqs[i])
3023 return i;
3024
3025 return -1;
3026 }
3027
mt7915_dpd_freq_idx(struct mt7915_dev * dev,u16 freq,u8 bw)3028 static int mt7915_dpd_freq_idx(struct mt7915_dev *dev, u16 freq, u8 bw)
3029 {
3030 static const u16 freq_list_v1[] = {
3031 5180, 5200, 5220, 5240,
3032 5260, 5280, 5300, 5320,
3033 5500, 5520, 5540, 5560,
3034 5580, 5600, 5620, 5640,
3035 5660, 5680, 5700, 5745,
3036 5765, 5785, 5805, 5825
3037 };
3038 static const u16 freq_list_v2[] = {
3039 /* 6G BW20*/
3040 5955, 5975, 5995, 6015,
3041 6035, 6055, 6075, 6095,
3042 6115, 6135, 6155, 6175,
3043 6195, 6215, 6235, 6255,
3044 6275, 6295, 6315, 6335,
3045 6355, 6375, 6395, 6415,
3046 6435, 6455, 6475, 6495,
3047 6515, 6535, 6555, 6575,
3048 6595, 6615, 6635, 6655,
3049 6675, 6695, 6715, 6735,
3050 6755, 6775, 6795, 6815,
3051 6835, 6855, 6875, 6895,
3052 6915, 6935, 6955, 6975,
3053 6995, 7015, 7035, 7055,
3054 7075, 7095, 7115,
3055 /* 6G BW160 */
3056 6025, 6185, 6345, 6505,
3057 6665, 6825, 6985,
3058 /* 5G BW20 */
3059 5180, 5200, 5220, 5240,
3060 5260, 5280, 5300, 5320,
3061 5500, 5520, 5540, 5560,
3062 5580, 5600, 5620, 5640,
3063 5660, 5680, 5700, 5720,
3064 5745, 5765, 5785, 5805,
3065 5825, 5845, 5865, 5885,
3066 /* 5G BW160 */
3067 5250, 5570, 5815
3068 };
3069 const u16 *freq_list;
3070 int idx, n_freqs;
3071
3072 if (!is_mt7915(&dev->mt76)) {
3073 freq_list = freq_list_v2;
3074 n_freqs = ARRAY_SIZE(freq_list_v2);
3075 } else {
3076 freq_list = freq_list_v1;
3077 n_freqs = ARRAY_SIZE(freq_list_v1);
3078 }
3079
3080 if (freq < 4000) {
3081 if (freq < 2432)
3082 return n_freqs;
3083 if (freq < 2457)
3084 return n_freqs + 1;
3085
3086 return n_freqs + 2;
3087 }
3088
3089 if (bw == NL80211_CHAN_WIDTH_80P80)
3090 return -1;
3091
3092 if (bw != NL80211_CHAN_WIDTH_20) {
3093 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq + 10);
3094 if (idx >= 0)
3095 return idx;
3096
3097 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq - 10);
3098 if (idx >= 0)
3099 return idx;
3100 }
3101
3102 return mt7915_find_freq_idx(freq_list, n_freqs, freq);
3103 }
3104
mt7915_mcu_apply_tx_dpd(struct mt7915_phy * phy)3105 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy)
3106 {
3107 struct mt7915_dev *dev = phy->dev;
3108 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
3109 enum nl80211_band band = chandef->chan->band;
3110 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2;
3111 u16 center_freq = chandef->center_freq1;
3112 u8 *cal = dev->cal, *eep = dev->mt76.eeprom.data;
3113 u8 dpd_mask, cal_num = is_mt7915(&dev->mt76) ? 2 : 3;
3114 int idx;
3115
3116 switch (band) {
3117 case NL80211_BAND_2GHZ:
3118 dpd_mask = MT_EE_WIFI_CAL_DPD_2G;
3119 break;
3120 case NL80211_BAND_5GHZ:
3121 dpd_mask = MT_EE_WIFI_CAL_DPD_5G;
3122 break;
3123 case NL80211_BAND_6GHZ:
3124 dpd_mask = MT_EE_WIFI_CAL_DPD_6G;
3125 break;
3126 default:
3127 dpd_mask = 0;
3128 break;
3129 }
3130
3131 if (!(eep[offs] & dpd_mask))
3132 return 0;
3133
3134 idx = mt7915_dpd_freq_idx(dev, center_freq, chandef->width);
3135 if (idx < 0)
3136 return -EINVAL;
3137
3138 /* Items: Tx DPD, Tx Flatness */
3139 idx = idx * cal_num;
3140 cal += mt7915_get_cal_group_size(dev) + (idx * MT_EE_CAL_UNIT);
3141
3142 while (cal_num--) {
3143 int ret;
3144
3145 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, MT_EE_CAL_UNIT,
3146 MCU_EXT_CMD(DPD_PRE_CAL_INFO));
3147 if (ret)
3148 return ret;
3149
3150 idx++;
3151 cal += MT_EE_CAL_UNIT;
3152 }
3153
3154 return 0;
3155 }
3156
mt7915_mcu_get_chan_mib_info(struct mt7915_phy * phy,bool chan_switch)3157 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch)
3158 {
3159 struct mt76_channel_state *state = phy->mt76->chan_state;
3160 struct mt76_channel_state *state_ts = &phy->state_ts;
3161 struct mt7915_dev *dev = phy->dev;
3162 struct mt7915_mcu_mib *res, req[5];
3163 struct sk_buff *skb;
3164 static const u32 *offs;
3165 int i, ret, len, offs_cc;
3166 u64 cc_tx;
3167
3168 /* strict order */
3169 if (is_mt7915(&dev->mt76)) {
3170 static const u32 chip_offs[] = {
3171 MIB_NON_WIFI_TIME,
3172 MIB_TX_TIME,
3173 MIB_RX_TIME,
3174 MIB_OBSS_AIRTIME,
3175 MIB_TXOP_INIT_COUNT,
3176 };
3177 len = ARRAY_SIZE(chip_offs);
3178 offs = chip_offs;
3179 offs_cc = 20;
3180 } else {
3181 static const u32 chip_offs[] = {
3182 MIB_NON_WIFI_TIME_V2,
3183 MIB_TX_TIME_V2,
3184 MIB_RX_TIME_V2,
3185 MIB_OBSS_AIRTIME_V2
3186 };
3187 len = ARRAY_SIZE(chip_offs);
3188 offs = chip_offs;
3189 offs_cc = 0;
3190 }
3191
3192 for (i = 0; i < len; i++) {
3193 req[i].band = cpu_to_le32(phy->mt76->band_idx);
3194 req[i].offs = cpu_to_le32(offs[i]);
3195 }
3196
3197 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(GET_MIB_INFO),
3198 req, len * sizeof(req[0]), true, &skb);
3199 if (ret)
3200 return ret;
3201
3202 res = (struct mt7915_mcu_mib *)(skb->data + offs_cc);
3203
3204 #define __res_u64(s) le64_to_cpu(res[s].data)
3205 /* subtract Tx backoff time from Tx duration for MT7915 */
3206 if (is_mt7915(&dev->mt76)) {
3207 u64 backoff = (__res_u64(4) & 0xffff) * 79; /* 16us + 9us * 7 */
3208 cc_tx = __res_u64(1) - backoff;
3209 } else {
3210 cc_tx = __res_u64(1);
3211 }
3212
3213 if (chan_switch)
3214 goto out;
3215
3216 state->cc_tx += cc_tx - state_ts->cc_tx;
3217 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx;
3218 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx;
3219 state->cc_busy += __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3) -
3220 state_ts->cc_busy;
3221
3222 out:
3223 state_ts->cc_tx = cc_tx;
3224 state_ts->cc_bss_rx = __res_u64(2);
3225 state_ts->cc_rx = __res_u64(2) + __res_u64(3);
3226 state_ts->cc_busy = __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3);
3227 #undef __res_u64
3228
3229 dev_kfree_skb(skb);
3230
3231 return 0;
3232 }
3233
mt7915_mcu_get_temperature(struct mt7915_phy * phy)3234 int mt7915_mcu_get_temperature(struct mt7915_phy *phy)
3235 {
3236 struct mt7915_dev *dev = phy->dev;
3237 struct {
3238 u8 ctrl_id;
3239 u8 action;
3240 u8 band_idx;
3241 u8 rsv[5];
3242 } req = {
3243 .ctrl_id = THERMAL_SENSOR_TEMP_QUERY,
3244 .band_idx = phy->mt76->band_idx,
3245 };
3246
3247 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_CTRL), &req,
3248 sizeof(req), true);
3249 }
3250
mt7915_mcu_set_thermal_throttling(struct mt7915_phy * phy,u8 state)3251 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state)
3252 {
3253 struct mt7915_dev *dev = phy->dev;
3254 struct mt7915_mcu_thermal_ctrl req = {
3255 .band_idx = phy->mt76->band_idx,
3256 .ctrl_id = THERMAL_PROTECT_DUTY_CONFIG,
3257 };
3258 int level, ret;
3259
3260 /* set duty cycle and level */
3261 for (level = 0; level < 4; level++) {
3262 req.duty.duty_level = level;
3263 req.duty.duty_cycle = state;
3264 state /= 2;
3265
3266 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3267 &req, sizeof(req), false);
3268 if (ret)
3269 return ret;
3270 }
3271 return 0;
3272 }
3273
mt7915_mcu_set_thermal_protect(struct mt7915_phy * phy)3274 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy)
3275 {
3276 struct mt7915_dev *dev = phy->dev;
3277 struct {
3278 struct mt7915_mcu_thermal_ctrl ctrl;
3279
3280 __le32 trigger_temp;
3281 __le32 restore_temp;
3282 __le16 sustain_time;
3283 u8 rsv[2];
3284 } __packed req = {
3285 .ctrl = {
3286 .band_idx = phy->mt76->band_idx,
3287 .type.protect_type = 1,
3288 .type.trigger_type = 1,
3289 },
3290 };
3291 int ret;
3292
3293 req.ctrl.ctrl_id = THERMAL_PROTECT_DISABLE;
3294 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3295 &req, sizeof(req.ctrl), false);
3296
3297 if (ret)
3298 return ret;
3299
3300 /* set high-temperature trigger threshold */
3301 req.ctrl.ctrl_id = THERMAL_PROTECT_ENABLE;
3302 /* add a safety margin ~10 */
3303 req.restore_temp = cpu_to_le32(phy->throttle_temp[0] - 10);
3304 req.trigger_temp = cpu_to_le32(phy->throttle_temp[1]);
3305 req.sustain_time = cpu_to_le16(10);
3306
3307 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3308 &req, sizeof(req), false);
3309 }
3310
mt7915_mcu_set_txpower_frame_min(struct mt7915_phy * phy,s8 txpower)3311 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower)
3312 {
3313 struct mt7915_dev *dev = phy->dev;
3314 struct {
3315 u8 format_id;
3316 u8 rsv;
3317 u8 band_idx;
3318 s8 txpower_min;
3319 } __packed req = {
3320 .format_id = TX_POWER_LIMIT_FRAME_MIN,
3321 .band_idx = phy->mt76->band_idx,
3322 .txpower_min = txpower * 2, /* 0.5db */
3323 };
3324
3325 return mt76_mcu_send_msg(&dev->mt76,
3326 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3327 sizeof(req), true);
3328 }
3329
mt7915_mcu_set_txpower_frame(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,s8 txpower)3330 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy,
3331 struct ieee80211_vif *vif,
3332 struct ieee80211_sta *sta, s8 txpower)
3333 {
3334 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
3335 struct mt7915_dev *dev = phy->dev;
3336 struct mt76_phy *mphy = phy->mt76;
3337 struct {
3338 u8 format_id;
3339 u8 rsv[3];
3340 u8 band_idx;
3341 s8 txpower_max;
3342 __le16 wcid;
3343 s8 txpower_offs[48];
3344 } __packed req = {
3345 .format_id = TX_POWER_LIMIT_FRAME,
3346 .band_idx = phy->mt76->band_idx,
3347 .txpower_max = DIV_ROUND_UP(mphy->txpower_cur, 2),
3348 .wcid = cpu_to_le16(msta->wcid.idx),
3349 };
3350 int ret;
3351 s8 txpower_sku[MT7915_SKU_RATE_NUM];
3352
3353 ret = mt7915_mcu_get_txpower_sku(phy, txpower_sku, sizeof(txpower_sku),
3354 TX_POWER_INFO_RATE);
3355 if (ret)
3356 return ret;
3357
3358 txpower = mt76_get_power_bound(mphy, txpower);
3359 if (txpower > mphy->txpower_cur || txpower < 0)
3360 return -EINVAL;
3361
3362 if (txpower) {
3363 u32 offs, len, i;
3364
3365 if (sta->deflink.ht_cap.ht_supported) {
3366 const u8 *sku_len = mt7915_sku_group_len;
3367
3368 offs = sku_len[SKU_CCK] + sku_len[SKU_OFDM];
3369 len = sku_len[SKU_HT_BW20] + sku_len[SKU_HT_BW40];
3370
3371 if (sta->deflink.vht_cap.vht_supported) {
3372 offs += len;
3373 len = sku_len[SKU_VHT_BW20] * 4;
3374
3375 if (sta->deflink.he_cap.has_he) {
3376 offs += len + sku_len[SKU_HE_RU26] * 3;
3377 len = sku_len[SKU_HE_RU242] * 4;
3378 }
3379 }
3380 } else {
3381 return -EINVAL;
3382 }
3383
3384 for (i = 0; i < len; i++, offs++)
3385 req.txpower_offs[i] =
3386 DIV_ROUND_UP(txpower - txpower_sku[offs], 2);
3387 }
3388
3389 return mt76_mcu_send_msg(&dev->mt76,
3390 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3391 sizeof(req), true);
3392 }
3393
3394 static void
mt7915_update_txpower(struct mt7915_phy * phy,int tx_power)3395 mt7915_update_txpower(struct mt7915_phy *phy, int tx_power)
3396 {
3397 struct mt76_phy *mphy = phy->mt76;
3398 struct ieee80211_channel *chan = mphy->main_chandef.chan;
3399 int chain_idx, val, e2p_power_limit = 0;
3400
3401 if (!chan) {
3402 mphy->txpower_cur = tx_power;
3403 return;
3404 }
3405
3406 for (chain_idx = 0; chain_idx < hweight16(mphy->chainmask); chain_idx++) {
3407 val = mt7915_eeprom_get_target_power(phy->dev, chan, chain_idx);
3408 val += mt7915_eeprom_get_power_delta(phy->dev, chan->band);
3409
3410 e2p_power_limit = max_t(int, e2p_power_limit, val);
3411 }
3412
3413 if (phy->sku_limit_en)
3414 mphy->txpower_cur = min_t(int, e2p_power_limit, tx_power);
3415 else
3416 mphy->txpower_cur = e2p_power_limit;
3417 }
3418
mt7915_mcu_set_txpower_sku(struct mt7915_phy * phy)3419 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy)
3420 {
3421 #define TX_POWER_LIMIT_TABLE_RATE 0
3422 #define TX_POWER_LIMIT_TABLE_PATH 1
3423 struct mt7915_dev *dev = phy->dev;
3424 struct mt76_phy *mphy = phy->mt76;
3425 struct ieee80211_hw *hw = mphy->hw;
3426 struct mt7915_sku_val {
3427 u8 format_id;
3428 u8 limit_type;
3429 u8 band_idx;
3430 } __packed hdr = {
3431 .format_id = TX_POWER_LIMIT_TABLE,
3432 .limit_type = TX_POWER_LIMIT_TABLE_RATE,
3433 .band_idx = phy->mt76->band_idx,
3434 };
3435 int i, ret, tx_power;
3436 const u8 *len = mt7915_sku_group_len;
3437 struct mt76_power_limits la = {};
3438 struct sk_buff *skb;
3439
3440 tx_power = mt76_get_power_bound(mphy, hw->conf.power_level);
3441 if (phy->sku_limit_en) {
3442 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan,
3443 &la, tx_power);
3444 mt7915_update_txpower(phy, tx_power);
3445 } else {
3446 mt7915_update_txpower(phy, tx_power);
3447 return 0;
3448 }
3449
3450 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,
3451 sizeof(hdr) + MT7915_SKU_RATE_NUM);
3452 if (!skb)
3453 return -ENOMEM;
3454
3455 skb_put_data(skb, &hdr, sizeof(hdr));
3456 skb_put_data(skb, &la.cck, len[SKU_CCK] + len[SKU_OFDM]);
3457 skb_put_data(skb, &la.mcs[0], len[SKU_HT_BW20]);
3458 skb_put_data(skb, &la.mcs[1], len[SKU_HT_BW40]);
3459
3460 /* vht */
3461 for (i = 0; i < 4; i++) {
3462 skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i]));
3463 skb_put_zero(skb, 2); /* padding */
3464 }
3465
3466 /* he */
3467 skb_put_data(skb, &la.ru[0], sizeof(la.ru));
3468 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
3469 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), true);
3470 if (ret)
3471 return ret;
3472
3473 /* only set per-path power table when it's configured */
3474 if (!phy->sku_path_en)
3475 return 0;
3476
3477 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,
3478 sizeof(hdr) + MT7915_SKU_PATH_NUM);
3479 if (!skb)
3480 return -ENOMEM;
3481
3482 hdr.limit_type = TX_POWER_LIMIT_TABLE_PATH;
3483 skb_put_data(skb, &hdr, sizeof(hdr));
3484 skb_put_data(skb, &la.path.cck, sizeof(la.path.cck));
3485 skb_put_data(skb, &la.path.ofdm, sizeof(la.path.ofdm));
3486 skb_put_data(skb, &la.path.ofdm_bf[1], sizeof(la.path.ofdm_bf) - 1);
3487
3488 /* HT20 and HT40 */
3489 skb_put_data(skb, &la.path.ru[3], sizeof(la.path.ru[3]));
3490 skb_put_data(skb, &la.path.ru_bf[3][1], sizeof(la.path.ru_bf[3]) - 1);
3491 skb_put_data(skb, &la.path.ru[4], sizeof(la.path.ru[4]));
3492 skb_put_data(skb, &la.path.ru_bf[4][1], sizeof(la.path.ru_bf[4]) - 1);
3493
3494 /* start from non-bf and bf fields of
3495 * BW20/RU242, BW40/RU484, BW80/RU996, BW160/RU2x996,
3496 * RU26, RU52, and RU106
3497 */
3498
3499 for (i = 0; i < 8; i++) {
3500 bool bf = i % 2;
3501 u8 idx = (i + 6) / 2;
3502 s8 *buf = bf ? la.path.ru_bf[idx] : la.path.ru[idx];
3503 /* The non-bf fields of RU26 to RU106 are special cases */
3504 if (bf)
3505 skb_put_data(skb, buf + 1, 9);
3506 else
3507 skb_put_data(skb, buf, 10);
3508 }
3509
3510 for (i = 0; i < 6; i++) {
3511 bool bf = i % 2;
3512 u8 idx = i / 2;
3513 s8 *buf = bf ? la.path.ru_bf[idx] : la.path.ru[idx];
3514
3515 skb_put_data(skb, buf, 10);
3516 }
3517
3518 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3519 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), true);
3520 }
3521
mt7915_mcu_get_txpower_sku(struct mt7915_phy * phy,s8 * txpower,int len,u8 category)3522 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len,
3523 u8 category)
3524 {
3525 #define RATE_POWER_INFO 2
3526 struct mt7915_dev *dev = phy->dev;
3527 struct {
3528 u8 format_id;
3529 u8 category;
3530 u8 band_idx;
3531 u8 _rsv;
3532 } __packed req = {
3533 .format_id = TX_POWER_LIMIT_INFO,
3534 .category = category,
3535 .band_idx = phy->mt76->band_idx,
3536 };
3537 struct sk_buff *skb;
3538 int ret, i;
3539
3540 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3541 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL),
3542 &req, sizeof(req), true, &skb);
3543 if (ret)
3544 return ret;
3545
3546 if (category == TX_POWER_INFO_RATE) {
3547 s8 res[MT7915_SKU_RATE_NUM][2];
3548
3549 memcpy(res, skb->data + 4, sizeof(res));
3550 for (i = 0; i < len; i++)
3551 txpower[i] = res[i][req.band_idx];
3552 } else if (category == TX_POWER_INFO_PATH) {
3553 memcpy(txpower, skb->data + 4, len);
3554 }
3555
3556 dev_kfree_skb(skb);
3557
3558 return 0;
3559 }
3560
mt7915_mcu_set_test_param(struct mt7915_dev * dev,u8 param,bool test_mode,u8 en)3561 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,
3562 u8 en)
3563 {
3564 struct {
3565 u8 test_mode_en;
3566 u8 param_idx;
3567 u8 _rsv[2];
3568
3569 u8 enable;
3570 u8 _rsv2[3];
3571
3572 u8 pad[8];
3573 } __packed req = {
3574 .test_mode_en = test_mode,
3575 .param_idx = param,
3576 .enable = en,
3577 };
3578
3579 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
3580 sizeof(req), false);
3581 }
3582
mt7915_mcu_set_sku_en(struct mt7915_phy * phy)3583 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy)
3584 {
3585 struct mt7915_dev *dev = phy->dev;
3586 struct mt7915_sku {
3587 u8 format_id;
3588 u8 sku_enable;
3589 u8 band_idx;
3590 u8 rsv;
3591 } __packed req = {
3592 .band_idx = phy->mt76->band_idx,
3593 };
3594 int ret;
3595
3596 req.sku_enable = phy->sku_limit_en;
3597 req.format_id = TX_POWER_LIMIT_ENABLE;
3598
3599 ret = mt76_mcu_send_msg(&dev->mt76,
3600 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3601 sizeof(req), true);
3602 if (ret)
3603 return ret;
3604
3605 req.sku_enable = phy->sku_path_en;
3606 req.format_id = TX_POWER_LIMIT_PATH_ENABLE;
3607
3608 return mt76_mcu_send_msg(&dev->mt76,
3609 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3610 sizeof(req), true);
3611 }
3612
mt7915_mcu_set_ser(struct mt7915_dev * dev,u8 action,u8 set,u8 band)3613 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band)
3614 {
3615 struct {
3616 u8 action;
3617 u8 set;
3618 u8 band;
3619 u8 rsv;
3620 } req = {
3621 .action = action,
3622 .set = set,
3623 .band = band,
3624 };
3625
3626 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SER_TRIGGER),
3627 &req, sizeof(req), false);
3628 }
3629
mt7915_mcu_set_txbf(struct mt7915_dev * dev,u8 action)3630 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action)
3631 {
3632 struct {
3633 u8 action;
3634 union {
3635 struct {
3636 u8 snd_mode;
3637 u8 sta_num;
3638 u8 rsv;
3639 u8 wlan_idx[4];
3640 __le32 snd_period; /* ms */
3641 } __packed snd;
3642 struct {
3643 bool ebf;
3644 bool ibf;
3645 u8 rsv;
3646 } __packed type;
3647 struct {
3648 u8 bf_num;
3649 u8 bf_bitmap;
3650 u8 bf_sel[8];
3651 u8 rsv[5];
3652 } __packed mod;
3653 };
3654 } __packed req = {
3655 .action = action,
3656 };
3657
3658 #define MT_BF_PROCESSING 4
3659 switch (action) {
3660 case MT_BF_SOUNDING_ON:
3661 req.snd.snd_mode = MT_BF_PROCESSING;
3662 break;
3663 case MT_BF_TYPE_UPDATE:
3664 req.type.ebf = true;
3665 req.type.ibf = dev->ibf;
3666 break;
3667 case MT_BF_MODULE_UPDATE:
3668 req.mod.bf_num = 2;
3669 req.mod.bf_bitmap = GENMASK(1, 0);
3670 break;
3671 default:
3672 return -EINVAL;
3673 }
3674
3675 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req,
3676 sizeof(req), true);
3677 }
3678
3679 static int
mt7915_mcu_enable_obss_spr(struct mt7915_phy * phy,u8 action,u8 val)3680 mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val)
3681 {
3682 struct mt7915_dev *dev = phy->dev;
3683 struct mt7915_mcu_sr_ctrl req = {
3684 .action = action,
3685 .argnum = 1,
3686 .band_idx = phy->mt76->band_idx,
3687 .val = cpu_to_le32(val),
3688 };
3689
3690 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3691 sizeof(req), true);
3692 }
3693
3694 static int
mt7915_mcu_set_obss_spr_pd(struct mt7915_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3695 mt7915_mcu_set_obss_spr_pd(struct mt7915_phy *phy,
3696 struct ieee80211_he_obss_pd *he_obss_pd)
3697 {
3698 struct mt7915_dev *dev = phy->dev;
3699 struct {
3700 struct mt7915_mcu_sr_ctrl ctrl;
3701 struct {
3702 u8 pd_th_non_srg;
3703 u8 pd_th_srg;
3704 u8 period_offs;
3705 u8 rcpi_src;
3706 __le16 obss_pd_min;
3707 __le16 obss_pd_min_srg;
3708 u8 resp_txpwr_mode;
3709 u8 txpwr_restrict_mode;
3710 u8 txpwr_ref;
3711 u8 rsv[3];
3712 } __packed param;
3713 } __packed req = {
3714 .ctrl = {
3715 .action = SPR_SET_PARAM,
3716 .argnum = 9,
3717 .band_idx = phy->mt76->band_idx,
3718 },
3719 };
3720 int ret;
3721 u8 max_th = 82, non_srg_max_th = 62;
3722
3723 /* disable firmware dynamical PD asjustment */
3724 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_DPD, false);
3725 if (ret)
3726 return ret;
3727
3728 if (he_obss_pd->sr_ctrl &
3729 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED)
3730 req.param.pd_th_non_srg = max_th;
3731 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT)
3732 req.param.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset;
3733 else
3734 req.param.pd_th_non_srg = non_srg_max_th;
3735
3736 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT)
3737 req.param.pd_th_srg = max_th - he_obss_pd->max_offset;
3738
3739 req.param.obss_pd_min = cpu_to_le16(82);
3740 req.param.obss_pd_min_srg = cpu_to_le16(82);
3741 req.param.txpwr_restrict_mode = 2;
3742 req.param.txpwr_ref = 21;
3743
3744 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3745 sizeof(req), true);
3746 }
3747
3748 static int
mt7915_mcu_set_obss_spr_siga(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)3749 mt7915_mcu_set_obss_spr_siga(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3750 struct ieee80211_he_obss_pd *he_obss_pd)
3751 {
3752 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3753 struct mt7915_dev *dev = phy->dev;
3754 u8 omac = mvif->mt76.omac_idx;
3755 struct {
3756 struct mt7915_mcu_sr_ctrl ctrl;
3757 struct {
3758 u8 omac;
3759 u8 rsv[3];
3760 u8 flag[20];
3761 } __packed siga;
3762 } __packed req = {
3763 .ctrl = {
3764 .action = SPR_SET_SIGA,
3765 .argnum = 1,
3766 .band_idx = phy->mt76->band_idx,
3767 },
3768 .siga = {
3769 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac,
3770 },
3771 };
3772 int ret;
3773
3774 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED)
3775 req.siga.flag[req.siga.omac] = 0xf;
3776 else
3777 return 0;
3778
3779 /* switch to normal AP mode */
3780 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_MODE, 0);
3781 if (ret)
3782 return ret;
3783
3784 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3785 sizeof(req), true);
3786 }
3787
3788 static int
mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3789 mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy *phy,
3790 struct ieee80211_he_obss_pd *he_obss_pd)
3791 {
3792 struct mt7915_dev *dev = phy->dev;
3793 struct {
3794 struct mt7915_mcu_sr_ctrl ctrl;
3795 struct {
3796 __le32 color_l[2];
3797 __le32 color_h[2];
3798 __le32 bssid_l[2];
3799 __le32 bssid_h[2];
3800 } __packed bitmap;
3801 } __packed req = {
3802 .ctrl = {
3803 .action = SPR_SET_SRG_BITMAP,
3804 .argnum = 4,
3805 .band_idx = phy->mt76->band_idx,
3806 },
3807 };
3808 u32 bitmap;
3809
3810 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap));
3811 req.bitmap.color_l[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3812
3813 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap));
3814 req.bitmap.color_h[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3815
3816 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap));
3817 req.bitmap.bssid_l[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3818
3819 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap));
3820 req.bitmap.bssid_h[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3821
3822 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3823 sizeof(req), true);
3824 }
3825
mt7915_mcu_add_obss_spr(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)3826 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3827 struct ieee80211_he_obss_pd *he_obss_pd)
3828 {
3829 int ret;
3830
3831 /* enable firmware scene detection algorithms */
3832 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_SD, sr_scene_detect);
3833 if (ret)
3834 return ret;
3835
3836 /* firmware dynamically adjusts PD threshold so skip manual control */
3837 if (sr_scene_detect && !he_obss_pd->enable)
3838 return 0;
3839
3840 /* enable spatial reuse */
3841 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE, he_obss_pd->enable);
3842 if (ret)
3843 return ret;
3844
3845 if (sr_scene_detect || !he_obss_pd->enable)
3846 return 0;
3847
3848 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_TX, true);
3849 if (ret)
3850 return ret;
3851
3852 /* set SRG/non-SRG OBSS PD threshold */
3853 ret = mt7915_mcu_set_obss_spr_pd(phy, he_obss_pd);
3854 if (ret)
3855 return ret;
3856
3857 /* Set SR prohibit */
3858 ret = mt7915_mcu_set_obss_spr_siga(phy, vif, he_obss_pd);
3859 if (ret)
3860 return ret;
3861
3862 /* set SRG BSS color/BSSID bitmap */
3863 return mt7915_mcu_set_obss_spr_bitmap(phy, he_obss_pd);
3864 }
3865
mt7915_mcu_get_rx_rate(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct rate_info * rate)3866 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3867 struct ieee80211_sta *sta, struct rate_info *rate)
3868 {
3869 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3870 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
3871 struct mt7915_dev *dev = phy->dev;
3872 struct mt76_phy *mphy = phy->mt76;
3873 struct {
3874 u8 category;
3875 u8 band;
3876 __le16 wcid;
3877 } __packed req = {
3878 .category = MCU_PHY_STATE_CONTENTION_RX_RATE,
3879 .band = mvif->mt76.band_idx,
3880 .wcid = cpu_to_le16(msta->wcid.idx),
3881 };
3882 struct ieee80211_supported_band *sband;
3883 struct mt7915_mcu_phy_rx_info *res;
3884 struct sk_buff *skb;
3885 int ret;
3886 bool cck = false;
3887
3888 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(PHY_STAT_INFO),
3889 &req, sizeof(req), true, &skb);
3890 if (ret)
3891 return ret;
3892
3893 res = (struct mt7915_mcu_phy_rx_info *)skb->data;
3894
3895 rate->mcs = res->rate;
3896 rate->nss = res->nsts + 1;
3897
3898 switch (res->mode) {
3899 case MT_PHY_TYPE_CCK:
3900 cck = true;
3901 fallthrough;
3902 case MT_PHY_TYPE_OFDM:
3903 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)
3904 sband = &mphy->sband_5g.sband;
3905 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ)
3906 sband = &mphy->sband_6g.sband;
3907 else
3908 sband = &mphy->sband_2g.sband;
3909
3910 rate->mcs = mt76_get_rate(&dev->mt76, sband, rate->mcs, cck);
3911 rate->legacy = sband->bitrates[rate->mcs].bitrate;
3912 break;
3913 case MT_PHY_TYPE_HT:
3914 case MT_PHY_TYPE_HT_GF:
3915 if (rate->mcs > 31) {
3916 ret = -EINVAL;
3917 goto out;
3918 }
3919
3920 rate->flags = RATE_INFO_FLAGS_MCS;
3921 if (res->gi)
3922 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
3923 break;
3924 case MT_PHY_TYPE_VHT:
3925 if (rate->mcs > 9) {
3926 ret = -EINVAL;
3927 goto out;
3928 }
3929
3930 rate->flags = RATE_INFO_FLAGS_VHT_MCS;
3931 if (res->gi)
3932 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
3933 break;
3934 case MT_PHY_TYPE_HE_SU:
3935 case MT_PHY_TYPE_HE_EXT_SU:
3936 case MT_PHY_TYPE_HE_TB:
3937 case MT_PHY_TYPE_HE_MU:
3938 if (res->gi > NL80211_RATE_INFO_HE_GI_3_2 || rate->mcs > 11) {
3939 ret = -EINVAL;
3940 goto out;
3941 }
3942 rate->he_gi = res->gi;
3943 rate->flags = RATE_INFO_FLAGS_HE_MCS;
3944 break;
3945 default:
3946 ret = -EINVAL;
3947 goto out;
3948 }
3949
3950 switch (res->bw) {
3951 case IEEE80211_STA_RX_BW_160:
3952 rate->bw = RATE_INFO_BW_160;
3953 break;
3954 case IEEE80211_STA_RX_BW_80:
3955 rate->bw = RATE_INFO_BW_80;
3956 break;
3957 case IEEE80211_STA_RX_BW_40:
3958 rate->bw = RATE_INFO_BW_40;
3959 break;
3960 default:
3961 rate->bw = RATE_INFO_BW_20;
3962 break;
3963 }
3964
3965 out:
3966 dev_kfree_skb(skb);
3967
3968 return ret;
3969 }
3970
mt7915_mcu_update_bss_color(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct cfg80211_he_bss_color * he_bss_color)3971 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
3972 struct cfg80211_he_bss_color *he_bss_color)
3973 {
3974 int len = sizeof(struct sta_req_hdr) + sizeof(struct bss_info_color);
3975 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3976 struct bss_info_color *bss_color;
3977 struct sk_buff *skb;
3978 struct tlv *tlv;
3979
3980 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
3981 NULL, len);
3982 if (IS_ERR(skb))
3983 return PTR_ERR(skb);
3984
3985 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BSS_COLOR,
3986 sizeof(*bss_color));
3987 bss_color = (struct bss_info_color *)tlv;
3988 bss_color->disable = !he_bss_color->enabled;
3989 bss_color->color = he_bss_color->color;
3990
3991 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3992 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
3993 }
3994
3995 #define TWT_AGRT_TRIGGER BIT(0)
3996 #define TWT_AGRT_ANNOUNCE BIT(1)
3997 #define TWT_AGRT_PROTECT BIT(2)
3998
mt7915_mcu_twt_agrt_update(struct mt7915_dev * dev,struct mt7915_vif * mvif,struct mt7915_twt_flow * flow,int cmd)3999 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
4000 struct mt7915_vif *mvif,
4001 struct mt7915_twt_flow *flow,
4002 int cmd)
4003 {
4004 struct {
4005 u8 tbl_idx;
4006 u8 cmd;
4007 u8 own_mac_idx;
4008 u8 flowid; /* 0xff for group id */
4009 __le16 peer_id; /* specify the peer_id (msb=0)
4010 * or group_id (msb=1)
4011 */
4012 u8 duration; /* 256 us */
4013 u8 bss_idx;
4014 __le64 start_tsf;
4015 __le16 mantissa;
4016 u8 exponent;
4017 u8 is_ap;
4018 u8 agrt_params;
4019 u8 rsv[23];
4020 } __packed req = {
4021 .tbl_idx = flow->table_id,
4022 .cmd = cmd,
4023 .own_mac_idx = mvif->mt76.omac_idx,
4024 .flowid = flow->id,
4025 .peer_id = cpu_to_le16(flow->wcid),
4026 .duration = flow->duration,
4027 .bss_idx = mvif->mt76.idx,
4028 .start_tsf = cpu_to_le64(flow->tsf),
4029 .mantissa = flow->mantissa,
4030 .exponent = flow->exp,
4031 .is_ap = true,
4032 };
4033
4034 if (flow->protection)
4035 req.agrt_params |= TWT_AGRT_PROTECT;
4036 if (!flow->flowtype)
4037 req.agrt_params |= TWT_AGRT_ANNOUNCE;
4038 if (flow->trigger)
4039 req.agrt_params |= TWT_AGRT_TRIGGER;
4040
4041 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE),
4042 &req, sizeof(req), true);
4043 }
4044
mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev * dev,u16 wlan_idx)4045 int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wlan_idx)
4046 {
4047 struct {
4048 __le32 cmd;
4049 __le32 arg0;
4050 __le32 arg1;
4051 __le16 arg2;
4052 } __packed req = {
4053 .cmd = cpu_to_le32(0x15),
4054 };
4055 struct mt7915_mcu_wa_tx_stat {
4056 __le16 wcid;
4057 u8 __rsv2[2];
4058
4059 /* tx_bytes is deprecated since WA byte counter uses u32,
4060 * which easily leads to overflow.
4061 */
4062 __le32 tx_bytes;
4063 __le32 tx_packets;
4064 } __packed *res;
4065 struct mt76_wcid *wcid;
4066 struct sk_buff *skb;
4067 int ret, len;
4068 u16 ret_wcid;
4069
4070 if (is_mt7915(&dev->mt76)) {
4071 req.arg0 = cpu_to_le32(wlan_idx);
4072 len = sizeof(req) - sizeof(req.arg2);
4073 } else {
4074 req.arg0 = cpu_to_le32(1);
4075 req.arg2 = cpu_to_le16(wlan_idx);
4076 len = sizeof(req);
4077 }
4078
4079 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WA_PARAM_CMD(QUERY),
4080 &req, len, true, &skb);
4081 if (ret)
4082 return ret;
4083
4084 if (!is_mt7915(&dev->mt76))
4085 skb_pull(skb, 4);
4086
4087 res = (struct mt7915_mcu_wa_tx_stat *)skb->data;
4088
4089 ret_wcid = le16_to_cpu(res->wcid);
4090 if (is_mt7915(&dev->mt76))
4091 ret_wcid &= 0xff;
4092
4093 if (ret_wcid != wlan_idx) {
4094 ret = -EINVAL;
4095 goto out;
4096 }
4097
4098 rcu_read_lock();
4099
4100 wcid = mt76_wcid_ptr(dev, wlan_idx);
4101 if (wcid)
4102 wcid->stats.tx_packets += le32_to_cpu(res->tx_packets);
4103 else
4104 ret = -EINVAL;
4105
4106 rcu_read_unlock();
4107 out:
4108 dev_kfree_skb(skb);
4109
4110 return ret;
4111 }
4112
mt7915_mcu_rf_regval(struct mt7915_dev * dev,u32 regidx,u32 * val,bool set)4113 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
4114 {
4115 struct {
4116 __le32 idx;
4117 __le32 ofs;
4118 __le32 data;
4119 } __packed req = {
4120 .idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 24))),
4121 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))),
4122 .data = set ? cpu_to_le32(*val) : 0,
4123 };
4124 struct sk_buff *skb;
4125 int ret;
4126
4127 if (set)
4128 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_REG_ACCESS),
4129 &req, sizeof(req), false);
4130
4131 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(RF_REG_ACCESS),
4132 &req, sizeof(req), true, &skb);
4133 if (ret)
4134 return ret;
4135
4136 *val = le32_to_cpu(*(__le32 *)(skb->data + 8));
4137 dev_kfree_skb(skb);
4138
4139 return 0;
4140 }
4141