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Searched defs:RC1 (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp340 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1), &RC2 = CM.lookup(VR2); in operator ()() local
357 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1); in operator ()() local
H A DHexagonBitSimplify.cpp342 bool HexagonBitSimplify::isEqual(const BitTracker::RegisterCell &RC1, in isEqual()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegAllocFast.cpp1342 const TargetRegisterClass &RC1 = *MRI->getRegClass(Reg1); in findAndSortDefOperandIndexes() local
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp864 auto RC1 = MRI.getRegClass(SrcReg1); in PPCEmitCmp() local
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.cpp2256 CodeGenRegisterClass *RC1 = RC; in inferCommonSubClass() local
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dscorpion_reg_map.h1142 volatile u_int32_t RC1[118]; /* 0x1200 - 0x13d8 */ member
H A Dosprey_reg_map.h1907 volatile u_int32_t RC1[118]; /* 0x11200 - 0x113d8 */ member