/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerCombiner.cpp | 333 Register PtrReg = Store.getPointerReg(); in applySplitStoreZero128() local 727 Register PtrReg = St->getPointerReg(); in optimizeConsecutiveMemOpAddressing() local
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H A D | AArch64InstructionSelector.cpp | 2924 const Register PtrReg = LdSt.getPointerReg(); in select() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUCallLowering.cpp | 430 Register PtrReg = B.getMRI()->createGenericVirtualRegister(PtrTy); in lowerParameter() local 561 Register PtrReg = MRI.createGenericVirtualRegister(ConstPtrTy); in lowerFormalArgumentsKernel() local
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H A D | AMDGPURegisterBankInfo.cpp | 1089 Register PtrReg = MI.getOperand(1).getReg(); in applyMappingLoad() local 3431 Register PtrReg = MI.getOperand(0).getReg(); in applyMappingImpl() local 3648 Register PtrReg = MI.getOperand(1).getReg(); in getInstrMappingForLoad() local
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H A D | AMDGPULegalizerInfo.cpp | 3070 Register PtrReg = MI.getOperand(1).getReg(); in legalizeLoad() local 3198 Register PtrReg = MI.getOperand(1).getReg(); in legalizeAtomicCmpXChg() local
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H A D | AMDGPUInstructionSelector.cpp | 4269 Register PtrReg = GEPInfo.SgprParts[0]; in selectSmrdImm32() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVInstructionSelector.cpp | 759 Register PtrReg = Op.getReg(); in replacePtrWithInt() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
H A D | SPIRVGlobalRegistry.cpp | 1079 unsigned SPIRVGlobalRegistry::getPointeeTypeOp(Register PtrReg) { in getPointeeTypeOp()
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H A D | SPIRVInstructionSelector.cpp | 2069 Register PtrReg = I.getOperand(I.getNumExplicitDefs() + 2).getReg(); in selectIntrinsic() local
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H A D | SPIRVBuiltins.cpp | 851 Register PtrReg = Call->Arguments[0]; in buildAtomicFloatingRMWInst() local
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 1376 Register PtrReg = LoadMI.getPointerReg(); in narrowScalar() local 3472 Register PtrReg = LoadMI.getPointerReg(); in lowerLoad() local 3614 Register PtrReg = StoreMI.getPointerReg(); in lowerStore() local
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H A D | CombinerHelper.cpp | 921 Register PtrReg = LoadMI->getPointerReg(); in matchCombineLoadWithAndMask() local 2433 MachineInstr &MI, std::pair<Register, bool> &PtrReg) { in matchCombineAddP2IToPtrAdd() 2458 MachineInstr &MI, std::pair<Register, bool> &PtrReg) { in applyCombineAddP2IToPtrAdd()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 5184 unsigned PtrReg = Use64BitPtr ? X86::RAX : X86::EAX; in Select() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 12267 Register PtrReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local 13279 Register PtrReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
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