1 /*- 2 * Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 */ 30 31 #ifndef _BHND_PWRCTL_BHND_PWRCTLVAR_H_ 32 #define _BHND_PWRCTL_BHND_PWRCTLVAR_H_ 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/queue.h> 37 38 #include <dev/bhnd/bhnd.h> 39 40 uint32_t bhnd_pwrctl_clock_rate(uint32_t pll_type, uint32_t n, 41 uint32_t m); 42 43 bus_size_t bhnd_pwrctl_si_clkreg_m(const struct bhnd_chipid *cid, 44 uint8_t pll_type, uint32_t *fixed_hz); 45 uint32_t bhnd_pwrctl_si_clock_rate(const struct bhnd_chipid *cid, 46 uint32_t pll_type, uint32_t n, uint32_t m); 47 48 bus_size_t bhnd_pwrctl_cpu_clkreg_m(const struct bhnd_chipid *cid, 49 uint8_t pll_type, uint32_t *fixed_hz); 50 uint32_t bhnd_pwrctl_cpu_clock_rate(const struct bhnd_chipid *cid, 51 uint32_t pll_type, uint32_t n, uint32_t m); 52 53 /** 54 * bhnd pwrctl device quirks. 55 */ 56 enum { 57 /** No quirks */ 58 PWRCTL_QUIRK_NONE = 0, 59 60 /** 61 * Early ChipCommon revisions do not support dynamic clock control 62 */ 63 PWRCTL_QUIRK_FIXED_CLK = (1 << 0), 64 65 /** 66 * On PCI (not PCIe) devices, early ChipCommon revisions 67 * (rev <= 5) vend xtal/pll and clock config registers via the PCI 68 * config space. 69 * 70 * Dynamic clock control is not supported on these devices. 71 */ 72 PWRCTL_QUIRK_PCICLK_CTL = (1 << 1) | PWRCTL_QUIRK_FIXED_CLK, 73 74 /** 75 * On earliy BCM4311, BCM4321, and BCM4716 PCI(e) devices, no ALP 76 * clock is available, and the HT clock must be enabled. 77 */ 78 PWRCTL_QUIRK_FORCE_HT = (1 << 2), 79 80 /** 81 * ChipCommon revisions 6-9 use the slowclk register layout. 82 */ 83 PWRCTL_QUIRK_SLOWCLK_CTL = (1 << 3), 84 85 /** 86 * ChipCommon revisions 10-19 support the instaclk register layout. 87 */ 88 PWRCTL_QUIRK_INSTACLK_CTL = (1 << 4), 89 90 }; 91 92 /** 93 * device clock reservation. 94 */ 95 struct bhnd_pwrctl_clkres { 96 device_t owner; /**< bhnd(4) device holding this reservation */ 97 bhnd_clock clock; /**< requested clock */ 98 STAILQ_ENTRY(bhnd_pwrctl_clkres) cr_link; 99 }; 100 101 /** 102 * bhnd pwrctl driver instance state. 103 */ 104 struct bhnd_pwrctl_softc { 105 device_t dev; 106 uint32_t quirks; 107 108 device_t chipc_dev; /**< core device */ 109 struct bhnd_resource *res; /**< core register block. */ 110 111 struct mtx mtx; /**< state mutex */ 112 113 /** active clock reservations */ 114 STAILQ_HEAD(, bhnd_pwrctl_clkres) clkres_list; 115 }; 116 117 #define PWRCTL_LOCK_INIT(sc) \ 118 mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \ 119 "bhnd pwrctl driver lock", MTX_DEF) 120 #define PWRCTL_LOCK(sc) mtx_lock(&(sc)->mtx) 121 #define PWRCTL_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 122 #define PWRCTL_LOCK_ASSERT(sc, what) mtx_assert(&(sc)->mtx, what) 123 #define PWRCTL_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx) 124 125 /* quirk convenience macro */ 126 #define PWRCTL_QUIRK(_sc, _name) \ 127 ((_sc)->quirks & PWRCTL_QUIRK_ ## _name) 128 129 #define PWRCTL_ASSERT_QUIRK(_sc, name) \ 130 KASSERT(PWRCTL_QUIRK((_sc), name), ("quirk " __STRING(_name) " not set")) 131 132 #endif /* _BHND_PWRCTL_BHND_PWRCTLVAR_H_ */ 133