1 //===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file describes the PowerPC branch predicates. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H 14 #define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H 15 16 // GCC #defines PPC on Linux but we use it as our namespace name 17 #undef PPC 18 19 // Generated files will use "namespace PPC". To avoid symbol clash, 20 // undefine PPC here. PPC may be predefined on some hosts. 21 #undef PPC 22 23 namespace llvm { 24 namespace PPC { 25 /// Predicate - These are "(BI << 5) | BO" for various predicates. 26 enum Predicate { 27 PRED_LT = (0 << 5) | 12, 28 PRED_LE = (1 << 5) | 4, 29 PRED_EQ = (2 << 5) | 12, 30 PRED_GE = (0 << 5) | 4, 31 PRED_GT = (1 << 5) | 12, 32 PRED_NE = (2 << 5) | 4, 33 PRED_UN = (3 << 5) | 12, 34 PRED_NU = (3 << 5) | 4, 35 PRED_LT_MINUS = (0 << 5) | 14, 36 PRED_LE_MINUS = (1 << 5) | 6, 37 PRED_EQ_MINUS = (2 << 5) | 14, 38 PRED_GE_MINUS = (0 << 5) | 6, 39 PRED_GT_MINUS = (1 << 5) | 14, 40 PRED_NE_MINUS = (2 << 5) | 6, 41 PRED_UN_MINUS = (3 << 5) | 14, 42 PRED_NU_MINUS = (3 << 5) | 6, 43 PRED_LT_PLUS = (0 << 5) | 15, 44 PRED_LE_PLUS = (1 << 5) | 7, 45 PRED_EQ_PLUS = (2 << 5) | 15, 46 PRED_GE_PLUS = (0 << 5) | 7, 47 PRED_GT_PLUS = (1 << 5) | 15, 48 PRED_NE_PLUS = (2 << 5) | 7, 49 PRED_UN_PLUS = (3 << 5) | 15, 50 PRED_NU_PLUS = (3 << 5) | 7, 51 52 // SPE scalar compare instructions always set the GT bit. 53 PRED_SPE = PRED_GT, 54 55 // When dealing with individual condition-register bits, we have simple set 56 // and unset predicates. 57 PRED_BIT_SET = 1024, 58 PRED_BIT_UNSET = 1025 59 }; 60 61 // Bit for branch taken (plus) or not-taken (minus) hint 62 enum BranchHintBit { 63 BR_NO_HINT = 0x0, 64 BR_NONTAKEN_HINT = 0x2, 65 BR_TAKEN_HINT = 0x3, 66 BR_HINT_MASK = 0X3 67 }; 68 69 /// Invert the specified predicate. != -> ==, < -> >=. 70 Predicate InvertPredicate(Predicate Opcode); 71 72 /// Assume the condition register is set by MI(a,b), return the predicate if 73 /// we modify the instructions such that condition register is set by MI(b,a). 74 Predicate getSwappedPredicate(Predicate Opcode); 75 76 /// Return the condition without hint bits. getPredicateCondition(Predicate Opcode)77 inline unsigned getPredicateCondition(Predicate Opcode) { 78 return (unsigned)(Opcode & ~BR_HINT_MASK); 79 } 80 81 /// Return the hint bits of the predicate. getPredicateHint(Predicate Opcode)82 inline unsigned getPredicateHint(Predicate Opcode) { 83 return (unsigned)(Opcode & BR_HINT_MASK); 84 } 85 86 /// Return predicate consisting of specified condition and hint bits. getPredicate(unsigned Condition,unsigned Hint)87 inline Predicate getPredicate(unsigned Condition, unsigned Hint) { 88 return (Predicate)((Condition & ~BR_HINT_MASK) | 89 (Hint & BR_HINT_MASK)); 90 } 91 } 92 } 93 94 #endif 95