xref: /linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1 /*
2  * Copyright 2021 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 #ifndef SMU_13_0_6_PPSMC_H
24 #define SMU_13_0_6_PPSMC_H
25 
26 // SMU Response Codes:
27 #define PPSMC_Result_OK                             0x1
28 #define PPSMC_Result_Failed                         0xFF
29 #define PPSMC_Result_UnknownCmd                     0xFE
30 #define PPSMC_Result_CmdRejectedPrereq              0xFD
31 #define PPSMC_Result_CmdRejectedBusy                0xFC
32 
33 // Message Definitions:
34 #define PPSMC_MSG_TestMessage                       0x1
35 #define PPSMC_MSG_GetSmuVersion                     0x2
36 #define PPSMC_MSG_GfxDriverReset                    0x3
37 #define PPSMC_MSG_GetDriverIfVersion                0x4
38 #define PPSMC_MSG_EnableAllSmuFeatures              0x5
39 #define PPSMC_MSG_DisableAllSmuFeatures             0x6
40 #define PPSMC_MSG_RequestI2cTransaction             0x7
41 #define PPSMC_MSG_GetMetricsVersion                 0x8
42 #define PPSMC_MSG_GetMetricsTable                   0x9
43 #define PPSMC_MSG_GetEccInfoTable                   0xA
44 #define PPSMC_MSG_GetEnabledSmuFeaturesLow          0xB
45 #define PPSMC_MSG_GetEnabledSmuFeaturesHigh         0xC
46 #define PPSMC_MSG_SetDriverDramAddrHigh             0xD
47 #define PPSMC_MSG_SetDriverDramAddrLow              0xE
48 #define PPSMC_MSG_SetToolsDramAddrHigh              0xF
49 #define PPSMC_MSG_SetToolsDramAddrLow               0x10
50 #define PPSMC_MSG_SetSystemVirtualDramAddrHigh      0x11
51 #define PPSMC_MSG_SetSystemVirtualDramAddrLow       0x12
52 #define PPSMC_MSG_SetSoftMinByFreq                  0x13
53 #define PPSMC_MSG_SetSoftMaxByFreq                  0x14
54 #define PPSMC_MSG_GetMinDpmFreq                     0x15
55 #define PPSMC_MSG_GetMaxDpmFreq                     0x16
56 #define PPSMC_MSG_GetDpmFreqByIndex                 0x17
57 #define PPSMC_MSG_SetPptLimit                       0x18
58 #define PPSMC_MSG_GetPptLimit                       0x19
59 #define PPSMC_MSG_DramLogSetDramAddrHigh            0x1A
60 #define PPSMC_MSG_DramLogSetDramAddrLow             0x1B
61 #define PPSMC_MSG_DramLogSetDramSize                0x1C
62 #define PPSMC_MSG_GetDebugData                      0x1D
63 #define PPSMC_MSG_HeavySBR                          0x1E
64 #define PPSMC_MSG_SetNumBadHbmPagesRetired          0x1F
65 #define PPSMC_MSG_DFCstateControl                   0x20
66 #define PPSMC_MSG_GetGmiPwrDnHyst                   0x21
67 #define PPSMC_MSG_SetGmiPwrDnHyst                   0x22
68 #define PPSMC_MSG_GmiPwrDnControl                   0x23
69 #define PPSMC_MSG_EnterGfxoff                       0x24
70 #define PPSMC_MSG_ExitGfxoff                        0x25
71 #define PPSMC_MSG_EnableDeterminism                 0x26
72 #define PPSMC_MSG_DisableDeterminism                0x27
73 #define PPSMC_MSG_DumpSTBtoDram                     0x28
74 #define PPSMC_MSG_STBtoDramLogSetDramAddrHigh       0x29
75 #define PPSMC_MSG_STBtoDramLogSetDramAddrLow        0x2A
76 #define PPSMC_MSG_STBtoDramLogSetDramSize           0x2B
77 #define PPSMC_MSG_SetSystemVirtualSTBtoDramAddrHigh 0x2C
78 #define PPSMC_MSG_SetSystemVirtualSTBtoDramAddrLow  0x2D
79 #define PPSMC_MSG_GfxDriverResetRecovery            0x2E
80 #define PPSMC_MSG_TriggerVFFLR                      0x2F
81 #define PPSMC_MSG_SetSoftMinGfxClk                  0x30
82 #define PPSMC_MSG_SetSoftMaxGfxClk                  0x31
83 #define PPSMC_MSG_GetMinGfxDpmFreq                  0x32
84 #define PPSMC_MSG_GetMaxGfxDpmFreq                  0x33
85 #define PPSMC_MSG_PrepareForDriverUnload            0x34
86 #define PPSMC_MSG_ReadThrottlerLimit                0x35
87 #define PPSMC_MSG_QueryValidMcaCount                0x36
88 #define PPSMC_MSG_McaBankDumpDW                     0x37
89 #define PPSMC_MSG_GetCTFLimit                       0x38
90 #define PPSMC_MSG_ClearMcaOnRead                    0x39
91 #define PPSMC_MSG_QueryValidMcaCeCount              0x3A
92 #define PPSMC_MSG_McaBankCeDumpDW                   0x3B
93 #define PPSMC_MSG_SelectPLPDMode                    0x40
94 #define PPSMC_MSG_RmaDueToBadPageThreshold          0x43
95 #define PPSMC_MSG_SelectPstatePolicy                0x44
96 #define PPSMC_Message_Count                         0x45
97 
98 //PPSMC Reset Types for driver msg argument
99 #define PPSMC_RESET_TYPE_DRIVER_MODE_1_RESET        0x1
100 #define PPSMC_RESET_TYPE_DRIVER_MODE_2_RESET	      0x2
101 #define PPSMC_RESET_TYPE_DRIVER_MODE_3_RESET        0x3
102 
103 //PPSMC Reset Types for driver msg argument
104 #define PPSMC_THROTTLING_LIMIT_TYPE_SOCKET          0x1
105 #define PPSMC_THROTTLING_LIMIT_TYPE_HBM             0x2
106 
107 //CTF/Throttle Limit types
108 #define PPSMC_AID_THM_TYPE                          0x1
109 #define PPSMC_CCD_THM_TYPE                          0x2
110 #define PPSMC_XCD_THM_TYPE                          0x3
111 #define PPSMC_HBM_THM_TYPE                          0x4
112 
113 //PLPD modes
114 #define PPSMC_PLPD_MODE_DEFAULT                     0x1
115 #define PPSMC_PLPD_MODE_OPTIMIZED                   0x2
116 
117 typedef uint32_t PPSMC_Result;
118 typedef uint32_t PPSMC_MSG;
119 
120 #endif
121