xref: /freebsd/sys/arm/mv/mvebu_pinctrl.c (revision 62e8ccc3a489434af379c7f47da71545bc1e14ee)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/bus.h>
31 
32 #include <sys/kernel.h>
33 #include <sys/module.h>
34 #include <sys/rman.h>
35 #include <sys/lock.h>
36 #include <sys/mutex.h>
37 
38 #include <machine/bus.h>
39 #include <machine/resource.h>
40 #include <machine/intr.h>
41 
42 #include <dev/syscon/syscon.h>
43 
44 #include <dev/fdt/fdt_pinctrl.h>
45 
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
48 
49 #include "syscon_if.h"
50 
51 #define	PINS_PER_REG	8
52 #define	BITS_PER_PIN	4
53 #define	PINS_MASK	0xf
54 #define	MAX_PIN_FUNC	5
55 
56 struct mv_pins {
57 	const char	*name;
58 	const char	*functions[MAX_PIN_FUNC];
59 };
60 
61 struct mv_padconf {
62 	const struct mv_pins	*pins;
63 	size_t		npins;
64 };
65 
66 const static struct mv_pins ap806_pins[] = {
67 	{"mpp0", {"gpio", "sdio", NULL, "spi0"}},
68 	{"mpp1", {"gpio", "sdio", NULL, "spi0"}},
69 	{"mpp2", {"gpio", "sdio", NULL, "spi0"}},
70 	{"mpp3", {"gpio", "sdio", NULL, "spi0"}},
71 	{"mpp4", {"gpio", "sdio", NULL, "i2c0"}},
72 	{"mpp5", {"gpio", "sdio", NULL, "i2c0"}},
73 	{"mpp6", {"gpio", "sdio", NULL, NULL}},
74 	{"mpp7", {"gpio", "sdio", NULL, "uart1"}},
75 	{"mpp8", {"gpio", "sdio", NULL, "uart1"}},
76 	{"mpp9", {"gpio", "sdio", NULL, "spi0"}},
77 	{"mpp10", {"gpio", "sdio", NULL, NULL}},
78 	{"mpp11", {"gpio", NULL, NULL, "uart0"}},
79 	{"mpp12", {"gpio", "sdio", "sdio", NULL}},
80 	{"mpp13", {"gpio", NULL, NULL}},
81 	{"mpp14", {"gpio", NULL, NULL}},
82 	{"mpp15", {"gpio", NULL, NULL}},
83 	{"mpp16", {"gpio", NULL, NULL}},
84 	{"mpp17", {"gpio", NULL, NULL}},
85 	{"mpp18", {"gpio", NULL, NULL}},
86 	{"mpp19", {"gpio", NULL, NULL, "uart0", "sdio"}},
87 };
88 
89 const struct mv_padconf ap806_padconf = {
90 	.npins = nitems(ap806_pins),
91 	.pins = ap806_pins,
92 };
93 
94 struct mv_pinctrl_softc {
95 	device_t		dev;
96 	struct syscon		*syscon;
97 
98 	struct mv_padconf	*padconf;
99 };
100 
101 static struct ofw_compat_data compat_data[] = {
102 	{"marvell,ap806-pinctrl", (uintptr_t)&ap806_padconf},
103 	{NULL,             0}
104 };
105 
106 #define	RD4(sc, reg)		SYSCON_READ_4((sc)->syscon, (reg))
107 #define	WR4(sc, reg, val)	SYSCON_WRITE_4((sc)->syscon, (reg), (val))
108 
109 static void
mv_pinctrl_configure_pin(struct mv_pinctrl_softc * sc,uint32_t pin,uint32_t function)110 mv_pinctrl_configure_pin(struct mv_pinctrl_softc *sc, uint32_t pin,
111     uint32_t function)
112 {
113 	uint32_t offset, shift, reg;
114 
115 	offset = (pin / PINS_PER_REG) * BITS_PER_PIN;
116 	shift = (pin % PINS_PER_REG) * BITS_PER_PIN;
117 	reg = RD4(sc, offset);
118 	reg &= ~(PINS_MASK << shift);
119 	reg |= function << shift;
120 	WR4(sc, offset, reg);
121 }
122 
123 static int
mv_pinctrl_configure_pins(device_t dev,phandle_t cfgxref)124 mv_pinctrl_configure_pins(device_t dev, phandle_t cfgxref)
125 {
126 	struct mv_pinctrl_softc *sc;
127 	phandle_t node;
128 	char *function;
129 	const char **pins;
130 	int i, pin_num, pin_func, npins;
131 
132 	sc = device_get_softc(dev);
133 	node = OF_node_from_xref(cfgxref);
134 
135 	if (OF_getprop_alloc(node, "marvell,function",
136 	    (void **)&function) == -1)
137 		return (ENOMEM);
138 
139 	npins = ofw_bus_string_list_to_array(node, "marvell,pins", &pins);
140 	if (npins == -1)
141 		return (ENOMEM);
142 
143 	for (i = 0; i < npins; i++) {
144 		for (pin_num = 0; pin_num < sc->padconf->npins; pin_num++) {
145 			if (strcmp(pins[i], sc->padconf->pins[pin_num].name) == 0)
146 				break;
147 		}
148 		if (pin_num == sc->padconf->npins)
149 			continue;
150 
151 		for (pin_func = 0; pin_func < MAX_PIN_FUNC; pin_func++)
152 			if (sc->padconf->pins[pin_num].functions[pin_func] &&
153 			    strcmp(function, sc->padconf->pins[pin_num].functions[pin_func]) == 0)
154 				break;
155 
156 		if (pin_func == MAX_PIN_FUNC)
157 			continue;
158 
159 		mv_pinctrl_configure_pin(sc, pin_num, pin_func);
160 	}
161 
162 	OF_prop_free(pins);
163 
164 	return (0);
165 }
166 
167 static int
mv_pinctrl_probe(device_t dev)168 mv_pinctrl_probe(device_t dev)
169 {
170 
171 	if (!ofw_bus_status_okay(dev))
172 		return (ENXIO);
173 
174 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
175 		return (ENXIO);
176 
177 	device_set_desc(dev, "Marvell Pinctrl controller");
178 	return (BUS_PROBE_DEFAULT);
179 }
180 
181 static int
mv_pinctrl_attach(device_t dev)182 mv_pinctrl_attach(device_t dev)
183 {
184 	struct mv_pinctrl_softc *sc;
185 
186 	sc = device_get_softc(dev);
187 	sc->dev = dev;
188 	sc->padconf = (struct mv_padconf *)
189 	    ofw_bus_search_compatible(dev,compat_data)->ocd_data;
190 
191 	if (SYSCON_GET_HANDLE(sc->dev, &sc->syscon) != 0 ||
192 	    sc->syscon == NULL) {
193 		device_printf(dev, "cannot get syscon for device\n");
194 		return (ENXIO);
195 	}
196 
197 	fdt_pinctrl_register(dev, "marvell,pins");
198 	fdt_pinctrl_configure_tree(dev);
199 
200 	return (0);
201 }
202 
203 static int
mv_pinctrl_detach(device_t dev)204 mv_pinctrl_detach(device_t dev)
205 {
206 
207 	return (EBUSY);
208 }
209 
210 static device_method_t mv_pinctrl_methods[] = {
211 	/* Device interface */
212 	DEVMETHOD(device_probe,		mv_pinctrl_probe),
213 	DEVMETHOD(device_attach,	mv_pinctrl_attach),
214 	DEVMETHOD(device_detach,	mv_pinctrl_detach),
215 
216         /* fdt_pinctrl interface */
217 	DEVMETHOD(fdt_pinctrl_configure,mv_pinctrl_configure_pins),
218 
219 	DEVMETHOD_END
220 };
221 
222 static driver_t mv_pinctrl_driver = {
223 	"mv_pinctrl",
224 	mv_pinctrl_methods,
225 	sizeof(struct mv_pinctrl_softc),
226 };
227 
228 EARLY_DRIVER_MODULE(mv_pinctrl, simplebus, mv_pinctrl_driver, 0, 0,
229     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
230