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Searched defs:Orders (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp738 ProcessSDDbgValues(SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter, in ProcessSDDbgValues()
786 SmallVectorImpl<std::pair<unsigned, MachineInstr *>> &Orders, in ProcessSourceNode()
856 SmallVector<std::pair<unsigned, MachineInstr*>, 32> Orders; in EmitSchedule() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DInlineSpiller.cpp1409 SmallVectorImpl<MachineDomTreeNode *> &Orders, in getVisitOrders()
1497 SmallVector<MachineDomTreeNode *, 32> Orders; in runHoistSpills() local
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DConstantHoisting.cpp259 SmallVector<BasicBlock *, 16> Orders; in findBestInsertionSet() local
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.h317 std::vector<SmallVector<Record *, 16>> Orders; variable
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp4827 llvm::AtomicOrdering Orders[5] = { in EmitBuiltinExpr() local
4892 llvm::AtomicOrdering Orders[3] = { in EmitBuiltinExpr() local