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Searched defs:Ops (Results 1 – 25 of 213) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp1642 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1652 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1683 SDValue Ops[]= { Base, getAL(CurDAG, SDLoc(N)), in tryT1IndexedLoad() local
1731 SDValue Ops[]= { Base, Offset, getAL(CurDAG, SDLoc(N)), in tryT2IndexedLoad() local
1827 SDValue Ops[] = {Base, in tryMVEIndexedLoad() local
1850 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createGPRPairNode() local
1861 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createSRegPairNode() local
1872 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createDRegPairNode() local
1883 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createQRegPairNode() local
1897 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadSRegsNode() local
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/
H A DRISCV.cpp34 Intrinsic::ID ID, SmallVectorImpl<Value *> &Ops, in emitRVVVLEFFBuiltin()
71 Intrinsic::ID ID, SmallVectorImpl<Value *> &Ops, in emitRVVVSSEBuiltin()
94 llvm::Type *ResultType, Intrinsic::ID ID, SmallVectorImpl<Value *> &Ops, in emitRVVIndexedStoreBuiltin()
121 Intrinsic::ID ID, SmallVectorImpl<Value *> &Ops, in emitRVVPseudoUnaryBuiltin()
151 Intrinsic::ID ID, SmallVectorImpl<Value *> &Ops, in emitRVVPseudoVNotBuiltin()
181 Intrinsic::ID ID, SmallVectorImpl<Value *> &Ops, in emitRVVPseudoMaskBuiltin()
195 llvm::Type *ResultType, Intrinsic::ID ID, SmallVectorImpl<Value *> &Ops, in emitRVVPseudoVFUnaryBuiltin()
222 Intrinsic::ID ID, SmallVectorImpl<Value *> &Ops, in emitRVVPseudoVWCVTBuiltin()
252 Intrinsic::ID ID, SmallVectorImpl<Value *> &Ops, in emitRVVPseudoVNCVTBuiltin()
284 Intrinsic::ID ID, SmallVectorImpl<Value *> &Ops, in emitRVVVlenbBuiltin()
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H A DARM.cpp427 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, in EmitNeonCall()
450 SmallVectorImpl<Value *> &Ops, in EmitFP8NeonCall()
460 SmallVectorImpl<llvm::Value *> &Ops, const CallExpr *E, const char *name) { in EmitFP8NeonFDOTCall()
476 SmallVectorImpl<llvm::Value *> &Ops, const CallExpr *E, const char *name) { in EmitFP8NeonFMLACall()
497 SmallVectorImpl<llvm::Value *> &Ops, in EmitFP8NeonCvtCall()
1680 SmallVectorImpl<Value *> &Ops, const CallExpr *E) { in EmitCommonNeonSISDBuiltinExpr()
1743 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1, in EmitCommonNeonBuiltinExpr()
2469 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, in packTBLDVectorList()
2571 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; in EmitSpecialRegisterBuiltin() local
2739 Value *Ops[2]; in EmitARMBuiltinExpr() local
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H A DX86.cpp78 static Value *EmitX86MaskedStore(CodeGenFunction &CGF, ArrayRef<Value *> Ops, in EmitX86MaskedStore()
89 static Value *EmitX86MaskedLoad(CodeGenFunction &CGF, ArrayRef<Value *> Ops, in EmitX86MaskedLoad()
101 ArrayRef<Value *> Ops) { in EmitX86ExpandLoad()
114 ArrayRef<Value *> Ops, in EmitX86CompressExpand()
127 ArrayRef<Value *> Ops) { in EmitX86CompressStore()
139 ArrayRef<Value *> Ops, in EmitX86MaskLogic()
170 static Value *EmitX86vpcom(CodeGenFunction &CGF, ArrayRef<Value *> Ops, in EmitX86vpcom()
262 bool Signed, ArrayRef<Value *> Ops) { in EmitX86MaskedCompare()
302 ArrayRef<Value *> Ops, bool IsSigned) { in EmitX86ConvertIntToFp()
323 ArrayRef<Value *> Ops, unsigned BuiltinID, in EmitX86FMAExpr()
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/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DMDBuilder.cpp76 SmallVector<Metadata *, 8> Ops; in createFunctionEntryCount() local
113 SmallVector<Metadata *, 4> Ops; in createCallees() local
122 SmallVector<Metadata *, 4> Ops; in createCallbackEncoding() local
146 SmallVector<Metadata *, 4> Ops; in mergeCallbackEncodings() local
168 SmallVector<Metadata *, 4> Ops; in createRTTIPointerPrologue() local
175 SmallVector<Metadata *, 2> Ops; in createPCSections() local
254 SmallVector<Metadata *, 4> Ops(Fields.size() * 2 + 1); in createTBAAStructTypeNode() local
289 SmallVector<Metadata *, 4> Ops(3 + Fields.size() * 3); in createTBAATypeNode() local
354 SmallVector<Metadata *, 3> Ops(3); in createPseudoProbeDesc() local
364 SmallVector<Metadata *, 4> Ops(LLVMStats.size() * 2); in createLLVMStats() local
H A DDebugInfoMetadata.cpp118 SmallVector<Metadata *, 2> Ops; in getImpl() local
632 ArrayRef<Metadata *> Ops) in DISubrange()
657 Metadata *Ops[] = {CountNode, LB, UB, Stride}; in getImpl() local
745 ArrayRef<Metadata *> Ops) in DIGenericSubrange()
755 Metadata *Ops[] = {CountNode, LB, UB, Stride}; in getImpl() local
829 DIFlags Flags, ArrayRef<Metadata *> Ops) in DISubrangeType()
842 Metadata *Ops[] = {File, Scope, Name, SizeInBits, nullptr, in getImpl() local
869 ArrayRef<Metadata *> Ops) in DIEnumerator()
879 Metadata *Ops[] = {Name}; in getImpl() local
891 Metadata *Ops[] = {nullptr, nullptr, Name, SizeInBits, nullptr}; in getImpl() local
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H A DDIExpressionOptimizer.cpp194 ArrayRef<DIExpression::ExprOperand> Ops, in tryFoldNoOpMath()
210 ArrayRef<DIExpression::ExprOperand> Ops, in tryFoldConstants()
235 ArrayRef<DIExpression::ExprOperand> Ops, in tryFoldCommutativeMath()
263 uint64_t Const1, ArrayRef<DIExpression::ExprOperand> Ops, uint64_t &Loc, in tryFoldCommutativeMathWithArgInBetween()
294 SmallVector<DIExpression::ExprOperand, 8> Ops; in foldConstantMath() local
H A DIRBuilder.cpp106 IRBuilderBase::createCallHelper(Function *Callee, ArrayRef<Value *> Ops, in createCallHelper()
168 Value *Ops[] = {Ptr, Val, Size, getInt1(isVolatile)}; in CreateMemSet() local
183 Value *Ops[] = {Dst, Val, Size, getInt1(IsVolatile)}; in CreateMemSetInline() local
198 Value *Ops[] = {Ptr, Val, Size, getInt32(ElementSize)}; in CreateElementUnorderedAtomicMemSet() local
217 Value *Ops[] = {Dst, Src, Size, getInt1(isVolatile)}; in CreateMemTransferInst() local
238 Value *Ops[] = {Dst, Src, Size, getInt32(ElementSize)}; in CreateElementUnorderedAtomicMemCpy() local
337 Value *Ops[] = {Dst, Src, Size, getInt32(ElementSize)}; in CreateElementUnorderedAtomicMemMove() local
351 Value *Ops[] = {Src}; in getReductionIntrinsic() local
357 Value *Ops[] = {Acc, Src}; in CreateFAddReduce() local
362 Value *Ops[] = {Acc, Src}; in CreateFMulReduce() local
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H A DProfileSummary.cpp29 Metadata *Ops[2] = {MDString::get(Context, Key), in getKeyValMD() local
37 Metadata *Ops[2] = {MDString::get(Context, Key), in getKeyFPValMD() local
46 Metadata *Ops[2] = {MDString::get(Context, Key), MDString::get(Context, Val)}; in getKeyValMD() local
66 Metadata *Ops[2] = {MDString::get(Context, "DetailedSummary"), in getDetailedSummaryMD() local
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DMatrixBuilder.h71 Value *Ops[] = {DataPtr, Stride, B.getInt1(IsVolatile), B.getInt32(Rows), variable
93 Value *Ops[] = {Matrix, Ptr, variable
117 Value *Ops[] = {Matrix, B.getInt32(Rows), B.getInt32(Columns)}; variable
135 Value *Ops[] = {LHS, RHS, B.getInt32(LHSRows), B.getInt32(LHSColumns), variable
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCSEMIRBuilder.h65 void profileDstOps(ArrayRef<DstOp> Ops, GISelInstProfileBuilder &B) const { in profileDstOps()
72 void profileSrcOps(ArrayRef<SrcOp> Ops, GISelInstProfileBuilder &B) const { in profileSrcOps()
/freebsd/contrib/llvm-project/llvm/lib/FuzzMutate/
H A DOperations.cpp18 void llvm::describeFuzzerIntOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerIntOps()
45 void llvm::describeFuzzerFloatOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerFloatOps()
71 std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerUnaryOperations()
76 std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerControlFlowOps()
80 void llvm::describeFuzzerOtherOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerOtherOps()
84 void llvm::describeFuzzerPointerOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerPointerOps()
89 std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerAggregateOps()
94 void llvm::describeFuzzerVectorOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerVectorOps()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineNegator.cpp113 std::array<Value *, 2> Ops{I->getOperand(0), I->getOperand(1)}; in getSortedOperandsOfBinOp() local
165 std::array<Value *, 2> Ops = getSortedOperandsOfBinOp(I); in visitImpl() local
420 std::array<Value *, 2> Ops = getSortedOperandsOfBinOp(I); in visitImpl() local
458 std::array<Value *, 2> Ops = getSortedOperandsOfBinOp(I); in visitImpl() local
471 std::array<Value *, 2> Ops = getSortedOperandsOfBinOp(I); in visitImpl() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenCommonISel.cpp227 SmallVectorImpl<uint64_t> &Ops) { in getSalvageOpsForTrunc()
246 SmallVectorImpl<uint64_t> &Ops) { in salvageDebugInfoImpl()
285 SmallVector<uint64_t, 16> Ops; in salvageDebugInfoForDbgValue() local
H A DIntrinsicLowering.cpp353 Value *Ops[3]; in LowerIntrinsicCall() local
364 Value *Ops[3]; in LowerIntrinsicCall() local
376 Value *Ops[3]; in LowerIntrinsicCall() local
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp816 SDValue Ops[] = {ST->getValue(), Base.getOperand(0), Base.getOperand(1), in tryTLSXFormStore() local
870 SDValue Ops[] = {Base.getOperand(0), Base.getOperand(1), Chain}; in tryTLSXFormLoad() local
943 SDValue Ops[] = { Op0, Op1, getI32Imm(SH, dl), getI32Imm(MB, dl), in tryBitfieldInsert() local
1178 SDValue Ops[] = {SDValue(Result, 0), SDValue(Result, 0), getI32Imm(32), in selectI64ImmDirect() local
1363 SDValue Ops[] = {SDValue(Result, 0), SDValue(Result, 0), getI32Imm(32), in selectI64ImmDirectPrefix() local
1375 SDValue Ops[] = {SDValue(ResultLo, 0), SDValue(ResultHi, 0), getI32Imm(32), in selectI64ImmDirectPrefix() local
1432 SDValue Ops[] = {SDValue(Result, 0), SDValue(Result, 0), getI32Imm(32), in selectI64Imm() local
1441 SDValue Ops[] = {SDValue(Result, 0), SDValue(Result, 0), getI32Imm(48), in selectI64Imm() local
1448 SDValue Ops[] = {SDValue(Result, 0), SDValue(Result, 0), getI32Imm(16), in selectI64Imm() local
1455 SDValue Ops[] = {SDValue(Result, 0), SDValue(Result, 0), getI32Imm(16), in selectI64Imm() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DReassociate.cpp82 static void PrintOps(Instruction *I, const SmallVectorImpl<ValueEntry> &Ops) { in PrintOps()
383 SmallVectorImpl<RepeatedValue> &Ops, in LinearizeExprTree()
569 SmallVectorImpl<ValueEntry> &Ops, in RewriteExprTree()
1055 static unsigned FindInOperandList(const SmallVectorImpl<ValueEntry> &Ops, in FindInOperandList()
1082 SmallVectorImpl<WeakTrackingVH> &Ops) { in EmitAddTreeOfValues()
1189 SmallVectorImpl<ValueEntry> &Ops) { in OptimizeAndOrXor()
1369 SmallVectorImpl<ValueEntry> &Ops) { in OptimizeXor()
1491 SmallVectorImpl<ValueEntry> &Ops) { in OptimizeAdd()
1727 static bool collectMultiplyFactors(SmallVectorImpl<ValueEntry> &Ops, in collectMultiplyFactors()
1782 SmallVectorImpl<Value*> &Ops) { in buildMultiplyTree()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1365 SDValue Ops[] = { RHS }; in SelectAddrModeXRO() local
1453 SmallVector<SDValue, 4> Ops; in createTuple() local
1482 SmallVector<SDValue, 6> Ops; in SelectTable() local
1538 SDValue Ops[] = {Val, AUTKey, AUTConstDisc, AUTAddrDisc}; in SelectPtrauthAuth() local
1546 SDValue Ops[] = {AUTKey, AUTConstDisc, AUTAddrDisc, X16Copy.getValue(1)}; in SelectPtrauthAuth() local
1579 SDValue Ops[] = {AUTKey, AUTConstDisc, AUTAddrDisc, PACKey, in SelectPtrauthResign() local
1702 SDValue Ops[] = { Base, Offset, Chain }; in tryIndexedLoad() local
1735 SDValue Ops[] = {N->getOperand(2), // Mem operand; in SelectLoad() local
1764 SDValue Ops[] = {N->getOperand(1), // Mem operand in SelectPostLoad() local
1885 SDValue Ops[] = {N->getOperand(1), N->getOperand(2)}; in SelectPExtPair() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp846 SmallVector<SDValue, 8> Ops; in moveBelowOrigChain() local
1076 SDValue Ops[] = {MemNode->getChain(), MemNode->getBasePtr()}; in PreprocessISelDAG() local
1496 SDValue Ops[] = {N->getOperand(0), N->getOperand(1), MemTmp}; in PreprocessISelDAG() local
1513 SDValue Ops[] = {Store, MemTmp}; in PreprocessISelDAG() local
1635 SmallVector<SDValue> Ops(N->op_values()); in PostprocessISelDAG() local
1664 SmallVector<SDValue> Ops = {And.getOperand(1), And.getOperand(2), in PostprocessISelDAG() local
3698 const SDValue Ops[] = {Base, Scale, Index, Disp, Segment, InputChain}; in foldLoadStoreIntoMemOperand() local
3715 const SDValue Ops[] = {Base, Scale, Index, Disp, Segment, InputChain}; in foldLoadStoreIntoMemOperand() local
3812 const SDValue Ops[] = {Base, Scale, Index, Disp, in foldLoadStoreIntoMemOperand() local
3817 const SDValue Ops[] = {Base, Scale, Index, Disp, in foldLoadStoreIntoMemOperand() local
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DDXILEmitter.cpp328 static void emitDXILOpCodes(ArrayRef<DXILOperationDesc> Ops, raw_ostream &OS) { in emitDXILOpCodes()
377 ArrayRef<DXILOperationDesc> Ops, in emitDXILOpAttributes()
415 static void emitDXILOpFunctionTypes(ArrayRef<DXILOperationDesc> Ops, in emitDXILOpFunctionTypes()
435 static void emitDXILIntrinsicMap(ArrayRef<DXILOperationDesc> Ops, in emitDXILIntrinsicMap()
479 static void emitDXILOperationTable(ArrayRef<DXILOperationDesc> Ops, in emitDXILOperationTable()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVInlineAsmLowering.cpp25 Value *Val, StringRef Constraint, std::vector<MachineOperand> &Ops, in lowerAsmOperandForConstraint()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp719 ArrayRef<SDValue> Ops) { in AddNodeIDOperands()
728 ArrayRef<SDUse> Ops) { in AddNodeIDOperands()
1304 SDValue Ops[] = { Op }; in FindModifiedNodeSlot() local
1324 SDValue Ops[] = { Op1, Op2 }; in FindModifiedNodeSlot() local
1338 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops, in FindModifiedNodeSlot()
1753 SmallVector<SDValue, 8> Ops; in getConstant() local
2287 SDValue Ops[2] = { N1, N2 }; in getVectorShuffle() local
2362 SDValue Ops[] = { Root }; in getLabelNode() local
2439 SDValue Ops[] = {Ptr}; in getAddrSpaceCast() local
6157 ArrayRef<SDValue> Ops, in FoldBUILD_VECTOR()
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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp365 SDValue Ops[] = { Result, Chain }; in lowerLoadWordFromAlignedBasePlusOffset() local
425 SDValue Ops[] = { Result, Chain }; in LowerLOAD() local
446 SDValue Ops[] = { CallResult.first, CallResult.second }; in LowerLOAD() local
516 SDValue Ops[] = { Lo, Hi }; in LowerSMUL_LOHI() local
533 SDValue Ops[] = { Lo, Hi }; in LowerUMUL_LOHI() local
970 SDValue Ops[] = { Chain, DAG.getConstant(offset / 4, dl, MVT::i32) }; in LowerCallResult() local
1085 SmallVector<SDValue, 8> Ops; in LowerCCCCallTo() local
1524 SDValue Ops[] = { Result, Carry }; in PerformDAGCombine() local
1537 SDValue Ops[] = { Result, Carry }; in PerformDAGCombine() local
1560 SDValue Ops[] = { Result, Borrow }; in PerformDAGCombine() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp1050 SDValue Ops[] = {getI32Imm(Ordering, DL), in tryLoad() local
1132 SDValue Ops[] = {getI32Imm(Ordering, DL), in tryLoadVector() local
1203 SDValue Ops[] = {getI32Imm(FromType, DL), getI32Imm(FromTypeWidth, DL), Base, in tryLDG() local
1268 SDValue Ops[] = {Base, Offset, LD->getChain()}; in tryLDU() local
1334 SDValue Ops[] = {selectPossiblyImm(Value), in tryStore() local
1382 SmallVector<SDValue, 16> Ops; in tryStoreVector() local
1492 SmallVector<SDValue, 2> Ops( in tryLoadParam() local
1532 static unsigned pickOpcodeForVectorStParam(SmallVector<SDValue, 8> &Ops, in pickOpcodeForVectorStParam()
1620 SmallVector<SDValue, 8> Ops; in tryStoreParam() local
1896 SDValue Ops[] = { in tryBFE() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DCanonicalizeAliases.cpp54 std::vector<Constant *> Ops; in canonicalizeAlias() local

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