| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 235 unsigned &Op3) { in Decode3OpInstruction()
514 unsigned Op1, Op2, Op3; in Decode3RInstruction() local
527 unsigned Op1, Op2, Op3; in Decode3RImmInstruction() local
540 unsigned Op1, Op2, Op3; in Decode2RUSInstruction() local
553 unsigned Op1, Op2, Op3; in Decode2RUSBitpInstruction() local
566 unsigned Op1, Op2, Op3; in DecodeL3RInstruction() local
580 unsigned Op1, Op2, Op3; in DecodeL3RSrcDstInstruction() local
595 unsigned Op1, Op2, Op3; in DecodeL2RUSInstruction() local
609 unsigned Op1, Op2, Op3; in DecodeL2RUSBitpInstruction() local
623 unsigned Op1, Op2, Op3, Op4, Op5, Op6; in DecodeL6RInstruction() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGTargetInfo.h | 53 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcpy() argument
69 SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, in EmitTargetCodeForMemmove() argument
83 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemset() argument
96 SDValue Op1, SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcmp() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblySelectionDAGInfo.cpp | 38 SDValue Op3, Align Alignment, bool IsVolatile, in EmitTargetCodeForMemmove()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrBuilder.h | 110 const MachineOperand &Op3 = MI->getOperand(Operand + 3); in getAddressFromInstr() local
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| H A D | X86FastISel.cpp | 4040 unsigned Op2, unsigned Op3) { in fastEmitInst_rrrr()
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| H A D | X86ISelDAGToDAG.cpp | 6591 SDValue Op0, Op1, Op2, Op3, Op4; in SelectInlineAsmMemoryOperand() local
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| H A D | X86InstrInfo.cpp | 2059 unsigned Op1 = 1, Op2 = 2, Op3 = 3; in getThreeSrcCommuteCase() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankCombiner.cpp | 332 MachineInstr *Op3 = getDefIgnoringCopies(MI.getOperand(4).getReg(), MRI); in matchFPMed3ToClamp() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 293 BPFOperand &Op3 = (BPFOperand &)*Operands[3]; in PreMatchCheck() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 1344 const MachineOperand &Op3 = MI.getOperand(3); in expandPostRAPseudo() local
1368 const MachineOperand &Op3 = MI.getOperand(3); in expandPostRAPseudo() local
1401 MachineOperand &Op3 = MI.getOperand(3); in expandPostRAPseudo() local
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| H A D | HexagonSplitDouble.cpp | 903 MachineOperand &Op3 = MI->getOperand(3); in splitAslOr() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 6221 AArch64Operand &Op3 = static_cast<AArch64Operand &>(*Operands[3]); in MatchAndEmitInstruction() local
6307 AArch64Operand &Op3 = static_cast<AArch64Operand &>(*Operands[3]); in MatchAndEmitInstruction() local
6371 AArch64Operand &Op3 = static_cast<AArch64Operand &>(*Operands[3]); in MatchAndEmitInstruction() local
6430 AArch64Operand &Op3 = static_cast<AArch64Operand &>(*Operands[3]); in MatchAndEmitInstruction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 233 unsigned Reg2, MCOperand Op3, SMLoc IDLoc, in emitRRRX()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 233 unsigned Op3) { in fastEmitInst_riir()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 10535 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { in UpdateNodeOperands()
10542 SDValue Op3, SDValue Op4) { in UpdateNodeOperands()
10549 SDValue Op3, SDValue Op4, SDValue Op5) { in UpdateNodeOperands()
10643 SDValue Op2, SDValue Op3) { in SelectNodeTo()
10850 SDValue Op3) { in getMachineNode()
10872 SDValue Op2, SDValue Op3) { in getMachineNode()
10896 SDValue Op3) { in getMachineNode()
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| H A D | SelectionDAGBuilder.cpp | 6459 SDValue Op3 = getValue(I.getArgOperand(2)); in visitIntrinsicCall() local
6501 SDValue Op3 = getValue(I.getArgOperand(2)); in visitIntrinsicCall() local
6533 SDValue Op3 = getValue(I.getArgOperand(2)); in visitIntrinsicCall() local
7219 SDValue Op3 = getValue(I.getArgOperand(2)); in visitIntrinsicCall() local
7230 SDValue Op3 = getValue(I.getArgOperand(2)); in visitIntrinsicCall() local
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| H A D | LegalizeFloatTypes.cpp | 3303 SDValue Op3 = GetSoftPromotedHalf(N->getOperand(3)); in SoftPromoteHalfRes_SELECT_CC() local
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| H A D | LegalizeIntegerTypes.cpp | 436 SDValue Op3 = GetPromotedInteger(N->getOperand(3)); in PromoteIntRes_AtomicCmpSwap() local
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| H A D | TargetLowering.cpp | 979 auto MatchOperands = [&](SDValue Op1, SDValue Op2, SDValue Op3, SDValue A) { in combineShiftToAVG()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 106 const MCOperand &Op3 = MI->getOperand(3); in printInst() local
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 17419 Value *Op3 = EmitScalarExpr(E->getArg(3)); in EmitPPCBuiltinExpr() local
18064 Value *Op3 = EmitScalarExpr(E->getArg(3)); in EmitPPCBuiltinExpr() local
18072 Value *Op3 = EmitScalarExpr(E->getArg(3)); in EmitPPCBuiltinExpr() local
18080 Value *Op3 = EmitScalarExpr(E->getArg(3)); in EmitPPCBuiltinExpr() local
18088 Value *Op3 = EmitScalarExpr(E->getArg(3)); in EmitPPCBuiltinExpr() local
18096 Value *Op3 = EmitScalarExpr(E->getArg(3)); in EmitPPCBuiltinExpr() local
18104 Value *Op3 = EmitScalarExpr(E->getArg(3)); in EmitPPCBuiltinExpr() local
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ConstantFolding.cpp | 3105 if (const auto *Op3 = dyn_cast<ConstantFP>(Operands[2])) { in ConstantFoldScalarCall3() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 6766 const auto &Op3 = static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd]); in tryConvertingToTwoOperandForm() local
6937 ARMOperand &Op3 = static_cast<ARMOperand &>(*Operands[IdX + 1]); in fixupGNULDRDAlias() local
7017 const MCParsedAsmOperand &Op3 = *Operands[MnemonicOpsEndInd + 2]; in CDEConvertDualRegOperand() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | PatternMatch.h | 1697 T2 Op3; member
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Verifier.cpp | 5932 auto *Op3 = cast<ConstantInt>(Call.getArgOperand(2)); in visitIntrinsicCall() local
|