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Searched defs:Op1 (Results 1 – 25 of 184) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp216 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { in Decode2OpInstruction()
234 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction()
322 unsigned Op1, Op2; in Decode2RInstruction() local
335 unsigned Op1, Op2; in Decode2RImmInstruction() local
348 unsigned Op1, Op2; in DecodeR2RInstruction() local
361 unsigned Op1, Op2; in Decode2RSrcDstInstruction() local
375 unsigned Op1, Op2; in DecodeRUSInstruction() local
388 unsigned Op1, Op2; in DecodeRUSBitpInstruction() local
401 unsigned Op1, Op2; in DecodeRUSSrcDstBitpInstruction() local
486 unsigned Op1, Op2; in DecodeL2RInstruction() local
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGTargetInfo.h52 SDValue Chain, SDValue Op1, in EmitTargetCodeForMemcpy() argument
68 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, in EmitTargetCodeForMemmove() argument
82 SDValue Chain, SDValue Op1, in EmitTargetCodeForMemset() argument
96 SDValue Op1, SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcmp() argument
133 SDValue Op1, SDValue Op2, in EmitTargetCodeForStrcmp() argument
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DOverflowInstAnalysis.cpp21 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd, in isCheckForZeroAndMulWithOverflow()
67 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, in isCheckForZeroAndMulWithOverflow()
H A DInstructionSimplify.cpp301 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); in simplifyAssociativeBinOp() local
608 Value *&Op0, Value *&Op1, in foldOrCommuteConstant()
635 static Value *simplifyAddInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW, in simplifyAddInst()
702 Value *llvm::simplifyAddInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW, in simplifyAddInst()
753 static Value *simplifyByDomEq(unsigned Opcode, Value *Op0, Value *Op1, in simplifyByDomEq()
787 static Value *simplifySubInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW, in simplifySubInst()
923 Value *llvm::simplifySubInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW, in simplifySubInst()
930 static Value *simplifyMulInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW, in simplifyMulInst()
995 Value *llvm::simplifyMulInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW, in simplifyMulInst()
1079 Value *Op1, const SimplifyQuery &Q, in simplifyDivRem()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp196 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitMul() local
576 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldFPSignBitOps() local
634 Value *Op1 = I.getOperand(1); in foldPowiReassoc() local
677 Value *Op1 = I.getOperand(1); in foldFMulReassoc() local
884 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitFMul() local
1087 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldIDivShl() local
1169 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonIDivTransforms() local
1526 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitUDiv() local
1595 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitSDiv() local
1805 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldFDivPowDivisor() local
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H A DInstCombineAndOrXor.cpp1527 Value *Op0, Value *Op1) { in foldLogicOfIsFPClass()
1618 Value *Op0 = BO.getOperand(0), *Op1 = BO.getOperand(1), *X; in reassociateFCmps() local
1665 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in matchDeMorgansLaws() local
1747 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldCastedBitwiseLogic() local
1754 Value *Op1) -> Instruction * { in foldCastedBitwiseLogic()
1845 Value *Op1 = I.getOperand(1); in foldAndToXor() local
1871 Value *Op1 = I.getOperand(1); in foldOrToXor() local
1916 Value *Op0 = And.getOperand(0), *Op1 = And.getOperand(1); in narrowMaskedBinOp() local
1960 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldComplexAndOrPatterns() local
2132 Value *Op1 = I.getOperand(1); in canonicalizeLogicFirst() local
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H A DInstCombineCompares.cpp1297 Value *Op0 = Cmp.getOperand(0), *Op1 = Cmp.getOperand(1); in foldICmpWithConstant() local
2970 Value *Op1, IRBuilderBase &Builder, in createLogicFromTable()
3026 Value *Op0, *Op1; in foldICmpAddConstant() local
3266 Value *Op1 = Cmp.getOperand(1); in foldICmpBitCast() local
3722 Value *Op1 = Cmp.getOperand(1); in foldICmpIntrinsicWithIntrinsic() local
3874 Value *Op1 = II->getOperand(1); in foldICmpUSubSatOrUAddSatWithConstant() local
4092 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldICmpInstWithConstantNotInt() local
4141 Value *Op1 = SimplifyOp(SI->getOperand(1), true); in foldSelectICmp() local
4290 Value *Op1, const SimplifyQuery &Q, in foldICmpWithLowBitMaskedVal()
4771 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1), *A; in foldICmpAndXX() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiMCCodeEmitter.cpp189 const MCOperand Op1 = Inst.getOperand(OpNo + 0); in getRiMemoryOpValue() local
221 const MCOperand Op1 = Inst.getOperand(OpNo + 0); in getRrMemoryOpValue() local
260 const MCOperand Op1 = Inst.getOperand(OpNo + 0); in getSplsOpValue() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ExpandImm.h24 uint64_t Op1; member
/freebsd/sys/contrib/dev/acpica/compiler/
H A Dasltree.c650 ACPI_PARSE_OBJECT *Op1, in TrLinkPeerOp()
787 ACPI_PARSE_OBJECT *Op1, in TrLinkChildOp()
/freebsd/contrib/llvm-project/llvm/lib/MC/MCParser/
H A DMCTargetAsmParser.cpp53 bool MCTargetAsmParser::areEqualRegs(const MCParsedAsmOperand &Op1, in areEqualRegs()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DDFAPacketizer.cpp252 bool VLIWPacketizerList::alias(const MachineMemOperand &Op1, in alias()
278 for (const MachineMemOperand *Op1 : MI1.memoperands()) in alias() local
H A DExpandVectorPredication.cpp262 Value *Op1 = VPI.getOperand(1); in expandPredicationInBinaryOperator() local
298 Value *Op1 = VPI.getOperand(1); in expandPredicationToIntCall() local
336 Value *Op1 = VPI.getOperand(1); in expandPredicationToFPCall() local
348 Value *Op1 = VPI.getOperand(1); in expandPredicationToFPCall() local
643 Value *Op1 = VPI.getOperand(1); in expandPredicationInComparison() local
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h532 const SrcOp &Op1) { in buildPtrMask()
593 const SrcOp &Op0, const SrcOp &Op1) { in buildUAddo()
599 const SrcOp &Op0, const SrcOp &Op1) { in buildUSubo()
605 const SrcOp &Op0, const SrcOp &Op1) { in buildSAddo()
611 const SrcOp &Op0, const SrcOp &Op1) { in buildSSubo()
630 const SrcOp &Op0, const SrcOp &Op1, in buildUAdde()
638 const SrcOp &Op0, const SrcOp &Op1, in buildUSube()
646 const SrcOp &Op0, const SrcOp &Op1, in buildSAdde()
654 const SrcOp &Op0, const SrcOp &Op1, in buildSSube()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.cpp158 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in parseGenericRegister() local
173 uint32_t Op1 = (Bits >> 11) & 0x7; in genericRegisterString() local
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterBankInfo.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiMemAluCombiner.cpp170 if (Op1.getType() != Op2.getType()) in isSameOperand() argument
293 MachineOperand &Op1 = AluIter->getOperand(1); isSuitableAluInstr() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSplitDouble.cpp343 const MachineOperand &Op1 = MI->getOperand(1); in profit() local
698 MachineOperand &Op1 = MI->getOperand(1); in splitImmediate() local
725 MachineOperand &Op1 = MI->getOperand(1); in splitCombine() local
755 MachineOperand &Op1 = MI->getOperand(1); in splitExt() local
777 MachineOperand &Op1 = MI->getOperand(1); in splitShift() local
901 MachineOperand &Op1 = MI->getOperand(1); in splitAslOr() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp190 const LLT Op1) { in validateBinaryOp()
196 const LLT Op1) { in validateShiftOp()
203 const SrcOp &Op1, std::optional<unsigned> Flags) { in buildPtrAdd()
901 const SrcOp &Op1) { in buildICmp()
908 const SrcOp &Op1, in buildFCmp()
916 const SrcOp &Op1) { in buildSCmp()
922 const SrcOp &Op1) { in buildUCmp()
928 const SrcOp &Op0, const SrcOp &Op1, in buildSelect()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblySelectionDAGInfo.cpp37 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2, in EmitTargetCodeForMemmove()
H A DWebAssemblyTargetTransformInfo.cpp86 unsigned Index, Value *Op0, Value *Op1) { in getVectorInstrCost()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86RegisterBankInfo.cpp330 auto &Op1 = MI.getOperand(1); in getInstrMapping() local
359 auto &Op1 = MI.getOperand(1); in getInstrMapping() local
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCCodeEmitter.cpp159 const MCOperand Op1 = MI.getOperand(MemOpStartIndex); getMemoryOpValue() local
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp308 auto Op1 = N->getOperand(1); in selectAddCarry() local
351 auto Op1 = N->getOperand(1); in selectSubCarry() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp1203 SDValue Op1 = N->getOperand(IsStrict ? 2 : 1); in SoftenFloatOp_SETCC() local
2453 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); in PromoteFloatOp_FCOPYSIGN() local
2521 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); in PromoteFloatOp_SETCC() local
2783 SDValue Op1 = N->getOperand(1); in PromoteFloatRes_FCOPYSIGN() local
2806 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); in PromoteFloatRes_BinOp() local
2814 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); in PromoteFloatRes_FMAD() local
2825 SDValue Op1 = N->getOperand(1); in PromoteFloatRes_ExpOp() local
3191 SDValue Op1 = GetSoftPromotedHalf(N->getOperand(1)); in SoftPromoteHalfRes_FMAD() local
3211 SDValue Op1 = N->getOperand(1); in SoftPromoteHalfRes_ExpOp() local
3295 SDValue Op1 = GetSoftPromotedHalf(N->getOperand(1)); in SoftPromoteHalfRes_SELECT() local
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