| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiInstPrinter.cpp | 227 const MCOperand &OffsetOp, in printMemoryImmediateOffset()
241 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRiOperand() local
256 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRrOperand() local
277 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemSplsOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRInstPrinter.cpp | 178 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemri() local
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| H A D | AVRMCCodeEmitter.cpp | 141 auto OffsetOp = MI.getOperand(OpNo + 1); in encodeMemri() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFInstPrinter.cpp | 70 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); printMemOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.cpp | 123 Register OffsetOp = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 166 const MachineOperand &OffsetOp = MI.getOperand(3); in canRemoveAddasl() local
437 MachineOperand OffsetOp = MI->getOperand(getOffsetOpPosition(MI)); in processAddUses() local
499 MachineOperand &OffsetOp = UseMI->getOperand(getOffsetOpPosition(UseMI)); in updateAddUses() local
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| H A D | HexagonInstrInfo.cpp | 2050 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getIncrementValue() local
3310 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getBaseAndOffset() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineVerifier.cpp | 1584 const MachineOperand &OffsetOp = MI->getOperand(2); in verifyPreISelGenericInstruction() local
1606 const MachineOperand &OffsetOp = MI->getOperand(3); in verifyPreISelGenericInstruction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 899 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset); in resolveFrameIndex() local
2287 MachineOperand *OffsetOp = in eliminateFrameIndex() local
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| H A D | SIInstrInfo.cpp | 365 const MachineOperand *BaseOp, *OffsetOp; in getMemOperandsWithOffsetWidth() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | PatternMatch.h | 1833 OffsetOpTy OffsetOp; member
1882 m_PtrAdd(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp) { in m_PtrAdd()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3757 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem16Inst() local
3884 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem9Inst() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 2356 const MachineOperand &OffsetOp = Pop->getOperand(Pop->getNumOperands() - 1); in emitEpilogue() local
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| H A D | AArch64ISelDAGToDAG.cpp | 1647 ConstantSDNode *OffsetOp = cast<ConstantSDNode>(LD->getOffset()); in tryIndexedLoad() local
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| H A D | AArch64ISelLowering.cpp | 23056 SDValue OffsetOp = Add.getOperand(1); in foldIndexIntoBase() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 8866 SDValue OffsetOp) { in InferPointerInfo()
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| H A D | DAGCombiner.cpp | 8760 auto OffsetOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); in calculateByteProvider() local
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