Home
last modified time | relevance | path

Searched defs:Offset0 (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMHazardRecognizer.cpp192 int64_t Offset0 = 0; in getHazardType() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp393 int64_t Offset0; in apply() local
H A DHexagonISelLoweringHVX.cpp2197 SDValue Offset0 = DAG.getTargetConstant(0, dl, ty(Base)); LowerHvxMaskedOp() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp1153 bool AMDGPUDAGToDAGISel::isDSOffset2Legal(SDValue Base, unsigned Offset0, in isDSOffset2Legal()
1247 SDValue &Offset0, in SelectDS64Bit4ByteAligned()
1253 SDValue &Offset0, in SelectDS128Bit8ByteAligned()
1259 SDValue &Offset0, SDValue &Offset1, in SelectDSReadWrite2()
H A DSIInstrInfo.cpp231 int64_t &Offset0, in areLoadsFromSameBasePtr()
394 unsigned Offset0 = Offset0Op->getImm() & 0xff; in getMemOperandsWithOffsetWidth() local
595 int64_t Offset0, int64_t Offset1, in shouldScheduleLoadsNear()
3701 int64_t Offset0, Offset1; in checkInstOffsetsDoNotOverlap() local
H A DAMDGPUInstructionSelector.cpp1587 unsigned Offset0 = OrderedCountIndex << 2; in selectDSOrderedIntrinsic() local
4700 bool AMDGPUInstructionSelector::isDSOffset2Legal(Register Base, int64_t Offset0, in isDSOffset2Legal()
H A DSIISelLowering.cpp8877 unsigned Offset0 = OrderedCountIndex << 2; in LowerINTRINSIC_W_CHAIN() local
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DConstantFolding.cpp1249 APInt Offset0(IndexWidth, 0); in ConstantFoldCompareInstOperands() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp18631 const APInt &Offset0 = CN->getAPIntValue(); in CombineToPreIndexedLoadStore() local
20914 int64_t Offset0 = LoadNodes[0].OffsetFromBase; in tryStoreMergeOfLoads() local
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6096 bool Offset0 = false, Offset1 = false; in getFauxShuffleMask() local