1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, v.1, (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://opensource.org/licenses/CDDL-1.0.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2014-2017 Cavium, Inc.
24 * The contents of this file are subject to the terms of the Common Development
25 * and Distribution License, v.1, (the "License").
26
27 * You may not use this file except in compliance with the License.
28
29 * You can obtain a copy of the License at available
30 * at http://opensource.org/licenses/CDDL-1.0
31
32 * See the License for the specific language governing permissions and
33 * limitations under the License.
34 */
35
36 #ifndef _BCM_OSAL_H
37 #define _BCM_OSAL_H
38
39 #include <sys/ddi.h>
40 #include <sys/sunddi.h>
41 #include <sys/types.h>
42 #include <sys/mutex.h>
43 #include <sys/ksynch.h>
44 #include <sys/conf.h>
45 #include <sys/debug.h>
46 #include <sys/kmem.h>
47 #include <sys/mac.h>
48 #include <sys/mac_provider.h>
49 #include <sys/dditypes.h>
50 #include <sys/list_impl.h>
51 #include <sys/byteorder.h>
52 #include <sys/containerof.h>
53
54 #include "qede_types.h"
55 #include "qede_list.h"
56
57 /*
58
59 * Forward Declarations for ecore data structures
60 */
61 struct ecore_dev;
62 struct ecore_hwfn;
63
64 #define nothing do {} while(0)
65
66 #define INLINE inline
67 #define __iomem
68 #define OSAL_IOMEM __iomem
69
70 #ifndef likely
71 #define likely(expr) (expr)
72 #endif
73
74 #ifndef unlikely
75 #define unlikely(expr) (expr)
76 #endif
77
78 /*
79 * Memory related OSAL
80 */
81 #define OSAL_MEM_ZERO(_dest_, _size_) \
82 (void) memset(_dest_, 0, _size_)
83 #define OSAL_MEMCPY(_dest_, _src_, _size_) \
84 memcpy(_dest_, _src_, _size_)
85 #define OSAL_MEMCMP(_s1_, _s2_, _size_) \
86 memcmp(_s1_, _s2_, _size_)
87 #define OSAL_MEMSET(_dest_, _val_, _size_) \
88 memset(_dest_, _val_, _size_)
89
90 /*
91 * The illumos DDI has sprintf returning a pointer to the resulting character
92 * buffer and not the actual length. Therefore we simulate sprintf like the
93 * others do.
94 */
95 extern size_t qede_sprintf(char *, const char *, ...);
96 #define OSAL_SPRINTF qede_sprintf
97 #define OSAL_SNPRINTF (ssize_t)snprintf
98 #define OSAL_STRCMP strcmp
99
100 #define GFP_KERNEL KM_SLEEP
101 #define GFP_ATOMIC KM_NOSLEEP
102
103 /* Not used in ecore */
104 #define OSAL_CALLOC(dev, GFP, num, size) OSAL_NULL
105
106 void *qede_osal_zalloc(struct ecore_dev *, int, size_t);
107 #define OSAL_ZALLOC(_edev, _flags, _size) \
108 qede_osal_zalloc(_edev, _flags, _size)
109 void *qede_osal_alloc(struct ecore_dev *, int, size_t);
110 #define OSAL_ALLOC(_edev, _flags, _size) \
111 qede_osal_alloc(_edev, _flags, _size)
112 void qede_osal_free(struct ecore_dev *, void *addr);
113 #define OSAL_FREE(_edev, _addr) \
114 qede_osal_free(_edev, _addr)
115
116 #define OSAL_VALLOC(_edev, _size) \
117 qede_osal_alloc(_edev, GFP_KERNEL, _size)
118
119 #define OSAL_VFREE(_edev, _addr) \
120 qede_osal_free(_edev, _addr)
121
122 #define OSAL_VZALLOC(_edev, _size) \
123 qede_osal_zalloc(_edev, GFP_KERNEL, _size)
124
125 void *qede_osal_dma_alloc_coherent(struct ecore_dev *, dma_addr_t *, size_t);
126 #define OSAL_DMA_ALLOC_COHERENT(_edev_, _paddr_, _mem_size_) \
127 qede_osal_dma_alloc_coherent(_edev_, _paddr_, _mem_size_)
128 void qede_osal_dma_free_coherent(struct ecore_dev *, void *, dma_addr_t, size_t);
129 #define OSAL_DMA_FREE_COHERENT(_edev_, _vaddr_, _paddr_, _mem_size_) \
130 qede_osal_dma_free_coherent(_edev_, _vaddr_, _paddr_, _mem_size_)
131
132 /* Combine given 0xhi and 0xlo into a single U64 in format 0xhilo */
133 #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo))
134
135 void qede_osal_dma_sync(struct ecore_dev *edev, void* addr, u32 size, bool is_post);
136 #define OSAL_DMA_SYNC(dev, addr, length, is_post) \
137 qede_osal_dma_sync(dev, addr, length, is_post)
138 /*
139 * BAR Access Related OSAL
140 */
141 void qede_osal_pci_write32(struct ecore_hwfn *hwfn, u32 addr, u32 val);
142 void qede_osal_pci_write16(struct ecore_hwfn *hwfn, u32 addr, u16 val);
143 u32 qede_osal_pci_read32(struct ecore_hwfn *hwfn, u32 addr);
144 u32 *qede_osal_reg_addr(struct ecore_hwfn *hwfn, u32 addr);
145 void qede_osal_pci_bar2_write32(struct ecore_hwfn *hwfn, u32 offset, u32 val);
146
147 #define REG_WR(_hwfn_, _addr_, _value_) \
148 qede_osal_pci_write32(_hwfn_, _addr_, _value_)
149
150 #define REG_WR16(_hwfn_, _addr_, _value_) \
151 qede_osal_pci_write16(_hwfn_, _addr_, _value_)
152
153 #define REG_RD(_hwfn_, _addr_) \
154 qede_osal_pci_read32(_hwfn_, _addr_)
155
156 #define OSAL_REG_ADDR(_hwfn_, _addr_) \
157 qede_osal_reg_addr(_hwfn_, _addr_)
158
159 #define DOORBELL(_hwfn_, _addr_, _val_) \
160 qede_osal_pci_bar2_write32(_hwfn_, _addr_, _val_)
161
162 void qede_osal_direct_reg_write32(struct ecore_hwfn *hwfn, void *addr, u32 value);
163 u32 qede_osal_direct_reg_read32(struct ecore_hwfn *hwfn, void *addr);
164 /* FIXME: not correct Writes to the PCI _addr_ directly */
165 #define DIRECT_REG_WR(_hwfn, _addr, _val) \
166 qede_osal_direct_reg_write32(_hwfn, _addr, _val)
167 #define DIRECT_REG_RD(_hwfn, _addr) \
168 qede_osal_direct_reg_read32(_hwfn, _addr)
169
OSAL_NVM_IS_ACCESS_ENABLED(void * p_hwfn)170 static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn)
171 {
172 return (1);
173 }
174
175 /*
176 * Bit manipulation Helper functions
177 */
178
179 #define OSAL_BITS_PER_BYTE (8)
180 #define OSAL_BITS_PER_UL (sizeof(unsigned long)*OSAL_BITS_PER_BYTE) /* always a power of 2 */
181 #define OSAL_BITS_PER_UL_MASK (OSAL_BITS_PER_UL - 1)
182
osal_ffsl(unsigned long x)183 static inline u32 osal_ffsl(unsigned long x)
184 {
185 int r = 1;
186
187 if (!x)
188 return (0);
189
190 if (!(x & 0xffffffff)) {
191 x >>= 32;
192 r += 32;
193 }
194
195 if (!(x & 0xffff)) {
196 x >>= 16;
197 r += 16;
198 }
199
200 if (!(x & 0xff)) {
201 x >>= 8;
202 r += 8;
203 }
204
205 if (!(x & 0xf)) {
206 x >>= 4;
207 r += 4;
208 }
209 if (!(x & 3)) {
210 x >>= 2;
211 r += 2;
212 }
213
214 if (!(x & 1)) {
215 x >>= 1;
216 r += 1;
217 }
218
219 return (r);
220 }
221
osal_ffz(unsigned long word)222 static inline u32 osal_ffz(unsigned long word)
223 {
224 unsigned long first_zero;
225
226 first_zero = osal_ffsl(~word);
227 return first_zero ? (first_zero-1) : OSAL_BITS_PER_UL;
228 }
229
OSAL_SET_BIT(u32 nr,unsigned long * addr)230 static inline void OSAL_SET_BIT(u32 nr, unsigned long *addr)
231 {
232 addr[nr/OSAL_BITS_PER_UL] |= 1UL << (nr & OSAL_BITS_PER_UL_MASK);
233 }
234
OSAL_CLEAR_BIT(u32 nr,unsigned long * addr)235 static inline void OSAL_CLEAR_BIT(u32 nr, unsigned long *addr)
236 {
237 addr[nr/OSAL_BITS_PER_UL] &= ~(1UL << (nr & OSAL_BITS_PER_UL_MASK));
238 }
239
OSAL_TEST_BIT(u32 nr,unsigned long * addr)240 static inline bool OSAL_TEST_BIT(u32 nr, unsigned long *addr)
241 {
242 return !!(addr[nr/OSAL_BITS_PER_UL] & (1UL << (nr & OSAL_BITS_PER_UL_MASK)));
243 }
244
OSAL_FIND_FIRST_ZERO_BIT(unsigned long * addr,u32 limit)245 static inline u32 OSAL_FIND_FIRST_ZERO_BIT(unsigned long *addr, u32 limit)
246 {
247 u32 i;
248 u32 nwords = 0;
249
250 ASSERT(limit);
251 nwords = (limit - 1)/OSAL_BITS_PER_UL + 1;
252 for (i = 0; i < nwords && ~(addr[i]) == 0; i++);
253 return (i == nwords) ? limit : i*OSAL_BITS_PER_UL + osal_ffz(addr[i]);
254 }
255
OSAL_FIND_FIRST_BIT(unsigned long * addr,u32 limit)256 static inline u32 OSAL_FIND_FIRST_BIT(unsigned long *addr, u32 limit)
257 {
258 u32 i;
259 u32 nwords = (limit+OSAL_BITS_PER_UL-1)/OSAL_BITS_PER_UL;
260
261 for (i = 0; i < nwords ; i++)
262 {
263 if (addr[i]!=0)
264 break;
265 }
266
267 if (i == nwords) {
268 return limit;
269 } else {
270 return i*OSAL_BITS_PER_UL + osal_ffz(addr[i]);
271 }
272 }
273
274
275 /*
276 * Time related OSAL
277 */
278 #define OSAL_UDELAY(_usecs_) drv_usecwait(_usecs_)
279 #define OSAL_MSLEEP(_msecs_) delay(drv_usectohz(_msecs_ * 1000))
280
281 /*
282 * Synchronization related OSAL
283 */
284 typedef kmutex_t osal_mutex_t;
285 typedef kmutex_t osal_spinlock_t;
286
287 /*
288 * MUTEX/SPINLOCK Related NOTES:
289 * 1. Currently initialize all mutex with default intr prio 0.
290 * 2. Later do mutex_init in OSAL_MUTEX_ALLOC() instead of
291 * OSAL_MUTEX_INIT, and use proper intr prio.
292 * 3. Ensure that before calling any ecore api's, intr prio
293 * is properly configured.
294 */
295 #define OSAL_MUTEX_ALLOC(hwfn, lock) nothing
296 #define OSAL_SPIN_LOCK_ALLOC(hwfn, lock) nothing
297
298 #define OSAL_MUTEX_INIT(_lock_) \
299 mutex_init(_lock_, NULL, MUTEX_DRIVER, 0)
300 #define OSAL_SPIN_LOCK_INIT(lock) \
301 mutex_init(lock, NULL, MUTEX_DRIVER, 0)
302 #define OSAL_MUTEX_DEALLOC(_lock) \
303 mutex_destroy(_lock)
304 #define OSAL_SPIN_LOCK_DEALLOC(_lock) \
305 mutex_destroy(_lock)
306
307 #define OSAL_MUTEX_ACQUIRE(lock) \
308 mutex_enter(lock)
309 #define OSAL_SPIN_LOCK(lock) \
310 mutex_enter(lock)
311 #define OSAL_SPIN_LOCK_IRQSAVE(lock, flags) \
312 OSAL_SPIN_LOCK(lock)
313 #define OSAL_MUTEX_RELEASE(lock) \
314 mutex_exit(lock)
315 #define OSAL_SPIN_UNLOCK(lock) \
316 mutex_exit(lock)
317 #define OSAL_SPIN_UNLOCK_IRQSAVE(lock, flags) \
318 OSAL_SPIN_UNLOCK(lock)
319
320 /*
321 * TODO: Implement dpc ISR
322 */
323 #define OSAL_DPC_ALLOC(hwfn) OSAL_ALLOC(hwfn->p_dev, GFP_KERNEL, sizeof (u64))
324 #define OSAL_DPC_INIT(dpc, hwfn) nothing
325
326 /*
327 * PF recovery handler
328 */
329 void qede_osal_recovery_handler(struct ecore_hwfn *hwfn);
330 #define OSAL_SCHEDULE_RECOVERY_HANDLER(_ptr) qede_osal_recovery_handler(_ptr)
331
332 /*
333 * Process DCBX Event
334 */
OSAL_DCBX_AEN(struct ecore_hwfn * p_hwfn,u32 mib_type)335 static inline void OSAL_DCBX_AEN(struct ecore_hwfn *p_hwfn, u32 mib_type)
336 {
337 }
338
339 /*
340 * Endianess Related
341 */
342 #define LE_TO_HOST_32 LE_32
343 #define HOST_TO_LE_32 LE_32
344 #define HOST_TO_LE_16 LE_16
345
346 #define OSAL_BE32 u32
347 #ifdef BIG_ENDIAN
348 #define OSAL_CPU_TO_BE64(val) ((val))
349 #define OSAL_CPU_TO_BE32(val) ((val))
350 #define OSAL_BE32_TO_CPU(val) ((val))
351 #define OSAL_CPU_TO_LE32(val) BSWAP_32(val)
352 #define OSAL_CPU_TO_LE16(val) BSWAP_16(val)
353 #define OSAL_LE32_TO_CPU(val) BSWAP_32(val)
354 #define OSAL_LE16_TO_CPU(val) BSWAP_16(val)
355 #define OSAL_CPU_TO_LE64(val) BSWAP_64(val)
356 #else
357 #define OSAL_CPU_TO_BE64(val) BSWAP_64(val)
358 #define OSAL_CPU_TO_BE32(val) BSWAP_32(val)
359 #define OSAL_BE32_TO_CPU(val) BSWAP_32(val)
360 #define OSAL_CPU_TO_LE32(val) ((val))
361 #define OSAL_CPU_TO_LE16(val) ((val))
362 #define OSAL_LE32_TO_CPU(val) ((val))
363 #define OSAL_LE16_TO_CPU(val) ((val))
364 #endif
365 /*
366 * Physical Link Handling
367 */
368 void qede_osal_link_update(struct ecore_hwfn *hwfn);
369 #define OSAL_LINK_UPDATE(_hwfn_) \
370 qede_osal_link_update(_hwfn_)
371
372 /*
373 * Linked List Related OSAL,
374 * and general Link list API's
375 * for driver
376 */
377
378 typedef u64 osal_size_t;
379 typedef u64 osal_int_ptr_t;
380 #define OSAL_NULL NULL
381
382 #define OSAL_LIST_PUSH_HEAD(_entry_at_beg_, _head_) \
383 QEDE_LIST_ADD(_entry_at_beg_, _head_)
384
385 #define OSAL_LIST_PUSH_TAIL(_entry_at_end_, _head_) \
386 QEDE_LIST_ADD_TAIL(_entry_at_end_, _head_)
387
388 #define qede_list_entry(_entry_ptr_, _type_, _member_) \
389 __containerof(_entry_ptr_, _type_, _member_)
390
391 #define qede_list_first_entry(_head_, _type_, _member_) \
392 qede_list_entry((_head_)->next, _type_, _member_)
393
394 #define OSAL_LIST_FIRST_ENTRY(_list_, _type_, _member_) \
395 qede_list_first_entry(_list_, _type_, _member_)
396
397 #define OSAL_LIST_REMOVE_ENTRY(_entry_, _list_) \
398 QEDE_LIST_REMOVE(_entry_, _list_)
399
400
401 #define OSAL_LIST_IS_EMPTY(_head_) \
402 QEDE_LIST_IS_EMPTY(_head_)
403
404 #define qede_list_last_entry(_head_, _type_, _member_) \
405 qede_list_entry((_head_)->prev, _type_, _member_)
406
407 #define qede_list_prev_entry(_entry_, _type_, _member_) \
408 qede_list_entry((_entry_)->_member_.prev, _type_, _member_)
409
410 #define qede_list_for_each_entry(_entry_, _head_, _type_, _member_) \
411 for (_entry_ = qede_list_last_entry(_head_, _type_, _member_); \
412 &_entry_->_member_ != (_head_); \
413 _entry_ = qede_list_prev_entry(_entry_, _type_, _member_))
414
415 #define OSAL_LIST_FOR_EACH_ENTRY(_entry_, _list_, _member_, _type_) \
416 qede_list_for_each_entry(_entry_, _list_, _type_, _member_)
417
418 #define qede_list_next_entry(_entry_, _type_, _member_) \
419 qede_list_entry((_entry_)->_member_.next, _type_, _member_)
420
421 #define qede_list_for_each_entry_safe(_entry_, _tmp_, _head_, _type_, _member_) \
422 for (_entry_ = qede_list_first_entry(_head_, _type_, _member_), \
423 _tmp_ = qede_list_next_entry(_entry_, _type_, _member_); \
424 &_entry_->_member_ != (_head_); \
425 _entry_ = _tmp_, _tmp_ = qede_list_next_entry(_tmp_, _type_, _member_))
426
427 #define OSAL_LIST_FOR_EACH_ENTRY_SAFE(_entry_, _tmp_, _list_, \
428 _member_, _type_) \
429 qede_list_for_each_entry_safe(_entry_, _tmp_, _list_, _type_, \
430 _member_)
431
432 /*
433 * PCI Access Related OSAL
434 */
435 void qede_osal_pci_read_config_byte(struct ecore_dev *, u32, u8 *);
436 #define OSAL_PCI_READ_CONFIG_BYTE(_edev_, _addr_, _dst_) \
437 qede_osal_pci_read_config_byte(_edev_, _addr_, _dst_)
438 void qede_osal_pci_read_config_word(struct ecore_dev *, u32, u16 *);
439 #define OSAL_PCI_READ_CONFIG_WORD(_edev_, _addr_, _dst_) \
440 qede_osal_pci_read_config_word(_edev_, _addr_, _dst_)
441 void qede_osal_pci_read_config_dword(struct ecore_dev *, u32, u32 *);
442 #define OSAL_PCI_READ_CONFIG_DWORD(_edev_, _addr_, _dst_) \
443 qede_osal_pci_read_config_dword(_edev_, _addr_, _dst_)
444
445 int qede_osal_pci_find_ext_capab(struct ecore_dev *, u16);
446 #define OSAL_PCI_FIND_EXT_CAPABILITY(_edev_, _pcie_id_) \
447 qede_osal_pci_find_ext_capab(_edev_, _pcie_id_)
448
449 void qede_osal_pci_write_config_word(struct ecore_dev *, u32, u16);
450 #define OSAL_PCI_WRITE_CONFIG_WORD(ecore_dev, address, value)\
451 qede_osal_pci_write_config_word(ecore_dev, address, value)
452
453 int qede_osal_pci_find_capability(struct ecore_dev *, u16);
454 #define OSAL_PCI_FIND_CAPABILITY(ecore_dev, pcie_id)\
455 qede_osal_pci_find_capability(ecore_dev, pcie_id)
456 /*
457 * TODO : Can this be turned into a macro ??
458 */
459 u32 qede_osal_bar_size(struct ecore_dev *, u8);
460 #define OSAL_BAR_SIZE(_edev_, _bar_id_) \
461 (((bar_id) == 0)? 0x2000000: \
462 ((bar_id) == 1)? 0x800000: 0)
463
464 /*
465 * Memory Barriers related OSAL
466 */
467 /*
468 * TODO :Need to examine the ecore code using this Mem./IO
469 * barriers and find out whether they are needed on Solaris
470 */
471 #define OSAL_MMIOWB(x) do {} while (0)
472 #define OSAL_BARRIER(x) do {} while (0)
473 #define OSAL_SMP_RMB(x) do {} while (0)
474 #define OSAL_SMP_WMB(x) do {} while (0)
475 #define OSAL_RMB(x) do {} while (0)
476 #define OSAL_WMB(x) do {} while (0)
477
478 /*
479 * SR-IOV Related OSAL
480 */
481 #if 0
482 enum _ecore_status_t qede_osal_iov_vf_acquire(struct ecore_hwfn *p_hwfn, int vf_id);
483 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, vf_id) qede_osal_iov_vf_acquire(p_hwfn, vf_id)
484 #define OSAL_VF_SEND_MSG2PF() OSAL_NULL
485 #define OSAL_VF_HANDLE_BULLETIN() do {} while (0)
486 #define OSAL_IOV_CHK_UCAST() OSAL_NULL
487 #define OSAL_IOV_GET_OS_TYPE 0
488 #define OSAL_IOV_VF_CLEANUP(p_hwfn,vf_id)
489 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs_accepted) (0)
490 #define OSAL_IOV_POST_START_VPORT(p_hwfn, vfid, vport_id, opaque_fid) {};
491
492
493
494 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) {}
495 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0)
496 #else
497 #define OSAL_VF_SEND_MSG2PF() OSAL_NULL
498 #define OSAL_IOV_POST_START_VPORT(p_hwfn, vfid, vport_id, opaque_fid) {};
499 #define OSAL_IOV_CHK_UCAST(hwfn, vfid, params) (0)
500 #define OSAL_PF_VF_MSG(hwfn, vfid) (0)
501 #define OSAL_VF_FLR_UPDATE(hw_fn) {}
502 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, vf_id) (0)
503 #define OSAL_IOV_VF_CLEANUP(p_hwfn,vf_id)
504 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs_accepted) (0)
505 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) {};
506
507 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0)
508
509 #define OSAL_IOV_GET_OS_TYPE() 0
510
511 #endif
512 /*
513 * Miscellaneous OSAL
514 */
515 #define OSAL_ASSERT(is_assert) ASSERT(is_assert)
516
517 void qede_print(char *format, ...);
518 #define OSAL_WARN(is_warn, _fmt, ...) \
519 if(is_warn) { \
520 do { \
521 qede_print("!"_fmt, ##__VA_ARGS__); \
522 } while (0); \
523 }
524 unsigned long log2_align(unsigned long n);
525
526 /* TODO: Verify this helper */
527 #define OSAL_ROUNDUP_POW_OF_TWO log2_align
528
529 u32 LOG2(u32);
530 #define OSAL_LOG2 LOG2
531
532 /* Needed if ecore_roce.c is included */
533 #define OSAL_NUM_ACTIVE_CPU() (0)
534 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
535 #define ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
536
537 void qede_print(char *format, ...);
538 void qede_print_err(char *format, ...);
539
540 #define PRINT(_dp_ctx, _fmt, ...) \
541 do { \
542 qede_print("!"_fmt, ##__VA_ARGS__); \
543 } while (0);
544 #define PRINT_ERR(_dp_ctx, _fmt, ...) \
545 do { \
546 qede_print_err("!"_fmt, ##__VA_ARGS__); \
547 } while (0);
548
549 void qede_debug_before_pf_start(struct ecore_dev *edev, u8 id);
550 void qede_debug_after_pf_stop(void *cdev, u8 my_id);
551
552 #define OSAL_BEFORE_PF_START(ptr, id) qede_debug_before_pf_start(ptr, id)
553 #define OSAL_AFTER_PF_STOP(ptr, id) qede_debug_after_pf_stop(ptr, id)
554
555 #define cpu_to_le32(val) ((val))
556 #define le32_to_cpu(val) ((val))
557 #define le16_to_cpu(val) ((val))
558 #define cpu_to_le16(val) ((val))
559 #define OSAL_BUILD_BUG_ON(cond) nothing
560 #ifndef ARRAY_SIZE
561 #define ARRAY_SIZE(_arr) (sizeof(_arr) / sizeof((_arr)[0]))
562 #endif
563 #define BUILD_BUG_ON(cond) nothing
564 #define true 1
565 #define false 0
566 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0)
567 #define OSAL_INLINE inline
568 #define OSAL_SPRINTF qede_sprintf
569 #define OSAL_STRLEN strlen
570 #define OSAL_STRCPY strcpy
571 #define OSAL_STRNCPY strncpy
572 #define OSAL_PAGE_BITS 12
573 #define OSAL_PAGE_SIZE (1 << OSAL_PAGE_BITS)
574 #define OSAL_UNLIKELY
575 #define ARRAY_DECL static const
576
577 #define OSAL_BUILD_BUG_ON(cond) nothing
578
579 #define OSAL_MIN_T(type, __min1, __min2) \
580 ((type)(__min1) < (type)(__min2) ? (type)(__min1) : (type)(__min2))
581 #define OSAL_MAX_T(type, __max1, __max2) \
582 ((type)(__max1) > (type)(__max2) ? (type)(__max1) : (type)(__max2))
583
584 #define OSAL_ARRAY_SIZE(arr) ARRAY_SIZE(arr)
585
586 void OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial);
587
588 u8 OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value);
589
590 #define OSAL_CACHE_LINE_SIZE 64
591 #define OSAL_NUM_CPUS() (0)
592
593 void OSAL_DPC_SYNC(struct ecore_hwfn *p_hwfn);
594 /*
595 * * TODO: Need to implement
596 * * Call from the ecore to get the statististics of a protocol driver. Ecore client
597 * * need to populate the requested statistics. If the PF has more than one function,
598 * * driver should return the statistics sum of all the interfaces under the PF.
599 * */
600 #define OSAL_GET_PROTOCOL_STATS(_ecore_dev, _type, _stats) \
601 ;
602
603 /*
604 * * TODO: Need to implement
605 * * Call from ecore to the upper layer driver to request IRQs for the slowpath
606 * * interrupts handling.
607 * */
608 #define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) \
609 (ECORE_SUCCESS)
610
611
612
613 //void OSAL_HW_ERROR_OCCURRED(struct ecore_hwfn *, enum ecore_hw_err_type);
614 /*#define OSAL_HW_ERROR_OCCURRED(p_hwfn, err) \
615 qede_osal_hw_error_occurred(p_hwfn, err)
616 */
617
618 #define OSAL_HW_ERROR_OCCURRED(p_hwfn, err) nothing
619
620 void qede_osal_poll_mode_dpc(struct ecore_hwfn *);
621 #define OSAL_POLL_MODE_DPC(p_hwfn) \
622 qede_osal_poll_mode_dpc(p_hwfn)
623
624 int qede_osal_bitmap_weight(unsigned long *, uint32_t);
625 #define OSAL_BITMAP_WEIGHT(bitmap, nbits) \
626 qede_osal_bitmap_weight(bitmap, nbits)
627
628 void qede_osal_mfw_tlv_req(struct ecore_hwfn *);
629 #define OSAL_MFW_TLV_REQ(p_hwfn) \
630 qede_osal_mfw_tlv_req(p_hwfn)
631
632 u32 qede_osal_crc32(u32, u8 *, u64);
633 #define OSAL_CRC32(crc, buf, length) \
634 qede_osal_crc32(crc, buf, length)
635
636 void qede_osal_hw_info_change(struct ecore_hwfn *, int);
637 #define OSAL_HW_INFO_CHANGE(p_hwfn, change) \
638 qede_osal_hw_info_change(p_hwfn, change)
639
640
641 #endif /* _BCM_OSAL_H */
642