1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, v.1, (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://opensource.org/licenses/CDDL-1.0.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2014-2017 Cavium, Inc.
24 * Copyright 2025 Oxide Computer Company
25 */
26
27 #ifndef _BCM_OSAL_H
28 #define _BCM_OSAL_H
29
30 #include <sys/ddi.h>
31 #include <sys/sunddi.h>
32 #include <sys/types.h>
33 #include <sys/mutex.h>
34 #include <sys/ksynch.h>
35 #include <sys/conf.h>
36 #include <sys/debug.h>
37 #include <sys/kmem.h>
38 #include <sys/mac.h>
39 #include <sys/mac_provider.h>
40 #include <sys/dditypes.h>
41 #include <sys/list_impl.h>
42 #include <sys/byteorder.h>
43 #include <sys/containerof.h>
44 #include <sys/stdbool.h>
45
46 #include "qede_types.h"
47 #include "qede_list.h"
48
49 /*
50
51 * Forward Declarations for ecore data structures
52 */
53 struct ecore_dev;
54 struct ecore_hwfn;
55
56 #define nothing do {} while(0)
57
58 #define INLINE inline
59 #define __iomem
60 #define OSAL_IOMEM __iomem
61
62 #ifndef likely
63 #define likely(expr) (expr)
64 #endif
65
66 #ifndef unlikely
67 #define unlikely(expr) (expr)
68 #endif
69
70 /*
71 * Memory related OSAL
72 */
73 #define OSAL_MEM_ZERO(_dest_, _size_) \
74 (void) memset(_dest_, 0, _size_)
75 #define OSAL_MEMCPY(_dest_, _src_, _size_) \
76 memcpy(_dest_, _src_, _size_)
77 #define OSAL_MEMCMP(_s1_, _s2_, _size_) \
78 memcmp(_s1_, _s2_, _size_)
79 #define OSAL_MEMSET(_dest_, _val_, _size_) \
80 memset(_dest_, _val_, _size_)
81
82 /*
83 * The illumos DDI has sprintf returning a pointer to the resulting character
84 * buffer and not the actual length. Therefore we simulate sprintf like the
85 * others do.
86 */
87 extern size_t qede_sprintf(char *, const char *, ...);
88 #define OSAL_SPRINTF qede_sprintf
89 #define OSAL_SNPRINTF (ssize_t)snprintf
90 #define OSAL_STRCMP strcmp
91
92 #define GFP_KERNEL KM_SLEEP
93 #define GFP_ATOMIC KM_NOSLEEP
94
95 /* Not used in ecore */
96 #define OSAL_CALLOC(dev, GFP, num, size) OSAL_NULL
97
98 void *qede_osal_zalloc(struct ecore_dev *, int, size_t);
99 #define OSAL_ZALLOC(_edev, _flags, _size) \
100 qede_osal_zalloc(_edev, _flags, _size)
101 void *qede_osal_alloc(struct ecore_dev *, int, size_t);
102 #define OSAL_ALLOC(_edev, _flags, _size) \
103 qede_osal_alloc(_edev, _flags, _size)
104 void qede_osal_free(struct ecore_dev *, void *addr);
105 #define OSAL_FREE(_edev, _addr) \
106 qede_osal_free(_edev, _addr)
107
108 #define OSAL_VALLOC(_edev, _size) \
109 qede_osal_alloc(_edev, GFP_KERNEL, _size)
110
111 #define OSAL_VFREE(_edev, _addr) \
112 qede_osal_free(_edev, _addr)
113
114 #define OSAL_VZALLOC(_edev, _size) \
115 qede_osal_zalloc(_edev, GFP_KERNEL, _size)
116
117 void *qede_osal_dma_alloc_coherent(struct ecore_dev *, dma_addr_t *, size_t);
118 #define OSAL_DMA_ALLOC_COHERENT(_edev_, _paddr_, _mem_size_) \
119 qede_osal_dma_alloc_coherent(_edev_, _paddr_, _mem_size_)
120 void qede_osal_dma_free_coherent(struct ecore_dev *, void *, dma_addr_t, size_t);
121 #define OSAL_DMA_FREE_COHERENT(_edev_, _vaddr_, _paddr_, _mem_size_) \
122 qede_osal_dma_free_coherent(_edev_, _vaddr_, _paddr_, _mem_size_)
123
124 /* Combine given 0xhi and 0xlo into a single U64 in format 0xhilo */
125 #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo))
126
127 void qede_osal_dma_sync(struct ecore_dev *edev, void* addr, u32 size, bool is_post);
128 #define OSAL_DMA_SYNC(dev, addr, length, is_post) \
129 qede_osal_dma_sync(dev, addr, length, is_post)
130 /*
131 * BAR Access Related OSAL
132 */
133 void qede_osal_pci_write32(struct ecore_hwfn *hwfn, u32 addr, u32 val);
134 void qede_osal_pci_write16(struct ecore_hwfn *hwfn, u32 addr, u16 val);
135 u32 qede_osal_pci_read32(struct ecore_hwfn *hwfn, u32 addr);
136 u32 *qede_osal_reg_addr(struct ecore_hwfn *hwfn, u32 addr);
137 void qede_osal_pci_bar2_write32(struct ecore_hwfn *hwfn, u32 offset, u32 val);
138
139 #define REG_WR(_hwfn_, _addr_, _value_) \
140 qede_osal_pci_write32(_hwfn_, _addr_, _value_)
141
142 #define REG_WR16(_hwfn_, _addr_, _value_) \
143 qede_osal_pci_write16(_hwfn_, _addr_, _value_)
144
145 #define REG_RD(_hwfn_, _addr_) \
146 qede_osal_pci_read32(_hwfn_, _addr_)
147
148 #define OSAL_REG_ADDR(_hwfn_, _addr_) \
149 qede_osal_reg_addr(_hwfn_, _addr_)
150
151 #define DOORBELL(_hwfn_, _addr_, _val_) \
152 qede_osal_pci_bar2_write32(_hwfn_, _addr_, _val_)
153
154 void qede_osal_direct_reg_write32(struct ecore_hwfn *hwfn, void *addr, u32 value);
155 u32 qede_osal_direct_reg_read32(struct ecore_hwfn *hwfn, void *addr);
156 /* FIXME: not correct Writes to the PCI _addr_ directly */
157 #define DIRECT_REG_WR(_hwfn, _addr, _val) \
158 qede_osal_direct_reg_write32(_hwfn, _addr, _val)
159 #define DIRECT_REG_RD(_hwfn, _addr) \
160 qede_osal_direct_reg_read32(_hwfn, _addr)
161
OSAL_NVM_IS_ACCESS_ENABLED(void * p_hwfn)162 static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn)
163 {
164 return (true);
165 }
166
167 /*
168 * Bit manipulation Helper functions
169 */
170
171 #define OSAL_BITS_PER_BYTE (8)
172 #define OSAL_BITS_PER_UL (sizeof(unsigned long)*OSAL_BITS_PER_BYTE) /* always a power of 2 */
173 #define OSAL_BITS_PER_UL_MASK (OSAL_BITS_PER_UL - 1)
174
osal_ffsl(unsigned long x)175 static inline u32 osal_ffsl(unsigned long x)
176 {
177 int r = 1;
178
179 if (!x)
180 return (0);
181
182 if (!(x & 0xffffffff)) {
183 x >>= 32;
184 r += 32;
185 }
186
187 if (!(x & 0xffff)) {
188 x >>= 16;
189 r += 16;
190 }
191
192 if (!(x & 0xff)) {
193 x >>= 8;
194 r += 8;
195 }
196
197 if (!(x & 0xf)) {
198 x >>= 4;
199 r += 4;
200 }
201 if (!(x & 3)) {
202 x >>= 2;
203 r += 2;
204 }
205
206 if (!(x & 1)) {
207 x >>= 1;
208 r += 1;
209 }
210
211 return (r);
212 }
213
osal_ffz(unsigned long word)214 static inline u32 osal_ffz(unsigned long word)
215 {
216 unsigned long first_zero;
217
218 first_zero = osal_ffsl(~word);
219 return first_zero ? (first_zero-1) : OSAL_BITS_PER_UL;
220 }
221
OSAL_SET_BIT(u32 nr,unsigned long * addr)222 static inline void OSAL_SET_BIT(u32 nr, unsigned long *addr)
223 {
224 addr[nr/OSAL_BITS_PER_UL] |= 1UL << (nr & OSAL_BITS_PER_UL_MASK);
225 }
226
OSAL_CLEAR_BIT(u32 nr,unsigned long * addr)227 static inline void OSAL_CLEAR_BIT(u32 nr, unsigned long *addr)
228 {
229 addr[nr/OSAL_BITS_PER_UL] &= ~(1UL << (nr & OSAL_BITS_PER_UL_MASK));
230 }
231
OSAL_TEST_BIT(u32 nr,unsigned long * addr)232 static inline bool OSAL_TEST_BIT(u32 nr, unsigned long *addr)
233 {
234 return !!(addr[nr/OSAL_BITS_PER_UL] & (1UL << (nr & OSAL_BITS_PER_UL_MASK)));
235 }
236
OSAL_FIND_FIRST_ZERO_BIT(unsigned long * addr,u32 limit)237 static inline u32 OSAL_FIND_FIRST_ZERO_BIT(unsigned long *addr, u32 limit)
238 {
239 u32 i;
240 u32 nwords = 0;
241
242 ASSERT(limit);
243 nwords = (limit - 1)/OSAL_BITS_PER_UL + 1;
244 for (i = 0; i < nwords && ~(addr[i]) == 0; i++);
245 return (i == nwords) ? limit : i*OSAL_BITS_PER_UL + osal_ffz(addr[i]);
246 }
247
OSAL_FIND_FIRST_BIT(unsigned long * addr,u32 limit)248 static inline u32 OSAL_FIND_FIRST_BIT(unsigned long *addr, u32 limit)
249 {
250 u32 i;
251 u32 nwords = (limit+OSAL_BITS_PER_UL-1)/OSAL_BITS_PER_UL;
252
253 for (i = 0; i < nwords ; i++)
254 {
255 if (addr[i]!=0)
256 break;
257 }
258
259 if (i == nwords) {
260 return limit;
261 } else {
262 return i*OSAL_BITS_PER_UL + osal_ffz(addr[i]);
263 }
264 }
265
266
267 /*
268 * Time related OSAL
269 */
270 #define OSAL_UDELAY(_usecs_) drv_usecwait(_usecs_)
271 #define OSAL_MSLEEP(_msecs_) delay(drv_usectohz(_msecs_ * 1000))
272
273 /*
274 * Synchronization related OSAL
275 */
276 typedef kmutex_t osal_mutex_t;
277 typedef kmutex_t osal_spinlock_t;
278
279 /*
280 * MUTEX/SPINLOCK Related NOTES:
281 * 1. Currently initialize all mutex with default intr prio 0.
282 * 2. Later do mutex_init in OSAL_MUTEX_ALLOC() instead of
283 * OSAL_MUTEX_INIT, and use proper intr prio.
284 * 3. Ensure that before calling any ecore api's, intr prio
285 * is properly configured.
286 */
287 #define OSAL_MUTEX_ALLOC(hwfn, lock) nothing
288 #define OSAL_SPIN_LOCK_ALLOC(hwfn, lock) nothing
289
290 #define OSAL_MUTEX_INIT(_lock_) \
291 mutex_init(_lock_, NULL, MUTEX_DRIVER, 0)
292 #define OSAL_SPIN_LOCK_INIT(lock) \
293 mutex_init(lock, NULL, MUTEX_DRIVER, 0)
294 #define OSAL_MUTEX_DEALLOC(_lock) \
295 mutex_destroy(_lock)
296 #define OSAL_SPIN_LOCK_DEALLOC(_lock) \
297 mutex_destroy(_lock)
298
299 #define OSAL_MUTEX_ACQUIRE(lock) \
300 mutex_enter(lock)
301 #define OSAL_SPIN_LOCK(lock) \
302 mutex_enter(lock)
303 #define OSAL_SPIN_LOCK_IRQSAVE(lock, flags) \
304 OSAL_SPIN_LOCK(lock)
305 #define OSAL_MUTEX_RELEASE(lock) \
306 mutex_exit(lock)
307 #define OSAL_SPIN_UNLOCK(lock) \
308 mutex_exit(lock)
309 #define OSAL_SPIN_UNLOCK_IRQSAVE(lock, flags) \
310 OSAL_SPIN_UNLOCK(lock)
311
312 /*
313 * TODO: Implement dpc ISR
314 */
315 #define OSAL_DPC_ALLOC(hwfn) OSAL_ALLOC(hwfn->p_dev, GFP_KERNEL, sizeof (u64))
316 #define OSAL_DPC_INIT(dpc, hwfn) nothing
317
318 /*
319 * PF recovery handler
320 */
321 void qede_osal_recovery_handler(struct ecore_hwfn *hwfn);
322 #define OSAL_SCHEDULE_RECOVERY_HANDLER(_ptr) qede_osal_recovery_handler(_ptr)
323
324 /*
325 * Process DCBX Event
326 */
OSAL_DCBX_AEN(struct ecore_hwfn * p_hwfn,u32 mib_type)327 static inline void OSAL_DCBX_AEN(struct ecore_hwfn *p_hwfn, u32 mib_type)
328 {
329 }
330
331 /*
332 * Endianess Related
333 */
334 #define LE_TO_HOST_32 LE_32
335 #define HOST_TO_LE_32 LE_32
336 #define HOST_TO_LE_16 LE_16
337
338 #define OSAL_BE32 u32
339 #ifdef BIG_ENDIAN
340 #define OSAL_CPU_TO_BE64(val) ((val))
341 #define OSAL_CPU_TO_BE32(val) ((val))
342 #define OSAL_BE32_TO_CPU(val) ((val))
343 #define OSAL_CPU_TO_LE32(val) BSWAP_32(val)
344 #define OSAL_CPU_TO_LE16(val) BSWAP_16(val)
345 #define OSAL_LE32_TO_CPU(val) BSWAP_32(val)
346 #define OSAL_LE16_TO_CPU(val) BSWAP_16(val)
347 #define OSAL_CPU_TO_LE64(val) BSWAP_64(val)
348 #else
349 #define OSAL_CPU_TO_BE64(val) BSWAP_64(val)
350 #define OSAL_CPU_TO_BE32(val) BSWAP_32(val)
351 #define OSAL_BE32_TO_CPU(val) BSWAP_32(val)
352 #define OSAL_CPU_TO_LE32(val) ((val))
353 #define OSAL_CPU_TO_LE16(val) ((val))
354 #define OSAL_LE32_TO_CPU(val) ((val))
355 #define OSAL_LE16_TO_CPU(val) ((val))
356 #endif
357 /*
358 * Physical Link Handling
359 */
360 void qede_osal_link_update(struct ecore_hwfn *hwfn);
361 #define OSAL_LINK_UPDATE(_hwfn_) \
362 qede_osal_link_update(_hwfn_)
363
364 /*
365 * Linked List Related OSAL,
366 * and general Link list API's
367 * for driver
368 */
369
370 typedef u64 osal_size_t;
371 typedef u64 osal_int_ptr_t;
372 #define OSAL_NULL NULL
373
374 #define OSAL_LIST_PUSH_HEAD(_entry_at_beg_, _head_) \
375 QEDE_LIST_ADD(_entry_at_beg_, _head_)
376
377 #define OSAL_LIST_PUSH_TAIL(_entry_at_end_, _head_) \
378 QEDE_LIST_ADD_TAIL(_entry_at_end_, _head_)
379
380 #define qede_list_entry(_entry_ptr_, _type_, _member_) \
381 __containerof(_entry_ptr_, _type_, _member_)
382
383 #define qede_list_first_entry(_head_, _type_, _member_) \
384 qede_list_entry((_head_)->next, _type_, _member_)
385
386 #define OSAL_LIST_FIRST_ENTRY(_list_, _type_, _member_) \
387 qede_list_first_entry(_list_, _type_, _member_)
388
389 #define OSAL_LIST_REMOVE_ENTRY(_entry_, _list_) \
390 QEDE_LIST_REMOVE(_entry_, _list_)
391
392
393 #define OSAL_LIST_IS_EMPTY(_head_) \
394 QEDE_LIST_IS_EMPTY(_head_)
395
396 #define qede_list_last_entry(_head_, _type_, _member_) \
397 qede_list_entry((_head_)->prev, _type_, _member_)
398
399 #define qede_list_prev_entry(_entry_, _type_, _member_) \
400 qede_list_entry((_entry_)->_member_.prev, _type_, _member_)
401
402 #define qede_list_for_each_entry(_entry_, _head_, _type_, _member_) \
403 for (_entry_ = qede_list_last_entry(_head_, _type_, _member_); \
404 &_entry_->_member_ != (_head_); \
405 _entry_ = qede_list_prev_entry(_entry_, _type_, _member_))
406
407 #define OSAL_LIST_FOR_EACH_ENTRY(_entry_, _list_, _member_, _type_) \
408 qede_list_for_each_entry(_entry_, _list_, _type_, _member_)
409
410 #define qede_list_next_entry(_entry_, _type_, _member_) \
411 qede_list_entry((_entry_)->_member_.next, _type_, _member_)
412
413 #define qede_list_for_each_entry_safe(_entry_, _tmp_, _head_, _type_, _member_) \
414 for (_entry_ = qede_list_first_entry(_head_, _type_, _member_), \
415 _tmp_ = qede_list_next_entry(_entry_, _type_, _member_); \
416 &_entry_->_member_ != (_head_); \
417 _entry_ = _tmp_, _tmp_ = qede_list_next_entry(_tmp_, _type_, _member_))
418
419 #define OSAL_LIST_FOR_EACH_ENTRY_SAFE(_entry_, _tmp_, _list_, \
420 _member_, _type_) \
421 qede_list_for_each_entry_safe(_entry_, _tmp_, _list_, _type_, \
422 _member_)
423
424 /*
425 * PCI Access Related OSAL
426 */
427 void qede_osal_pci_read_config_byte(struct ecore_dev *, u32, u8 *);
428 #define OSAL_PCI_READ_CONFIG_BYTE(_edev_, _addr_, _dst_) \
429 qede_osal_pci_read_config_byte(_edev_, _addr_, _dst_)
430 void qede_osal_pci_read_config_word(struct ecore_dev *, u32, u16 *);
431 #define OSAL_PCI_READ_CONFIG_WORD(_edev_, _addr_, _dst_) \
432 qede_osal_pci_read_config_word(_edev_, _addr_, _dst_)
433 void qede_osal_pci_read_config_dword(struct ecore_dev *, u32, u32 *);
434 #define OSAL_PCI_READ_CONFIG_DWORD(_edev_, _addr_, _dst_) \
435 qede_osal_pci_read_config_dword(_edev_, _addr_, _dst_)
436
437 int qede_osal_pci_find_ext_capab(struct ecore_dev *, u16);
438 #define OSAL_PCI_FIND_EXT_CAPABILITY(_edev_, _pcie_id_) \
439 qede_osal_pci_find_ext_capab(_edev_, _pcie_id_)
440
441 void qede_osal_pci_write_config_word(struct ecore_dev *, u32, u16);
442 #define OSAL_PCI_WRITE_CONFIG_WORD(ecore_dev, address, value)\
443 qede_osal_pci_write_config_word(ecore_dev, address, value)
444
445 int qede_osal_pci_find_capability(struct ecore_dev *, u16);
446 #define OSAL_PCI_FIND_CAPABILITY(ecore_dev, pcie_id)\
447 qede_osal_pci_find_capability(ecore_dev, pcie_id)
448 /*
449 * TODO : Can this be turned into a macro ??
450 */
451 u32 qede_osal_bar_size(struct ecore_dev *, u8);
452 #define OSAL_BAR_SIZE(_edev_, _bar_id_) \
453 (((bar_id) == 0)? 0x2000000: \
454 ((bar_id) == 1)? 0x800000: 0)
455
456 /*
457 * Memory Barriers related OSAL
458 */
459 /*
460 * TODO :Need to examine the ecore code using this Mem./IO
461 * barriers and find out whether they are needed on Solaris
462 */
463 #define OSAL_MMIOWB(x) do {} while (0)
464 #define OSAL_BARRIER(x) do {} while (0)
465 #define OSAL_SMP_RMB(x) do {} while (0)
466 #define OSAL_SMP_WMB(x) do {} while (0)
467 #define OSAL_RMB(x) do {} while (0)
468 #define OSAL_WMB(x) do {} while (0)
469
470 /*
471 * SR-IOV Related OSAL
472 */
473 #if 0
474 enum _ecore_status_t qede_osal_iov_vf_acquire(struct ecore_hwfn *p_hwfn, int vf_id);
475 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, vf_id) qede_osal_iov_vf_acquire(p_hwfn, vf_id)
476 #define OSAL_VF_SEND_MSG2PF() OSAL_NULL
477 #define OSAL_VF_HANDLE_BULLETIN() do {} while (0)
478 #define OSAL_IOV_CHK_UCAST() OSAL_NULL
479 #define OSAL_IOV_GET_OS_TYPE 0
480 #define OSAL_IOV_VF_CLEANUP(p_hwfn,vf_id)
481 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs_accepted) (0)
482 #define OSAL_IOV_POST_START_VPORT(p_hwfn, vfid, vport_id, opaque_fid) {};
483
484
485
486 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) {}
487 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0)
488 #else
489 #define OSAL_VF_SEND_MSG2PF() OSAL_NULL
490 #define OSAL_IOV_POST_START_VPORT(p_hwfn, vfid, vport_id, opaque_fid) {};
491 #define OSAL_IOV_CHK_UCAST(hwfn, vfid, params) (0)
492 #define OSAL_PF_VF_MSG(hwfn, vfid) (0)
493 #define OSAL_VF_FLR_UPDATE(hw_fn) {}
494 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, vf_id) (0)
495 #define OSAL_IOV_VF_CLEANUP(p_hwfn,vf_id)
496 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs_accepted) (0)
497 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) {};
498
499 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0)
500
501 #define OSAL_IOV_GET_OS_TYPE() 0
502
503 #endif
504 /*
505 * Miscellaneous OSAL
506 */
507 #define OSAL_ASSERT(is_assert) ASSERT(is_assert)
508
509 void qede_print(char *format, ...);
510 #define OSAL_WARN(is_warn, _fmt, ...) \
511 if(is_warn) { \
512 do { \
513 qede_print("!"_fmt, ##__VA_ARGS__); \
514 } while (0); \
515 }
516 unsigned long log2_align(unsigned long n);
517
518 /* TODO: Verify this helper */
519 #define OSAL_ROUNDUP_POW_OF_TWO log2_align
520
521 u32 LOG2(u32);
522 #define OSAL_LOG2 LOG2
523
524 /* Needed if ecore_roce.c is included */
525 #define OSAL_NUM_ACTIVE_CPU() (0)
526 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
527 #define ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
528
529 void qede_print(char *format, ...);
530 void qede_print_err(char *format, ...);
531
532 #define PRINT(_dp_ctx, _fmt, ...) \
533 do { \
534 qede_print("!"_fmt, ##__VA_ARGS__); \
535 } while (0);
536 #define PRINT_ERR(_dp_ctx, _fmt, ...) \
537 do { \
538 qede_print_err("!"_fmt, ##__VA_ARGS__); \
539 } while (0);
540
541 void qede_debug_before_pf_start(struct ecore_dev *edev, u8 id);
542 void qede_debug_after_pf_stop(void *cdev, u8 my_id);
543
544 #define OSAL_BEFORE_PF_START(ptr, id) qede_debug_before_pf_start(ptr, id)
545 #define OSAL_AFTER_PF_STOP(ptr, id) qede_debug_after_pf_stop(ptr, id)
546
547 #define cpu_to_le32(val) ((val))
548 #define le32_to_cpu(val) ((val))
549 #define le16_to_cpu(val) ((val))
550 #define cpu_to_le16(val) ((val))
551 #define OSAL_BUILD_BUG_ON(cond) nothing
552 #ifndef ARRAY_SIZE
553 #define ARRAY_SIZE(_arr) (sizeof(_arr) / sizeof((_arr)[0]))
554 #endif
555 #define BUILD_BUG_ON(cond) nothing
556 #define true 1
557 #define false 0
558 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0)
559 #define OSAL_INLINE inline
560 #define OSAL_SPRINTF qede_sprintf
561 #define OSAL_STRLEN strlen
562 #define OSAL_STRCPY strcpy
563 #define OSAL_STRNCPY strncpy
564 #define OSAL_PAGE_BITS 12
565 #define OSAL_PAGE_SIZE (1 << OSAL_PAGE_BITS)
566 #define OSAL_UNLIKELY
567 #define ARRAY_DECL static const
568
569 #define OSAL_BUILD_BUG_ON(cond) nothing
570
571 #define OSAL_MIN_T(type, __min1, __min2) \
572 ((type)(__min1) < (type)(__min2) ? (type)(__min1) : (type)(__min2))
573 #define OSAL_MAX_T(type, __max1, __max2) \
574 ((type)(__max1) > (type)(__max2) ? (type)(__max1) : (type)(__max2))
575
576 #define OSAL_ARRAY_SIZE(arr) ARRAY_SIZE(arr)
577
578 void OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial);
579
580 u8 OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value);
581
582 #define OSAL_CACHE_LINE_SIZE 64
583 #define OSAL_NUM_CPUS() (0)
584
585 void OSAL_DPC_SYNC(struct ecore_hwfn *p_hwfn);
586 /*
587 * * TODO: Need to implement
588 * * Call from the ecore to get the statististics of a protocol driver. Ecore client
589 * * need to populate the requested statistics. If the PF has more than one function,
590 * * driver should return the statistics sum of all the interfaces under the PF.
591 * */
592 #define OSAL_GET_PROTOCOL_STATS(_ecore_dev, _type, _stats) \
593 ;
594
595 /*
596 * * TODO: Need to implement
597 * * Call from ecore to the upper layer driver to request IRQs for the slowpath
598 * * interrupts handling.
599 * */
600 #define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) \
601 (ECORE_SUCCESS)
602
603
604
605 //void OSAL_HW_ERROR_OCCURRED(struct ecore_hwfn *, enum ecore_hw_err_type);
606 /*#define OSAL_HW_ERROR_OCCURRED(p_hwfn, err) \
607 qede_osal_hw_error_occurred(p_hwfn, err)
608 */
609
610 #define OSAL_HW_ERROR_OCCURRED(p_hwfn, err) nothing
611
612 void qede_osal_poll_mode_dpc(struct ecore_hwfn *);
613 #define OSAL_POLL_MODE_DPC(p_hwfn) \
614 qede_osal_poll_mode_dpc(p_hwfn)
615
616 int qede_osal_bitmap_weight(unsigned long *, uint32_t);
617 #define OSAL_BITMAP_WEIGHT(bitmap, nbits) \
618 qede_osal_bitmap_weight(bitmap, nbits)
619
620 void qede_osal_mfw_tlv_req(struct ecore_hwfn *);
621 #define OSAL_MFW_TLV_REQ(p_hwfn) \
622 qede_osal_mfw_tlv_req(p_hwfn)
623
624 u32 qede_osal_crc32(u32, u8 *, u64);
625 #define OSAL_CRC32(crc, buf, length) \
626 qede_osal_crc32(crc, buf, length)
627
628 void qede_osal_hw_info_change(struct ecore_hwfn *, int);
629 #define OSAL_HW_INFO_CHANGE(p_hwfn, change) \
630 qede_osal_hw_info_change(p_hwfn, change)
631
632
633 #endif /* _BCM_OSAL_H */
634