| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetOpcodes.h | 22 #define HANDLE_TARGET_OPCODE(OPC) OPC, argument
23 #define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC) IDENT = OPC, argument
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| /freebsd/contrib/llvm-project/llvm/include/llvm/SandboxIR/ |
| H A D | SandboxIR.h | 92 #define DEF_INSTR(ID, OPC, CLASS) friend class CLASS; // For constructor argument
145 #define DEF_INSTR(ID, OPC, CLASS) ID, argument
158 #define DEF_INSTR(ID, OPC, CLASS) \ in getSubclassIDStr() argument
491 #define OP(OPC) OPC, argument
492 #define DEF_INSTR(ID, OPC, CLASS) OPC argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LowerTileCopy.cpp | 138 #define GET_EGPR_IF_ENABLED(OPC) (ST.hasEGPR() ? OPC##_EVEX : OPC) in runOnMachineFunction() argument
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| H A D | X86ExpandPseudo.cpp | 267 #define GET_EGPR_IF_ENABLED(OPC) (STI->hasEGPR() ? OPC##_EVEX : OPC) in expandMI() argument
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| H A D | X86DomainReassignment.cpp | 622 #define GET_EGPR_IF_ENABLED(OPC) STI->hasEGPR() ? OPC##_EVEX : OPC in initConverters() argument
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| H A D | X86ISelDAGToDAG.cpp | 279 #define GET_ND_IF_ENABLED(OPC) (Subtarget->hasNDD() ? OPC##_ND : OPC) in getAddressOperands() argument
4154 #define GET_EGPR_IF_ENABLED(OPC) (Subtarget->hasEGPR() ? OPC##_EVEX : OPC) in matchBEXTRFromAndImm() argument
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| H A D | X86InstrInfo.cpp | 3408 #define GET_ND_IF_ENABLED(OPC) (HasNDD ? OPC##_ND : OPC) in getCMovOpcode() argument
4481 #define GET_EGPR_IF_ENABLED(OPC) (STI.hasEGPR() ? OPC##_EVEX : OPC) in getLoadStoreRegOpcode() argument
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| H A D | X86FastISel.cpp | 3051 #define GET_EGPR_IF_ENABLED(OPC) Subtarget->hasEGPR() ? OPC##_EVEX : OPC in fastLowerIntrinsicCall() argument
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| H A D | X86ISelLowering.cpp | 36955 #define GET_EGPR_IF_ENABLED(OPC) (Subtarget.hasEGPR() ? OPC##_EVEX : OPC) in EmitInstrWithCustomInserter() argument
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| /freebsd/contrib/llvm-project/llvm/lib/SandboxIR/ |
| H A D | SandboxIR.cpp | 217 #define DEF_INSTR(ID, OPC, CLASS) \ in classof() argument
286 #define OP(OPC) \ in getOpcodeName() argument
289 #define DEF_INSTR(ID, OPC, CLASS) OPC in getOpcodeName() argument
439 #define DEF_INSTR(ID, OPC, CLASS) \ in classof() argument
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Instruction.cpp | 1212 #define HANDLE_TERM_INST(N, OPC, CLASS) \ in getNumSuccessors() argument
1224 #define HANDLE_TERM_INST(N, OPC, CLASS) \ in getSuccessor() argument
1236 #define HANDLE_TERM_INST(N, OPC, CLASS) \ in setSuccessor() argument
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| H A D | Value.cpp | 128 #define HANDLE_INST(N, OPC, CLASS) \ in deleteValue() argument
132 #define HANDLE_USER_INST(N, OPC, CLASS) in deleteValue() argument
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| H A D | IntrinsicInst.cpp | 524 #define VP_PROPERTY_FUNCTIONAL_OPC(OPC) return Instruction::OPC; in getFunctionalOpcodeForVP() argument
595 #define VP_PROPERTY_FUNCTIONAL_OPC(OPC) case Instruction::OPC: in getForOpcode() argument
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenTarget.cpp | 298 #define HANDLE_TARGET_OPCODE(OPC) #OPC, argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 1657 #define OPCODE_LMUL_CASE(OPC) \ in isVectorAssociativeAndCommutative() argument
1666 #define OPCODE_LMUL_MASK_CASE(OPC) \ in isVectorAssociativeAndCommutative() argument
1953 RVV_OPC_LMUL_CASE(OPC,INV) getInverseOpcode() argument
1969 RVV_OPC_LMUL_MASK_CASE(OPC,INV) getInverseOpcode() argument
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VECustomDAG.cpp | 362 bool hasReductionStartParam(unsigned OPC) { in hasReductionStartParam()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 301 #define STORE_OPCODE(VAR, OPC) VAR = isThumb ? ARM::t2##OPC : ARM::OPC in OpcodeCache() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUTargetTransformInfo.cpp | 588 const int OPC = TLI->InstructionOpcodeToISD(FAdd->getOpcode()); in getArithmeticInstrCost() local
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| H A D | SIISelLowering.cpp | 3927 unsigned OPC = AMDGPUISD::TC_RETURN; in LowerCall() local
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