| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 820 CalculateSwathWidth(const struct dml2_display_cfg * display_cfg,bool ForceSingleDPP,unsigned int NumberOfActiveSurfaces,enum dml2_odm_mode ODMMode[],unsigned int BytePerPixY[],unsigned int BytePerPixC[],unsigned int Read256BytesBlockHeightY[],unsigned int Read256BytesBlockHeightC[],unsigned int Read256BytesBlockWidthY[],unsigned int Read256BytesBlockWidthC[],bool surf_linear128_l[],bool surf_linear128_c[],unsigned int DPPPerSurface[],unsigned int req_per_swath_ub_l[],unsigned int req_per_swath_ub_c[],unsigned int SwathWidthSingleDPPY[],unsigned int SwathWidthSingleDPPC[],unsigned int SwathWidthY[],unsigned int SwathWidthC[],unsigned int MaximumSwathHeightY[],unsigned int MaximumSwathHeightC[],unsigned int swath_width_luma_ub[],unsigned int swath_width_chroma_ub[]) CalculateSwathWidth() argument
1242 CalculateRequiredDispclk(enum dml2_odm_mode ODMMode,double PixelClock,bool isTMDS420) CalculateRequiredDispclk() argument
1295 enum dml2_odm_mode ODMMode; TruncToValidBPP() local
3978 enum dml2_odm_mode ODMMode = dml2_odm_mode_bypass; DecideODMMode() local
4059 ValidateODMMode(enum dml2_odm_mode ODMMode,double MaxDispclk,unsigned int HActive,enum dml2_output_format_class OutFormat,bool UseDSC,unsigned int NumberOfDSCSlices,unsigned int TotalNumberOfActiveDPP,unsigned int TotalNumberOfActiveOPP,unsigned int MaxNumDPP,unsigned int MaxNumOPP,double DISPCLKRequired,unsigned int NumberOfDPPRequired,unsigned int MaxHActiveForDSC,unsigned int MaxDSCSlices,unsigned int MaxHActiveFor420) ValidateODMMode() argument
4139 CalculateODMMode(unsigned int MaximumPixelsPerLinePerDSCUnit,unsigned int HActive,enum dml2_output_format_class OutFormat,enum dml2_output_encoder_class Output,enum dml2_odm_mode ODMUse,double MaxDispclk,bool DSCEnable,unsigned int TotalNumberOfActiveDPP,unsigned int TotalNumberOfActiveOPP,unsigned int MaxNumDPP,unsigned int MaxNumOPP,double PixelClock,unsigned int NumberOfDSCSlices,bool * TotalAvailablePipesSupport,unsigned int * NumberOfDPP,enum dml2_odm_mode * ODMMode,double * RequiredDISPCLKPerSurface) CalculateODMMode() argument
4511 DSCDelayRequirement(bool DSCEnabled,enum dml2_odm_mode ODMMode,unsigned int DSCInputBitPerComponent,double OutputBpp,unsigned int HActive,unsigned int HTotal,unsigned int NumberOfDSCSlices,enum dml2_output_format_class OutputFormat,enum dml2_output_encoder_class Output,double PixelClock,double PixelClockBackEnd) DSCDelayRequirement() argument
[all...] |
| H A D | dml2_core_shared_types.h | 128 enum dml2_odm_mode ODMMode; global() member
291 enum dml2_odm_mode ODMMode[DML2_MAX_PLANES]; /// <brief ODM mode that is chosen in the mode check stage and will be used in mode programming stage global() member
576 enum dml2_odm_mode ODMMode[DML2_MAX_PLANES]; global() member
667 enum dml2_odm_mode ODMMode[DML2_MAX_PLANES]; global() member
1794 enum dml2_odm_mode *ODMMode; global() member
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core.c | 4327 CalculateSwathWidth(dml_bool_t ForceSingleDPP,dml_uint_t NumberOfActiveSurfaces,enum dml_source_format_class SourcePixelFormat[],enum dml_rotation_angle SourceScan[],dml_bool_t ViewportStationary[],dml_uint_t ViewportWidth[],dml_uint_t ViewportHeight[],dml_uint_t ViewportXStart[],dml_uint_t ViewportYStart[],dml_uint_t ViewportXStartC[],dml_uint_t ViewportYStartC[],dml_uint_t SurfaceWidthY[],dml_uint_t SurfaceWidthC[],dml_uint_t SurfaceHeightY[],dml_uint_t SurfaceHeightC[],enum dml_odm_mode ODMMode[],dml_uint_t BytePerPixY[],dml_uint_t BytePerPixC[],dml_uint_t Read256BytesBlockHeightY[],dml_uint_t Read256BytesBlockHeightC[],dml_uint_t Read256BytesBlockWidthY[],dml_uint_t Read256BytesBlockWidthC[],dml_uint_t BlendingAndTiming[],dml_uint_t HActive[],dml_float_t HRatio[],dml_uint_t DPPPerSurface[],dml_uint_t SwathWidthSingleDPPY[],dml_uint_t SwathWidthSingleDPPC[],dml_uint_t SwathWidthY[],dml_uint_t SwathWidthC[],dml_uint_t MaximumSwathHeightY[],dml_uint_t MaximumSwathHeightC[],dml_uint_t swath_width_luma_ub[],dml_uint_t swath_width_chroma_ub[]) CalculateSwathWidth() argument
5544 CalculateODMMode(dml_uint_t MaximumPixelsPerLinePerDSCUnit,dml_uint_t HActive,enum dml_output_encoder_class Output,enum dml_output_format_class OutputFormat,enum dml_odm_use_policy ODMUse,dml_float_t StateDispclk,dml_float_t MaxDispclk,dml_bool_t DSCEnable,dml_uint_t TotalNumberOfActiveDPP,dml_uint_t MaxNumDPP,dml_float_t PixelClock,dml_float_t DISPCLKDPPCLKDSCCLKDownSpreading,dml_float_t DISPCLKRampingMargin,dml_float_t DISPCLKDPPCLKVCOSpeed,dml_uint_t NumberOfDSCSlices,dml_bool_t * TotalAvailablePipesSupport,dml_uint_t * NumberOfDPP,enum dml_odm_mode * ODMMode,dml_float_t * RequiredDISPCLKPerSurface) CalculateODMMode() argument
5616 CalculateRequiredDispclk(enum dml_odm_mode ODMMode,dml_float_t PixelClock,dml_float_t DISPCLKDPPCLKDSCCLKDownSpreading,dml_float_t DISPCLKRampingMargin,dml_float_t DISPCLKDPPCLKVCOSpeed,dml_float_t MaxDispclk) CalculateRequiredDispclk() argument
5889 DSCDelayRequirement(dml_bool_t DSCEnabled,enum dml_odm_mode ODMMode,dml_uint_t DSCInputBitPerComponent,dml_float_t OutputBpp,dml_uint_t HActive,dml_uint_t HTotal,dml_uint_t NumberOfDSCSlices,enum dml_output_format_class OutputFormat,enum dml_output_encoder_class Output,dml_float_t PixelClock,dml_float_t PixelClockBackEnd) DSCDelayRequirement() argument
[all...] |
| H A D | dml2_dc_resource_mgmt.c | 1061 const unsigned int *ODMMode, *DPPPerSurface; in dml2_map_dc_pipes() local
|
| H A D | display_mode_core_structs.h | 470 enum dml_odm_mode ODMMode; member
656 …enum dml_odm_mode ODMMode[__DML_NUM_PLANES__]; /// <brief ODM mode that is chosen in the mode chec… member
792 …enum dml_odm_mode ODMMode[__DML_NUM_PLANES__]; /// <brief ODM mode that is chosen in the mode chec… member
1495 enum dml_odm_mode *ODMMode; member
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 118 enum odm_combine_mode ODMMode; member
|