| /freebsd/contrib/llvm-project/clang/include/clang/Analysis/Analyses/ |
| H A D | ThreadSafetyLogical.h | 27 Not enumerator
86 Not(LExpr *Exp) : LExpr(LExpr::Not), Exp(Exp) {} in Not() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 434 bool &Not) { in getRegForI1Value()
921 bool Not; in selectSelect() local
1116 bool Not = false; in selectFCmp() local
1329 bool Not; in selectBr() local
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CompressInstEmitter.cpp | 727 StringRef Not = Op.first ? "!" : ""; in emitCompressInstEmitter() local
738 StringRef Not = Op.first ? "!" : ""; in emitCompressInstEmitter() local
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanConstruction.cpp | 392 auto *Not = new VPInstruction(VPInstruction::Not, {Term->getOperand(0)}); in canonicalHeaderAndLatch() local
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| H A D | VPlan.h | 958 Not, enumerator
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCExpr.h | 248 Not, ///< Bitwise negation. enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAddSub.cpp | 1723 Value *Not = Builder.CreateXor(A, AllOnes); in visitAdd() local
2693 Value *Not = Builder.CreateNot(Op1); in visitSub() local
2699 Value *Not = Builder.CreateNot(Op0); in visitSub() local
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| H A D | InstCombineCompares.cpp | 4398 static bool isMaskOrZero(const Value *V, bool Not, const SimplifyQuery &Q, in isMaskOrZero()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 2861 Use &Not = cast<Instruction>(InsertElt)->getOperandUse(1); in isProfitableToSinkOperands() local
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| H A D | RISCVISelDAGToDAG.cpp | 3159 MachineSDNode *Not = CurDAG->getMachineNode( in selectShiftMask() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 691 auto Not = [&](auto V) -> std::pair<Value *, uint8_t> { in simplifyTernarylogic() local
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| H A D | X86ISelLowering.cpp | 5398 if (SDValue Not = IsNOT(V.getOperand(0), DAG)) { in IsNOT() local
31758 bool Not = false; in FindSingleBitChange() local
50756 if (SDValue Not = IsNOT(N0, DAG)) { in combineAndNotIntoANDNP() local
50759 } else if (SDValue Not = IsNOT(N1, DAG)) { in combineAndNotIntoANDNP() local
50804 if (SDValue Not = IsNOT(Src, DAG)) { in combineAndShuffleNot() local
50820 if (SDValue Not = GetNot(N0)) { in combineAndShuffleNot() local
50823 } else if (SDValue Not = GetNot(N1)) { in combineAndShuffleNot() local
55324 if (SDValue Not = IsNOT(N0, DAG)) in combineAndnp() local
55364 SDValue Not = getConstVector(EltBits0, VT, DAG, DL); in combineAndnp() local
55420 if (SDValue Not = IsNOT(N1, DAG)) in combineAndnp() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 2767 SDValue Not = in lowerShiftLeftParts() local
2806 SDValue Not = in lowerShiftRightParts() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 8195 MachineInstr *Not = in lowerScalarXnor() local
8227 MachineInstr &Not = *BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), NewDest) in splitScalarNotBinop() local
8252 MachineInstr &Not = *BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), Interm) in splitScalarBinOpN2() local
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| H A D | AMDGPUISelLowering.cpp | 2490 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64); in LowerFTRUNC() local
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| H A D | AMDGPULegalizerInfo.cpp | 2592 auto Not = B.buildNot(S64, Shr); in legalizeIntrinsicTrunc() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1679 SDValue Not = TLO.DAG.getNOT(dl, Op0.getOperand(0), VT); in SimplifyDemandedBits() local
5496 SDValue Not = DAG.getNOT(dl, N1, OpVT); in SimplifySetCC() local
9567 SDValue Not = DAG.getNode(ISD::VP_XOR, dl, VT, Op, in expandVPCTTZ() local
10886 SDValue Not = DAG.getNOT(dl, OverflowMask, VT); in expandAddSubSat() local
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| H A D | DAGCombiner.cpp | 2763 SDValue Not = ShiftOp.getOperand(0); in foldAddSubOfSignBit() local
2859 SDValue Not = DAG.getNOT(DL, X, X.getValueType()); in visitADDLike() local
3009 SDValue Not = DAG.getNOT(DL, N0.getOperand(0), VT); in visitADDLike() local
3017 SDValue Not = DAG.getNOT(DL, N0.getOperand(1), VT); in visitADDLike() local
3319 SDValue Not = DAG.getNOT(DL, N0.getOperand(0), VT); in visitADDLikeCommutative() local
3992 SDValue Not = in foldSubCtlzNot() local
12118 SDValue Not = DAG.getNOT(DL, Sra, VT); in foldVSelectToSignBitSplatMask() local
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| H A D | SelectionDAG.cpp | 6110 if (SDValue NotOperand = in haveNoCommonBitsSetCommutative()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 3689 auto Not = Builder.buildNot(MRI.getType(X), X); in applyXorOfAndWithSameReg() local
7081 Register Not = MRI.createGenericVirtualRegister(CondTy); in tryFoldSelectOfConstants() local
7108 Register Not = MRI.createGenericVirtualRegister(CondTy); in tryFoldSelectOfConstants() local
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| H A D | LegalizerHelper.cpp | 8962 Register Not = IsAdd ? MIRBuilder.buildNot(Ty, LHS).getReg(0) : LHS; in lowerAddSubSatToMinMax() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 3919 MachineSDNode *Not = in tryShiftAmountMod() local
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