/freebsd/contrib/llvm-project/clang/include/clang/Analysis/Analyses/ |
H A D | ThreadSafetyLogical.h | 27 Not enumerator 86 Not(LExpr *Exp) : LExpr(LExpr::Not), Exp(Exp) {} in Not() function
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyFastISel.cpp | 428 bool &Not) { in getRegForI1Value() 915 bool Not; in selectSelect() local 1107 bool Not = false; in selectFCmp() local 1320 bool Not; in selectBr() local
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CompressInstEmitter.cpp | 692 StringRef Not = Op.first ? "!" : ""; in emitCompressInstEmitter() local 703 StringRef Not = Op.first ? "!" : ""; in emitCompressInstEmitter() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAddSub.cpp | 1668 Value *Not = Builder.CreateXor(A, AllOnes); in visitAdd() local 2532 Value *Not = Builder.CreateNot(Op1); in visitSub() local 2538 Value *Not = Builder.CreateNot(Op0); in visitSub() local
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H A D | InstCombineCompares.cpp | 4182 static bool isMaskOrZero(const Value *V, bool Not, const SimplifyQuery &Q, in isMaskOrZero()
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/freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCExpr.h | 437 Not, ///< Bitwise negation. enumerator
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstCombineIntrinsic.cpp | 695 auto Not = [&](auto V) -> std::pair<Value *, uint8_t> { in simplifyTernarylogic() local
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H A D | X86ISelLowering.cpp | 5120 if (SDValue Not = IsNOT(V.getOperand(0), DAG)) { in IsNOT() local 30543 bool Not = false; in FindSingleBitChange() local 48999 if (SDValue Not = IsNOT(N0, DAG)) { in combineAndNotIntoANDNP() local 49002 } else if (SDValue Not = IsNOT(N1, DAG)) { in combineAndNotIntoANDNP() local 49047 if (SDValue Not = IsNOT(Src, DAG)) { in combineAndShuffleNot() local 49063 if (SDValue Not = GetNot(N0)) { in combineAndShuffleNot() local 49066 } else if (SDValue Not = GetNot(N1)) { in combineAndShuffleNot() local 53489 if (SDValue Not = IsNOT(N0, DAG)) in combineAndnp() local 53495 if (SDValue Not = IsNOT(N1, DAG)) in combineAndnp() local 53522 SDValue Not = getConstVector(EltBits0, VT, DAG, DL); in combineAndnp() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2615 SDValue Not = in lowerShiftLeftParts() local 2654 SDValue Not = in lowerShiftRightParts() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.cpp | 7704 MachineInstr *Not = in lowerScalarXnor() local 7736 MachineInstr &Not = *BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), NewDest) in splitScalarNotBinop() local 7761 MachineInstr &Not = *BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), Interm) in splitScalarBinOpN2() local
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H A D | AMDGPUISelLowering.cpp | 2433 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64); in LowerFTRUNC() local
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H A D | AMDGPULegalizerInfo.cpp | 2542 auto Not = B.buildNot(S64, Shr); in legalizeIntrinsicTrunc() local
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1632 SDValue Not = TLO.DAG.getNOT(dl, Op0.getOperand(0), VT); in SimplifyDemandedBits() local 5282 SDValue Not = DAG.getNOT(dl, N1, OpVT); in SimplifySetCC() local 9161 SDValue Not = DAG.getNode(ISD::VP_XOR, dl, VT, Op, in expandVPCTTZ() local 10394 SDValue Not = DAG.getNOT(dl, OverflowMask, VT); in expandAddSubSat() local
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H A D | DAGCombiner.cpp | 2601 SDValue Not = ShiftOp.getOperand(0); in foldAddSubOfSignBit() local 2697 SDValue Not = DAG.getNOT(DL, X, X.getValueType()); in visitADDLike() local 2847 SDValue Not = DAG.getNOT(DL, N0.getOperand(0), VT); in visitADDLike() local 2855 SDValue Not = DAG.getNOT(DL, N0.getOperand(1), VT); in visitADDLike() local 3159 SDValue Not = DAG.getNOT(DL, N0.getOperand(0), VT); in visitADDLikeCommutative() local 11584 SDValue Not = DAG.getNOT(DL, Sra, VT); in foldVSelectToSignBitSplatMask() local
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H A D | SelectionDAG.cpp | 5713 if (SDValue NotOperand = in haveNoCommonBitsSetCommutative()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.cpp | 2807 MachineSDNode *Not = in selectShiftMask() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | VPlan.h | 1238 Not, enumerator
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 3539 auto Not = Builder.buildNot(MRI.getType(X), X); in applyXorOfAndWithSameReg() local 6799 Register Not = MRI.createGenericVirtualRegister(CondTy); in tryFoldSelectOfConstants() local
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H A D | LegalizerHelper.cpp | 8041 Register Not = IsAdd ? MIRBuilder.buildNot(Ty, LHS).getReg(0) : LHS; in lowerAddSubSatToMinMax() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 3817 MachineSDNode *Not = in tryShiftAmountMod() local
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