| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | VFABIDemangling.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineNegator.cpp | 546 [[nodiscard]] Value *Negator::Negate(bool LHSIsZero, bool IsNSW, Value *Root, in Negate() function in Negator
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVInstPrinter.cpp | 281 bool Negate) { in printStackAdj()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86InstComments.cpp | 279 bool Negate = false; in printFMAComments() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 2404 static SDValue combineBallotPattern(SDValue VCMP, bool &Negate) { in combineBallotPattern()
2445 bool Negate = false; in SelectBRCOND() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 1587 auto IsOutOfRangeConstant = [&](const MCExpr *E, bool Negate) -> bool { in parsePCRel()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4358 bool HasVSX, bool &Swap, bool &Negate) { in getVCmpInst()
4575 bool Swap, Negate; in trySETCC() local
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyLibCalls.cpp | 159 bool Negate = Str[0] == '-'; in convertStrToInt() local
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| /freebsd/contrib/llvm-project/clang/lib/Analysis/ |
| H A D | CFG.cpp | 1091 if (const auto *Negate = dyn_cast<UnaryOperator>(E1)) { in checkIncorrectLogicOperator() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 4169 bool Negate) { in SelectSVEAddSubSSatImm()
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| H A D | AArch64ISelLowering.cpp | 3680 AArch64CC::CondCode &OutCC, bool Negate, SDValue CCOp, in emitConjunctionRec()
18354 auto Negate = [&](SDValue N) { in performMulCombine() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4785 Register Val, AArch64CC::CondCode &OutCC, bool Negate, Register CCOp, in emitConjunctionRec()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 14097 SDValue Negate = DCI.DAG.getNode(ISD::SUB, dl, MVT::i32, in PerformSUBCombine() local
18184 bool &Negate) { in SearchLoopIntrinsic()
18238 bool Negate = false; in PerformHWLoopCombine() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3148 bool Negate = false; in parseImm() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 3706 bool Negate = false; in visitSelect() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 3728 bool Negate = false; lowerBuildVectorOfConstants() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 55319 auto MatchGeneric = [&](SDValue N0, SDValue N1, bool Negate) { in combineX86AddSub()
|