| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ExpandSpecialInstrs.cpp | 89 MachineInstr *Mov = TII->buildMovInstr(&MBB, I, in runOnMachineFunction() local
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| H A D | SIPreEmitPeephole.cpp | 94 const unsigned Mov = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in optimizeVccBranch() local
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| H A D | R600InstrInfo.cpp | 1109 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, R600::MOV, in buildIndirectWrite() local
1141 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, R600::MOV, in buildIndirectRead() local
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| H A D | SILoadStoreOptimizer.cpp | 1926 MachineInstr *Mov = in createRegOrImm() local
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| H A D | AMDGPUISelDAGToDAG.cpp | 836 SDNode *Mov = CurDAG->getMachineNode( in getMaterializedScalarImm32() local
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| H A D | AMDGPUInstructionSelector.cpp | 1479 unsigned Mov = DstRB->getID() == AMDGPU::SGPRRegBankID ? in selectGroupStaticSize() local
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| H A D | SIISelLowering.cpp | 6989 SDNode *Mov = DAG.getMachineNode(AMDGPU::S_MOV_B64, DL, MVT::i64, in getSegmentAperture() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 5253 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val); in tryAdvSIMDModImm8() local
5285 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val).addImm(Shift); in tryAdvSIMDModImm16() local
5321 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val).addImm(Shift); in tryAdvSIMDModImm32() local
5341 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val); in tryAdvSIMDModImm64() local
5373 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val).addImm(Shift); in tryAdvSIMDModImm321s() local
5402 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val); in tryAdvSIMDModImmFP() local
5598 auto Mov = in emitConstantVector() local
5605 auto Mov = in emitConstantVector() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 3836 SDNode *Mov = in SelectV2I64toI128() local
3867 SDNode *Mov = CurDAG->getMachineNode( in SelectI128toV2I64() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2088 SDNode *Mov = CurDAG->getMachineNode(Op, DL, {MVT::Untyped, MVT::Other}, Ops); in SelectMultiVectorMove() local
2124 SDNode *Mov = CurDAG->getMachineNode(Op, DL, {MVT::Untyped, MVT::Other}, Ops); in SelectMultiVectorMoveZ() local
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| H A D | AArch64ISelLowering.cpp | 13424 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm64() local
13467 SDValue Mov; in tryAdvSIMDModImm32() local
13512 SDValue Mov; in tryAdvSIMDModImm16() local
13552 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm321s() local
13574 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm8() local
13605 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImmFP() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 1020 MachineInstrBuilder Mov; in copyPhysReg() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8421 SDValue Mov = DAG.getNode(PPCISD::MFVSR, dl, Op.getValueType(), Conv); in LowerFP_TO_INTDirectMove() local
8686 SDValue Mov = DAG.getNode(MovOpc, dl, MVT::f64, Src); in LowerINT_TO_FPDirectMove() local
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