1 /* 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2016-2024, Broadcom Inc. All rights reserved. 5 * Support: <fbsd-storage-driver.pdl@broadcom.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are 9 * met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation and/or other 15 * materials provided with the distribution. 16 * 3. Neither the name of the Broadcom Inc. nor the names of its contributors 17 * may be used to endorse or promote products derived from this software without 18 * specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 * 32 * The views and conclusions contained in the software and documentation are 33 * those of the authors and should not be interpreted as representing 34 * official policies,either expressed or implied, of the FreeBSD Project. 35 * 36 * Mail to: Broadcom Inc 1320 Ridder Park Dr, San Jose, CA 95131 37 * 38 * Broadcom Inc. (Broadcom) MPI3MR Adapter FreeBSD 39 * 40 */ 41 #ifndef MPI30_IOC_H 42 #define MPI30_IOC_H 1 43 44 /***************************************************************************** 45 * IOC Messages * 46 ****************************************************************************/ 47 48 /***************************************************************************** 49 * IOCInit Request Message * 50 ****************************************************************************/ 51 typedef struct _MPI3_IOC_INIT_REQUEST 52 { 53 U16 HostTag; /* 0x00 */ 54 U8 IOCUseOnly02; /* 0x02 */ 55 U8 Function; /* 0x03 */ 56 U16 IOCUseOnly04; /* 0x04 */ 57 U8 IOCUseOnly06; /* 0x06 */ 58 U8 MsgFlags; /* 0x07 */ 59 U16 ChangeCount; /* 0x08 */ 60 U16 Reserved0A; /* 0x0A */ 61 MPI3_VERSION_UNION MPIVersion; /* 0x0C */ 62 U64 TimeStamp; /* 0x10 */ 63 U8 Reserved18; /* 0x18 */ 64 U8 WhoInit; /* 0x19 */ 65 U16 Reserved1A; /* 0x1A */ 66 U16 ReplyFreeQueueDepth; /* 0x1C */ 67 U16 Reserved1E; /* 0x1E */ 68 U64 ReplyFreeQueueAddress; /* 0x20 */ 69 U32 Reserved28; /* 0x28 */ 70 U16 SenseBufferFreeQueueDepth; /* 0x2C */ 71 U16 SenseBufferLength; /* 0x2E */ 72 U64 SenseBufferFreeQueueAddress; /* 0x30 */ 73 U64 DriverInformationAddress; /* 0x38 */ 74 } MPI3_IOC_INIT_REQUEST, MPI3_POINTER PTR_MPI3_IOC_INIT_REQUEST, 75 Mpi3IOCInitRequest_t, MPI3_POINTER pMpi3IOCInitRequest_t; 76 77 /**** Defines for the MsgFlags field ****/ 78 #define MPI3_IOCINIT_MSGFLAGS_WRITESAMEDIVERT_SUPPORTED (0x08) 79 #define MPI3_IOCINIT_MSGFLAGS_SCSIIOSTATUSREPLY_SUPPORTED (0x04) 80 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_MASK (0x03) 81 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_NOT_USED (0x00) 82 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_SEPARATED (0x01) 83 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_INLINE (0x02) 84 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_BOTH (0x03) 85 86 /**** Defines for the WhoInit field ****/ 87 #define MPI3_WHOINIT_NOT_INITIALIZED (0x00) 88 #define MPI3_WHOINIT_ROM_BIOS (0x02) 89 #define MPI3_WHOINIT_HOST_DRIVER (0x03) 90 #define MPI3_WHOINIT_MANUFACTURER (0x04) 91 92 /**** Defines for the DriverInformationAddress field */ 93 typedef struct _MPI3_DRIVER_INFO_LAYOUT 94 { 95 U32 InformationLength; /* 0x00 */ 96 U8 DriverSignature[12]; /* 0x04 */ 97 U8 OsName[16]; /* 0x10 */ 98 U8 OsVersion[12]; /* 0x20 */ 99 U8 DriverName[20]; /* 0x2C */ 100 U8 DriverVersion[32]; /* 0x40 */ 101 U8 DriverReleaseDate[20]; /* 0x60 */ 102 U32 DriverCapabilities; /* 0x74 */ 103 } MPI3_DRIVER_INFO_LAYOUT, MPI3_POINTER PTR_MPI3_DRIVER_INFO_LAYOUT, 104 Mpi3DriverInfoLayout_t, MPI3_POINTER pMpi3DriverInfoLayout_t; 105 106 /***************************************************************************** 107 * IOCFacts Request Message * 108 ****************************************************************************/ 109 typedef struct _MPI3_IOC_FACTS_REQUEST 110 { 111 U16 HostTag; /* 0x00 */ 112 U8 IOCUseOnly02; /* 0x02 */ 113 U8 Function; /* 0x03 */ 114 U16 IOCUseOnly04; /* 0x04 */ 115 U8 IOCUseOnly06; /* 0x06 */ 116 U8 MsgFlags; /* 0x07 */ 117 U16 ChangeCount; /* 0x08 */ 118 U16 Reserved0A; /* 0x0A */ 119 U32 Reserved0C; /* 0x0C */ 120 MPI3_SGE_UNION SGL; /* 0x10 */ 121 } MPI3_IOC_FACTS_REQUEST, MPI3_POINTER PTR_MPI3_IOC_FACTS_REQUEST, 122 Mpi3IOCFactsRequest_t, MPI3_POINTER pMpi3IOCFactsRequest_t; 123 124 /***************************************************************************** 125 * IOCFacts Data * 126 ****************************************************************************/ 127 typedef struct _MPI3_IOC_FACTS_DATA 128 { 129 U16 IOCFactsDataLength; /* 0x00 */ 130 U16 Reserved02; /* 0x02 */ 131 MPI3_VERSION_UNION MPIVersion; /* 0x04 */ 132 MPI3_COMP_IMAGE_VERSION FWVersion; /* 0x08 */ 133 U32 IOCCapabilities; /* 0x10 */ 134 U8 IOCNumber; /* 0x14 */ 135 U8 WhoInit; /* 0x15 */ 136 U16 MaxMSIxVectors; /* 0x16 */ 137 U16 MaxOutstandingRequests; /* 0x18 */ 138 U16 ProductID; /* 0x1A */ 139 U16 IOCRequestFrameSize; /* 0x1C */ 140 U16 ReplyFrameSize; /* 0x1E */ 141 U16 IOCExceptions; /* 0x20 */ 142 U16 MaxPersistentID; /* 0x22 */ 143 U8 SGEModifierMask; /* 0x24 */ 144 U8 SGEModifierValue; /* 0x25 */ 145 U8 SGEModifierShift; /* 0x26 */ 146 U8 ProtocolFlags; /* 0x27 */ 147 U16 MaxSASInitiators; /* 0x28 */ 148 U16 MaxDataLength; /* 0x2A */ 149 U16 MaxSASExpanders; /* 0x2C */ 150 U16 MaxEnclosures; /* 0x2E */ 151 U16 MinDevHandle; /* 0x30 */ 152 U16 MaxDevHandle; /* 0x32 */ 153 U16 MaxPCIeSwitches; /* 0x34 */ 154 U16 MaxNVMe; /* 0x36 */ 155 U16 Reserved38; /* 0x38 */ 156 U16 MaxVDs; /* 0x3A */ 157 U16 MaxHostPDs; /* 0x3C */ 158 U16 MaxAdvHostPDs; /* 0x3E */ 159 U16 MaxRAIDPDs; /* 0x40 */ 160 U16 MaxPostedCmdBuffers; /* 0x42 */ 161 U32 Flags; /* 0x44 */ 162 U16 MaxOperationalRequestQueues; /* 0x48 */ 163 U16 MaxOperationalReplyQueues; /* 0x4A */ 164 U16 ShutdownTimeout; /* 0x4C */ 165 U16 Reserved4E; /* 0x4E */ 166 U32 DiagTraceSize; /* 0x50 */ 167 U32 DiagFwSize; /* 0x54 */ 168 U32 DiagDriverSize; /* 0x58 */ 169 U8 MaxHostPDNsCount; /* 0x5C */ 170 U8 MaxAdvHostPDNsCount; /* 0x5D */ 171 U8 MaxRAIDPDNsCount; /* 0x5E */ 172 U8 MaxDevicesPerThrottleGroup; /* 0x5F */ 173 U16 IOThrottleDataLength; /* 0x60 */ 174 U16 MaxIOThrottleGroup; /* 0x62 */ 175 U16 IOThrottleLow; /* 0x64 */ 176 U16 IOThrottleHigh; /* 0x66 */ 177 U32 DiagFdlSize; /* 0x68 */ 178 U32 DiagTtySize; /* 0x6C */ 179 } MPI3_IOC_FACTS_DATA, MPI3_POINTER PTR_MPI3_IOC_FACTS_DATA, 180 Mpi3IOCFactsData_t, MPI3_POINTER pMpi3IOCFactsData_t; 181 182 /**** Defines for the IOCCapabilities field ****/ 183 #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_MASK (0x80000000) 184 #define MPI3_IOCFACTS_CAPABILITY_SUPERVISOR_IOC (0x00000000) 185 #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_IOC (0x80000000) 186 #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_MASK (0x00000600) 187 #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_FIXED_THRESHOLD (0x00000000) 188 #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_OUTSTANDING_IO (0x00000200) 189 #define MPI3_IOCFACTS_CAPABILITY_COMPLETE_RESET_SUPPORTED (0x00000100) 190 #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_TRACE_SUPPORTED (0x00000080) 191 #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_FW_SUPPORTED (0x00000040) 192 #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_DRIVER_SUPPORTED (0x00000020) 193 #define MPI3_IOCFACTS_CAPABILITY_ADVANCED_HOST_PD_SUPPORTED (0x00000010) 194 #define MPI3_IOCFACTS_CAPABILITY_RAID_SUPPORTED (0x00000008) 195 #define MPI3_IOCFACTS_CAPABILITY_MULTIPATH_SUPPORTED (0x00000002) 196 #define MPI3_IOCFACTS_CAPABILITY_COALESCE_CTRL_SUPPORTED (0x00000001) 197 198 /**** WhoInit values are defined under IOCInit Request Message definition ****/ 199 200 /**** Defines for the ProductID field ****/ 201 #define MPI3_IOCFACTS_PID_TYPE_MASK (0xF000) 202 #define MPI3_IOCFACTS_PID_TYPE_SHIFT (12) 203 #define MPI3_IOCFACTS_PID_PRODUCT_MASK (0x0F00) 204 #define MPI3_IOCFACTS_PID_PRODUCT_SHIFT (8) 205 #define MPI3_IOCFACTS_PID_FAMILY_MASK (0x00FF) 206 #define MPI3_IOCFACTS_PID_FAMILY_SHIFT (0) 207 208 /**** Defines for the IOCExceptions field ****/ 209 #define MPI3_IOCFACTS_EXCEPT_SECURITY_REKEY (0x2000) 210 #define MPI3_IOCFACTS_EXCEPT_SAS_DISABLED (0x1000) 211 #define MPI3_IOCFACTS_EXCEPT_SAFE_MODE (0x0800) 212 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_MASK (0x0700) 213 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_NONE (0x0000) 214 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_MGMT (0x0100) 215 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_MGMT (0x0200) 216 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_MGMT (0x0300) 217 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_OOB (0x0400) 218 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_OOB (0x0500) 219 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_OOB (0x0600) 220 #define MPI3_IOCFACTS_EXCEPT_PCIE_DISABLED (0x0080) 221 #define MPI3_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE (0x0040) 222 #define MPI3_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL (0x0020) 223 #define MPI3_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0010) 224 #define MPI3_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0008) 225 #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_MASK (0x0001) 226 #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_PRIMARY (0x0000) 227 #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_SECONDARY (0x0001) 228 229 /**** Defines for the ProtocolFlags field ****/ 230 #define MPI3_IOCFACTS_PROTOCOL_SAS (0x0010) 231 #define MPI3_IOCFACTS_PROTOCOL_SATA (0x0008) 232 #define MPI3_IOCFACTS_PROTOCOL_NVME (0x0004) 233 #define MPI3_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002) 234 #define MPI3_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001) 235 236 /**** Defines for the MaxDataLength field ****/ 237 #define MPI3_IOCFACTS_MAX_DATA_LENGTH_NOT_REPORTED (0x0000) 238 239 /**** Defines for the Flags field ****/ 240 #define MPI3_IOCFACTS_FLAGS_SIGNED_NVDATA_REQUIRED (0x00010000) 241 #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK (0x0000FF00) 242 #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT (8) 243 #define MPI3_IOCFACTS_FLAGS_MAX_REQ_PER_REPLY_QUEUE_LIMIT (0x00000040) 244 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_MASK (0x00000030) 245 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_NOT_STARTED (0x00000000) 246 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_IN_PROGRESS (0x00000010) 247 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_COMPLETE (0x00000020) 248 #define MPI3_IOCFACTS_FLAGS_PERSONALITY_MASK (0x0000000F) 249 #define MPI3_IOCFACTS_FLAGS_PERSONALITY_EHBA (0x00000000) 250 #define MPI3_IOCFACTS_FLAGS_PERSONALITY_RAID_DDR (0x00000002) 251 252 /**** Defines for the IOThrottleDataLength field ****/ 253 #define MPI3_IOCFACTS_IO_THROTTLE_DATA_LENGTH_NOT_REQUIRED (0x0000) 254 255 /**** Defines for the MaxIOThrottleGroup field ****/ 256 #define MPI3_IOCFACTS_MAX_IO_THROTTLE_GROUP_NOT_REQUIRED (0x0000) 257 258 /**** Defines for the DiagFdlSize field ****/ 259 #define MPI3_IOCFACTS_DIAGFDLSIZE_NOT_SUPPORTED (0x00000000) 260 261 /**** Defines for the DiagTtySize field ****/ 262 #define MPI3_IOCFACTS_DIAGTTYSIZE_NOT_SUPPORTED (0x00000000) 263 264 /***************************************************************************** 265 * Management Passthrough Request Message * 266 ****************************************************************************/ 267 typedef struct _MPI3_MGMT_PASSTHROUGH_REQUEST 268 { 269 U16 HostTag; /* 0x00 */ 270 U8 IOCUseOnly02; /* 0x02 */ 271 U8 Function; /* 0x03 */ 272 U16 IOCUseOnly04; /* 0x04 */ 273 U8 IOCUseOnly06; /* 0x06 */ 274 U8 MsgFlags; /* 0x07 */ 275 U16 ChangeCount; /* 0x08 */ 276 U16 Reserved0A; /* 0x0A */ 277 U32 Reserved0C[5]; /* 0x0C */ 278 MPI3_SGE_UNION CommandSGL; /* 0x20 */ 279 MPI3_SGE_UNION ResponseSGL; /* 0x30 */ 280 } MPI3_MGMT_PASSTHROUGH_REQUEST, MPI3_POINTER PTR_MPI3_MGMT_PASSTHROUGH_REQUEST, 281 Mpi3MgmtPassthroughRequest_t, MPI3_POINTER pMpi3MgmtPassthroughRequest_t; 282 283 /***************************************************************************** 284 * CreateRequestQueue Request Message * 285 ****************************************************************************/ 286 typedef struct _MPI3_CREATE_REQUEST_QUEUE_REQUEST 287 { 288 U16 HostTag; /* 0x00 */ 289 U8 IOCUseOnly02; /* 0x02 */ 290 U8 Function; /* 0x03 */ 291 U16 IOCUseOnly04; /* 0x04 */ 292 U8 IOCUseOnly06; /* 0x06 */ 293 U8 MsgFlags; /* 0x07 */ 294 U16 ChangeCount; /* 0x08 */ 295 U8 Flags; /* 0x0A */ 296 U8 Burst; /* 0x0B */ 297 U16 Size; /* 0x0C */ 298 U16 QueueID; /* 0x0E */ 299 U16 ReplyQueueID; /* 0x10 */ 300 U16 Reserved12; /* 0x12 */ 301 U32 Reserved14; /* 0x14 */ 302 U64 BaseAddress; /* 0x18 */ 303 } MPI3_CREATE_REQUEST_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_CREATE_REQUEST_QUEUE_REQUEST, 304 Mpi3CreateRequestQueueRequest_t, MPI3_POINTER pMpi3CreateRequestQueueRequest_t; 305 306 /**** Defines for the Flags field ****/ 307 #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_MASK (0x80) 308 #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SEGMENTED (0x80) 309 #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS (0x00) 310 311 /**** Defines for the Size field ****/ 312 #define MPI3_CREATE_REQUEST_QUEUE_SIZE_MINIMUM (2) 313 314 /***************************************************************************** 315 * DeleteRequestQueue Request Message * 316 ****************************************************************************/ 317 typedef struct _MPI3_DELETE_REQUEST_QUEUE_REQUEST 318 { 319 U16 HostTag; /* 0x00 */ 320 U8 IOCUseOnly02; /* 0x02 */ 321 U8 Function; /* 0x03 */ 322 U16 IOCUseOnly04; /* 0x04 */ 323 U8 IOCUseOnly06; /* 0x06 */ 324 U8 MsgFlags; /* 0x07 */ 325 U16 ChangeCount; /* 0x08 */ 326 U16 QueueID; /* 0x0A */ 327 } MPI3_DELETE_REQUEST_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_DELETE_REQUEST_QUEUE_REQUEST, 328 Mpi3DeleteRequestQueueRequest_t, MPI3_POINTER pMpi3DeleteRequestQueueRequest_t; 329 330 331 /***************************************************************************** 332 * CreateReplyQueue Request Message * 333 ****************************************************************************/ 334 typedef struct _MPI3_CREATE_REPLY_QUEUE_REQUEST 335 { 336 U16 HostTag; /* 0x00 */ 337 U8 IOCUseOnly02; /* 0x02 */ 338 U8 Function; /* 0x03 */ 339 U16 IOCUseOnly04; /* 0x04 */ 340 U8 IOCUseOnly06; /* 0x06 */ 341 U8 MsgFlags; /* 0x07 */ 342 U16 ChangeCount; /* 0x08 */ 343 U8 Flags; /* 0x0A */ 344 U8 Reserved0B; /* 0x0B */ 345 U16 Size; /* 0x0C */ 346 U16 QueueID; /* 0x0E */ 347 U16 MSIxIndex; /* 0x10 */ 348 U16 Reserved12; /* 0x12 */ 349 U32 Reserved14; /* 0x14 */ 350 U64 BaseAddress; /* 0x18 */ 351 } MPI3_CREATE_REPLY_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_CREATE_REPLY_QUEUE_REQUEST, 352 Mpi3CreateReplyQueueRequest_t, MPI3_POINTER pMpi3CreateReplyQueueRequest_t; 353 354 /**** Defines for the Flags field ****/ 355 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_MASK (0x80) 356 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_SEGMENTED (0x80) 357 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS (0x00) 358 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_COALESCE_DISABLE (0x02) 359 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_MASK (0x01) 360 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_DISABLE (0x00) 361 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_ENABLE (0x01) 362 363 /**** Defines for the Size field ****/ 364 #define MPI3_CREATE_REPLY_QUEUE_SIZE_MINIMUM (2) 365 366 /***************************************************************************** 367 * DeleteReplyQueue Request Message * 368 ****************************************************************************/ 369 typedef struct _MPI3_DELETE_REPLY_QUEUE_REQUEST 370 { 371 U16 HostTag; /* 0x00 */ 372 U8 IOCUseOnly02; /* 0x02 */ 373 U8 Function; /* 0x03 */ 374 U16 IOCUseOnly04; /* 0x04 */ 375 U8 IOCUseOnly06; /* 0x06 */ 376 U8 MsgFlags; /* 0x07 */ 377 U16 ChangeCount; /* 0x08 */ 378 U16 QueueID; /* 0x0A */ 379 } MPI3_DELETE_REPLY_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_DELETE_REPLY_QUEUE_REQUEST, 380 Mpi3DeleteReplyQueueRequest_t, MPI3_POINTER pMpi3DeleteReplyQueueRequest_t; 381 382 383 /***************************************************************************** 384 * PortEnable Request Message * 385 ****************************************************************************/ 386 typedef struct _MPI3_PORT_ENABLE_REQUEST 387 { 388 U16 HostTag; /* 0x00 */ 389 U8 IOCUseOnly02; /* 0x02 */ 390 U8 Function; /* 0x03 */ 391 U16 IOCUseOnly04; /* 0x04 */ 392 U8 IOCUseOnly06; /* 0x06 */ 393 U8 MsgFlags; /* 0x07 */ 394 U16 ChangeCount; /* 0x08 */ 395 U16 Reserved0A; /* 0x0A */ 396 } MPI3_PORT_ENABLE_REQUEST, MPI3_POINTER PTR_MPI3_PORT_ENABLE_REQUEST, 397 Mpi3PortEnableRequest_t, MPI3_POINTER pMpi3PortEnableRequest_t; 398 399 400 /***************************************************************************** 401 * IOC Events and Event Management * 402 ****************************************************************************/ 403 #define MPI3_EVENT_LOG_DATA (0x01) 404 #define MPI3_EVENT_CHANGE (0x02) 405 #define MPI3_EVENT_GPIO_INTERRUPT (0x04) 406 #define MPI3_EVENT_CABLE_MGMT (0x06) 407 #define MPI3_EVENT_DEVICE_ADDED (0x07) 408 #define MPI3_EVENT_DEVICE_INFO_CHANGED (0x08) 409 #define MPI3_EVENT_PREPARE_FOR_RESET (0x09) 410 #define MPI3_EVENT_COMP_IMAGE_ACT_START (0x0A) 411 #define MPI3_EVENT_ENCL_DEVICE_ADDED (0x0B) 412 #define MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE (0x0C) 413 #define MPI3_EVENT_DEVICE_STATUS_CHANGE (0x0D) 414 #define MPI3_EVENT_ENERGY_PACK_CHANGE (0x0E) 415 #define MPI3_EVENT_SAS_DISCOVERY (0x11) 416 #define MPI3_EVENT_SAS_BROADCAST_PRIMITIVE (0x12) 417 #define MPI3_EVENT_SAS_NOTIFY_PRIMITIVE (0x13) 418 #define MPI3_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x14) 419 #define MPI3_EVENT_SAS_INIT_TABLE_OVERFLOW (0x15) 420 #define MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST (0x16) 421 #define MPI3_EVENT_SAS_PHY_COUNTER (0x18) 422 #define MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR (0x19) 423 #define MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST (0x20) 424 #define MPI3_EVENT_PCIE_ENUMERATION (0x22) 425 #define MPI3_EVENT_PCIE_ERROR_THRESHOLD (0x23) 426 #define MPI3_EVENT_HARD_RESET_RECEIVED (0x40) 427 #define MPI3_EVENT_DIAGNOSTIC_BUFFER_STATUS_CHANGE (0x50) 428 #define MPI3_EVENT_MIN_PRODUCT_SPECIFIC (0x60) 429 #define MPI3_EVENT_MAX_PRODUCT_SPECIFIC (0x7F) 430 431 432 /***************************************************************************** 433 * Event Notification Request Message * 434 ****************************************************************************/ 435 #define MPI3_EVENT_NOTIFY_EVENTMASK_WORDS (4) 436 437 typedef struct _MPI3_EVENT_NOTIFICATION_REQUEST 438 { 439 U16 HostTag; /* 0x00 */ 440 U8 IOCUseOnly02; /* 0x02 */ 441 U8 Function; /* 0x03 */ 442 U16 IOCUseOnly04; /* 0x04 */ 443 U8 IOCUseOnly06; /* 0x06 */ 444 U8 MsgFlags; /* 0x07 */ 445 U16 ChangeCount; /* 0x08 */ 446 U16 Reserved0A; /* 0x0A */ 447 U16 SASBroadcastPrimitiveMasks; /* 0x0C */ 448 U16 SASNotifyPrimitiveMasks; /* 0x0E */ 449 U32 EventMasks[MPI3_EVENT_NOTIFY_EVENTMASK_WORDS]; /* 0x10 */ 450 } MPI3_EVENT_NOTIFICATION_REQUEST, MPI3_POINTER PTR_MPI3_EVENT_NOTIFICATION_REQUEST, 451 Mpi3EventNotificationRequest_t, MPI3_POINTER pMpi3EventNotificationRequest_t; 452 453 /**** Defines for the SASBroadcastPrimitiveMasks field - use MPI3_EVENT_BROADCAST_PRIMITIVE_ values ****/ 454 455 /**** Defines for the SASNotifyPrimitiveMasks field - use MPI3_EVENT_NOTIFY_PRIMITIVE_ values ****/ 456 457 /**** Defines for the EventMasks field - use MPI3_EVENT_ values ****/ 458 459 /***************************************************************************** 460 * Event Notification Reply Message * 461 ****************************************************************************/ 462 typedef struct _MPI3_EVENT_NOTIFICATION_REPLY 463 { 464 U16 HostTag; /* 0x00 */ 465 U8 IOCUseOnly02; /* 0x02 */ 466 U8 Function; /* 0x03 */ 467 U16 IOCUseOnly04; /* 0x04 */ 468 U8 IOCUseOnly06; /* 0x06 */ 469 U8 MsgFlags; /* 0x07 */ 470 U16 IOCUseOnly08; /* 0x08 */ 471 U16 IOCStatus; /* 0x0A */ 472 U32 IOCLogInfo; /* 0x0C */ 473 U8 EventDataLength; /* 0x10 */ 474 U8 Event; /* 0x11 */ 475 U16 IOCChangeCount; /* 0x12 */ 476 U32 EventContext; /* 0x14 */ 477 U32 EventData[1]; /* 0x18 */ 478 } MPI3_EVENT_NOTIFICATION_REPLY, MPI3_POINTER PTR_MPI3_EVENT_NOTIFICATION_REPLY, 479 Mpi3EventNotificationReply_t, MPI3_POINTER pMpi3EventNotificationReply_t; 480 481 /**** Defines for the MsgFlags field ****/ 482 #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_MASK (0x01) 483 #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_REQUIRED (0x01) 484 #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_NOT_REQUIRED (0x00) 485 #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_MASK (0x02) 486 #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_ORIGINAL (0x00) 487 #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_REPLAY (0x02) 488 489 /**** Defines for the Event field - use MPI3_EVENT_ values ****/ 490 491 492 /***************************************************************************** 493 * GPIO Interrupt Event * 494 ****************************************************************************/ 495 typedef struct _MPI3_EVENT_DATA_GPIO_INTERRUPT 496 { 497 U8 GPIONum; /* 0x00 */ 498 U8 Reserved01[3]; /* 0x01 */ 499 } MPI3_EVENT_DATA_GPIO_INTERRUPT, MPI3_POINTER PTR_MPI3_EVENT_DATA_GPIO_INTERRUPT, 500 Mpi3EventDataGpioInterrupt_t, MPI3_POINTER pMpi3EventDataGpioInterrupt_t; 501 502 503 /***************************************************************************** 504 * Cable Management Event * 505 ****************************************************************************/ 506 typedef struct _MPI3_EVENT_DATA_CABLE_MANAGEMENT 507 { 508 U32 ActiveCablePowerRequirement; /* 0x00 */ 509 U8 Status; /* 0x04 */ 510 U8 ReceptacleID; /* 0x05 */ 511 U16 Reserved06; /* 0x06 */ 512 } MPI3_EVENT_DATA_CABLE_MANAGEMENT, MPI3_POINTER PTR_MPI3_EVENT_DATA_CABLE_MANAGEMENT, 513 Mpi3EventDataCableManagement_t, MPI3_POINTER pMpi3EventDataCableManagement_t; 514 515 /**** Defines for the ActiveCablePowerRequirement field ****/ 516 #define MPI3_EVENT_CABLE_MGMT_ACT_CABLE_PWR_INVALID (0xFFFFFFFF) 517 518 /**** Defines for the Status field ****/ 519 #define MPI3_EVENT_CABLE_MGMT_STATUS_INSUFFICIENT_POWER (0x00) 520 #define MPI3_EVENT_CABLE_MGMT_STATUS_PRESENT (0x01) 521 #define MPI3_EVENT_CABLE_MGMT_STATUS_DEGRADED (0x02) 522 523 524 /***************************************************************************** 525 * Event Ack Request Message * 526 ****************************************************************************/ 527 typedef struct _MPI3_EVENT_ACK_REQUEST 528 { 529 U16 HostTag; /* 0x00 */ 530 U8 IOCUseOnly02; /* 0x02 */ 531 U8 Function; /* 0x03 */ 532 U16 IOCUseOnly04; /* 0x04 */ 533 U8 IOCUseOnly06; /* 0x06 */ 534 U8 MsgFlags; /* 0x07 */ 535 U16 ChangeCount; /* 0x08 */ 536 U16 Reserved0A; /* 0x0A */ 537 U8 Event; /* 0x0C */ 538 U8 Reserved0D[3]; /* 0x0D */ 539 U32 EventContext; /* 0x10 */ 540 } MPI3_EVENT_ACK_REQUEST, MPI3_POINTER PTR_MPI3_EVENT_ACK_REQUEST, 541 Mpi3EventAckRequest_t, MPI3_POINTER pMpi3EventAckRequest_t; 542 543 /**** Defines for the Event field - use MPI3_EVENT_ values ****/ 544 545 546 /***************************************************************************** 547 * Prepare for Reset Event * 548 ****************************************************************************/ 549 typedef struct _MPI3_EVENT_DATA_PREPARE_FOR_RESET 550 { 551 U8 ReasonCode; /* 0x00 */ 552 U8 Reserved01; /* 0x01 */ 553 U16 Reserved02; /* 0x02 */ 554 } MPI3_EVENT_DATA_PREPARE_FOR_RESET, MPI3_POINTER PTR_MPI3_EVENT_DATA_PREPARE_FOR_RESET, 555 Mpi3EventDataPrepareForReset_t, MPI3_POINTER pMpi3EventDataPrepareForReset_t; 556 557 /**** Defines for the ReasonCode field ****/ 558 #define MPI3_EVENT_PREPARE_RESET_RC_START (0x01) 559 #define MPI3_EVENT_PREPARE_RESET_RC_ABORT (0x02) 560 561 562 /***************************************************************************** 563 * Component Image Activation Start Event * 564 ****************************************************************************/ 565 typedef struct _MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION 566 { 567 U32 Reserved00; /* 0x00 */ 568 } MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION, MPI3_POINTER PTR_MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION, 569 Mpi3EventDataCompImageActivation_t, MPI3_POINTER pMpi3EventDataCompImageActivation_t; 570 571 /***************************************************************************** 572 * Device Added Event * 573 ****************************************************************************/ 574 /* 575 * The Device Added Event Data is exactly the same as Device Page 0 data 576 * (including the Configuration Page header). So, please use/refer to 577 * MPI3_DEVICE_PAGE0 structure for Device Added Event data. 578 */ 579 580 /**************************************************************************** 581 * Device Info Changed Event * 582 ****************************************************************************/ 583 /* 584 * The Device Info Changed Event Data is exactly the same as Device Page 0 data 585 * (including the Configuration Page header). So, please use/refer to 586 * MPI3_DEVICE_PAGE0 structure for Device Added Event data. 587 */ 588 589 /***************************************************************************** 590 * Device Status Change Event * 591 ****************************************************************************/ 592 typedef struct _MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE 593 { 594 U16 TaskTag; /* 0x00 */ 595 U8 ReasonCode; /* 0x02 */ 596 U8 IOUnitPort; /* 0x03 */ 597 U16 ParentDevHandle; /* 0x04 */ 598 U16 DevHandle; /* 0x06 */ 599 U64 WWID; /* 0x08 */ 600 U8 LUN[8]; /* 0x10 */ 601 } MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE, 602 Mpi3EventDataDeviceStatusChange_t, MPI3_POINTER pMpi3EventDataDeviceStatusChange_t; 603 604 /**** Defines for the ReasonCode field ****/ 605 #define MPI3_EVENT_DEV_STAT_RC_MOVED (0x01) 606 #define MPI3_EVENT_DEV_STAT_RC_HIDDEN (0x02) 607 #define MPI3_EVENT_DEV_STAT_RC_NOT_HIDDEN (0x03) 608 #define MPI3_EVENT_DEV_STAT_RC_ASYNC_NOTIFICATION (0x04) 609 #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_STRT (0x20) 610 #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_CMP (0x21) 611 #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_STRT (0x22) 612 #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_CMP (0x23) 613 #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_STRT (0x24) 614 #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_CMP (0x25) 615 #define MPI3_EVENT_DEV_STAT_RC_PCIE_HOT_RESET_FAILED (0x30) 616 #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_STRT (0x40) 617 #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_CMP (0x41) 618 #define MPI3_EVENT_DEV_STAT_RC_VD_NOT_RESPONDING (0x50) 619 620 /***************************************************************************** 621 * Energy Pack Change Event * 622 ****************************************************************************/ 623 typedef struct _MPI3_EVENT_DATA_ENERGY_PACK_CHANGE 624 { 625 U32 Reserved00; /* 0x00 */ 626 U16 ShutdownTimeout; /* 0x04 */ 627 U16 Reserved06; /* 0x06 */ 628 } MPI3_EVENT_DATA_ENERGY_PACK_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_ENERGY_PACK_CHANGE, 629 Mpi3EventDataEnergyPackChange_t, MPI3_POINTER pMpi3EventDataEnergyPackChange_t; 630 631 /***************************************************************************** 632 * SAS Discovery Event * 633 ****************************************************************************/ 634 typedef struct _MPI3_EVENT_DATA_SAS_DISCOVERY 635 { 636 U8 Flags; /* 0x00 */ 637 U8 ReasonCode; /* 0x01 */ 638 U8 IOUnitPort; /* 0x02 */ 639 U8 Reserved03; /* 0x03 */ 640 U32 DiscoveryStatus; /* 0x04 */ 641 } MPI3_EVENT_DATA_SAS_DISCOVERY, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_DISCOVERY, 642 Mpi3EventDataSasDiscovery_t, MPI3_POINTER pMpi3EventDataSasDiscovery_t; 643 644 /**** Defines for the Flags field ****/ 645 #define MPI3_EVENT_SAS_DISC_FLAGS_DEVICE_CHANGE (0x02) 646 #define MPI3_EVENT_SAS_DISC_FLAGS_IN_PROGRESS (0x01) 647 648 /**** Defines for the ReasonCode field ****/ 649 #define MPI3_EVENT_SAS_DISC_RC_STARTED (0x01) 650 #define MPI3_EVENT_SAS_DISC_RC_COMPLETED (0x02) 651 652 /**** Defines for the DiscoveryStatus field ****/ 653 #define MPI3_SAS_DISC_STATUS_MAX_ENCLOSURES_EXCEED (0x80000000) 654 #define MPI3_SAS_DISC_STATUS_MAX_EXPANDERS_EXCEED (0x40000000) 655 #define MPI3_SAS_DISC_STATUS_MAX_DEVICES_EXCEED (0x20000000) 656 #define MPI3_SAS_DISC_STATUS_MAX_TOPO_PHYS_EXCEED (0x10000000) 657 #define MPI3_SAS_DISC_STATUS_INVALID_CEI (0x00010000) 658 #define MPI3_SAS_DISC_STATUS_FECEI_MISMATCH (0x00008000) 659 #define MPI3_SAS_DISC_STATUS_MULTIPLE_DEVICES_IN_SLOT (0x00004000) 660 #define MPI3_SAS_DISC_STATUS_NECEI_MISMATCH (0x00002000) 661 #define MPI3_SAS_DISC_STATUS_TOO_MANY_SLOTS (0x00001000) 662 #define MPI3_SAS_DISC_STATUS_EXP_MULTI_SUBTRACTIVE (0x00000800) 663 #define MPI3_SAS_DISC_STATUS_MULTI_PORT_DOMAIN (0x00000400) 664 #define MPI3_SAS_DISC_STATUS_TABLE_TO_SUBTRACTIVE_LINK (0x00000200) 665 #define MPI3_SAS_DISC_STATUS_UNSUPPORTED_DEVICE (0x00000100) 666 #define MPI3_SAS_DISC_STATUS_TABLE_LINK (0x00000080) 667 #define MPI3_SAS_DISC_STATUS_SUBTRACTIVE_LINK (0x00000040) 668 #define MPI3_SAS_DISC_STATUS_SMP_CRC_ERROR (0x00000020) 669 #define MPI3_SAS_DISC_STATUS_SMP_FUNCTION_FAILED (0x00000010) 670 #define MPI3_SAS_DISC_STATUS_SMP_TIMEOUT (0x00000008) 671 #define MPI3_SAS_DISC_STATUS_MULTIPLE_PORTS (0x00000004) 672 #define MPI3_SAS_DISC_STATUS_INVALID_SAS_ADDRESS (0x00000002) 673 #define MPI3_SAS_DISC_STATUS_LOOP_DETECTED (0x00000001) 674 675 676 /***************************************************************************** 677 * SAS Broadcast Primitive Event * 678 ****************************************************************************/ 679 typedef struct _MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE 680 { 681 U8 PhyNum; /* 0x00 */ 682 U8 IOUnitPort; /* 0x01 */ 683 U8 PortWidth; /* 0x02 */ 684 U8 Primitive; /* 0x03 */ 685 } MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, 686 Mpi3EventDataSasBroadcastPrimitive_t, MPI3_POINTER pMpi3EventDataSasBroadcastPrimitive_t; 687 688 /**** Defines for the Primitive field ****/ 689 #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE (0x01) 690 #define MPI3_EVENT_BROADCAST_PRIMITIVE_SES (0x02) 691 #define MPI3_EVENT_BROADCAST_PRIMITIVE_EXPANDER (0x03) 692 #define MPI3_EVENT_BROADCAST_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04) 693 #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED3 (0x05) 694 #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED4 (0x06) 695 #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE0_RESERVED (0x07) 696 #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE1_RESERVED (0x08) 697 698 699 /***************************************************************************** 700 * SAS Notify Primitive Event * 701 ****************************************************************************/ 702 typedef struct _MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE 703 { 704 U8 PhyNum; /* 0x00 */ 705 U8 IOUnitPort; /* 0x01 */ 706 U8 Reserved02; /* 0x02 */ 707 U8 Primitive; /* 0x03 */ 708 } MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, 709 Mpi3EventDataSasNotifyPrimitive_t, MPI3_POINTER pMpi3EventDataSasNotifyPrimitive_t; 710 711 /**** Defines for the Primitive field ****/ 712 #define MPI3_EVENT_NOTIFY_PRIMITIVE_ENABLE_SPINUP (0x01) 713 #define MPI3_EVENT_NOTIFY_PRIMITIVE_POWER_LOSS_EXPECTED (0x02) 714 #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED1 (0x03) 715 #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED2 (0x04) 716 717 718 /***************************************************************************** 719 * SAS Topology Change List Event * 720 ****************************************************************************/ 721 #ifndef MPI3_EVENT_SAS_TOPO_PHY_COUNT 722 #define MPI3_EVENT_SAS_TOPO_PHY_COUNT (1) 723 #endif /* MPI3_EVENT_SAS_TOPO_PHY_COUNT */ 724 725 typedef struct _MPI3_EVENT_SAS_TOPO_PHY_ENTRY 726 { 727 U16 AttachedDevHandle; /* 0x00 */ 728 U8 LinkRate; /* 0x02 */ 729 U8 PhyStatus; /* 0x03 */ 730 } MPI3_EVENT_SAS_TOPO_PHY_ENTRY, MPI3_POINTER PTR_MPI3_EVENT_SAS_TOPO_PHY_ENTRY, 731 Mpi3EventSasTopoPhyEntry_t, MPI3_POINTER pMpi3EventSasTopoPhyEntry_t; 732 733 /**** Defines for the LinkRate field ****/ 734 #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_MASK (0xF0) 735 #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_SHIFT (4) 736 #define MPI3_EVENT_SAS_TOPO_LR_PREV_MASK (0x0F) 737 #define MPI3_EVENT_SAS_TOPO_LR_PREV_SHIFT (0) 738 #define MPI3_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE (0x00) 739 #define MPI3_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01) 740 #define MPI3_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02) 741 #define MPI3_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03) 742 #define MPI3_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04) 743 #define MPI3_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05) 744 #define MPI3_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY (0x06) 745 #define MPI3_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A) 746 #define MPI3_EVENT_SAS_TOPO_LR_RATE_12_0 (0x0B) 747 #define MPI3_EVENT_SAS_TOPO_LR_RATE_22_5 (0x0C) 748 749 /**** Defines for the PhyStatus field ****/ 750 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_MASK (0xC0) 751 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_SHIFT (6) 752 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_ACCESSIBLE (0x00) 753 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_NO_EXIST (0x40) 754 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_VACANT (0x80) 755 #define MPI3_EVENT_SAS_TOPO_PHY_RC_MASK (0x0F) 756 #define MPI3_EVENT_SAS_TOPO_PHY_RC_TARG_NOT_RESPONDING (0x02) 757 #define MPI3_EVENT_SAS_TOPO_PHY_RC_PHY_CHANGED (0x03) 758 #define MPI3_EVENT_SAS_TOPO_PHY_RC_NO_CHANGE (0x04) 759 #define MPI3_EVENT_SAS_TOPO_PHY_RC_DELAY_NOT_RESPONDING (0x05) 760 #define MPI3_EVENT_SAS_TOPO_PHY_RC_RESPONDING (0x06) 761 762 763 typedef struct _MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST 764 { 765 U16 EnclosureHandle; /* 0x00 */ 766 U16 ExpanderDevHandle; /* 0x02 */ 767 U8 NumPhys; /* 0x04 */ 768 U8 Reserved05[3]; /* 0x05 */ 769 U8 NumEntries; /* 0x08 */ 770 U8 StartPhyNum; /* 0x09 */ 771 U8 ExpStatus; /* 0x0A */ 772 U8 IOUnitPort; /* 0x0B */ 773 MPI3_EVENT_SAS_TOPO_PHY_ENTRY PhyEntry[MPI3_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C */ 774 } MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, 775 Mpi3EventDataSasTopologyChangeList_t, MPI3_POINTER pMpi3EventDataSasTopologyChangeList_t; 776 777 /**** Defines for the ExpStatus field ****/ 778 #define MPI3_EVENT_SAS_TOPO_ES_NO_EXPANDER (0x00) 779 #define MPI3_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02) 780 #define MPI3_EVENT_SAS_TOPO_ES_RESPONDING (0x03) 781 #define MPI3_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04) 782 783 /***************************************************************************** 784 * SAS PHY Counter Event * 785 ****************************************************************************/ 786 typedef struct _MPI3_EVENT_DATA_SAS_PHY_COUNTER 787 { 788 U64 TimeStamp; /* 0x00 */ 789 U32 Reserved08; /* 0x08 */ 790 U8 PhyEventCode; /* 0x0C */ 791 U8 PhyNum; /* 0x0D */ 792 U16 Reserved0E; /* 0x0E */ 793 U32 PhyEventInfo; /* 0x10 */ 794 U8 CounterType; /* 0x14 */ 795 U8 ThresholdWindow; /* 0x15 */ 796 U8 TimeUnits; /* 0x16 */ 797 U8 Reserved17; /* 0x17 */ 798 U32 EventThreshold; /* 0x18 */ 799 U16 ThresholdFlags; /* 0x1C */ 800 U16 Reserved1E; /* 0x1E */ 801 } MPI3_EVENT_DATA_SAS_PHY_COUNTER, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_PHY_COUNTER, 802 Mpi3EventDataSasPhyCounter_t, MPI3_POINTER pMpi3EventDataSasPhyCounter_t; 803 804 /**** Defines for the PhyEventCode field - use MPI3_SASPHY3_EVENT_CODE_ defines ****/ 805 806 /**** Defines for the CounterType field - use MPI3_SASPHY3_COUNTER_TYPE_ defines ****/ 807 808 /**** Defines for the TimeUnits field - use MPI3_SASPHY3_TIME_UNITS_ defines ****/ 809 810 /**** Defines for the ThresholdFlags field - use MPI3_SASPHY3_TFLAGS_ defines ****/ 811 812 813 /***************************************************************************** 814 * SAS Device Discovery Error Event * 815 ****************************************************************************/ 816 typedef struct _MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR 817 { 818 U16 DevHandle; /* 0x00 */ 819 U8 ReasonCode; /* 0x02 */ 820 U8 IOUnitPort; /* 0x03 */ 821 U32 Reserved04; /* 0x04 */ 822 U64 SASAddress; /* 0x08 */ 823 } MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR, 824 Mpi3EventDataSasDeviceDiscErr_t, MPI3_POINTER pMpi3EventDataSasDeviceDiscErr_t; 825 826 /**** Defines for the ReasonCode field ****/ 827 #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_FAILED (0x01) 828 #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_TIMEOUT (0x02) 829 830 /***************************************************************************** 831 * PCIe Enumeration Event * 832 ****************************************************************************/ 833 typedef struct _MPI3_EVENT_DATA_PCIE_ENUMERATION 834 { 835 U8 Flags; /* 0x00 */ 836 U8 ReasonCode; /* 0x01 */ 837 U8 IOUnitPort; /* 0x02 */ 838 U8 Reserved03; /* 0x03 */ 839 U32 EnumerationStatus; /* 0x04 */ 840 } MPI3_EVENT_DATA_PCIE_ENUMERATION, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_ENUMERATION, 841 Mpi3EventDataPcieEnumeration_t, MPI3_POINTER pMpi3EventDataPcieEnumeration_t; 842 843 /**** Defines for the Flags field ****/ 844 #define MPI3_EVENT_PCIE_ENUM_FLAGS_DEVICE_CHANGE (0x02) 845 #define MPI3_EVENT_PCIE_ENUM_FLAGS_IN_PROGRESS (0x01) 846 847 /**** Defines for the ReasonCode field ****/ 848 #define MPI3_EVENT_PCIE_ENUM_RC_STARTED (0x01) 849 #define MPI3_EVENT_PCIE_ENUM_RC_COMPLETED (0x02) 850 851 /**** Defines for the EnumerationStatus field ****/ 852 #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCH_DEPTH_EXCEED (0x80000000) 853 #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCHES_EXCEED (0x40000000) 854 #define MPI3_EVENT_PCIE_ENUM_ES_MAX_DEVICES_EXCEED (0x20000000) 855 #define MPI3_EVENT_PCIE_ENUM_ES_RESOURCES_EXHAUSTED (0x10000000) 856 857 858 /***************************************************************************** 859 * PCIe Topology Change List Event * 860 ****************************************************************************/ 861 #ifndef MPI3_EVENT_PCIE_TOPO_PORT_COUNT 862 #define MPI3_EVENT_PCIE_TOPO_PORT_COUNT (1) 863 #endif /* MPI3_EVENT_PCIE_TOPO_PORT_COUNT */ 864 865 typedef struct _MPI3_EVENT_PCIE_TOPO_PORT_ENTRY 866 { 867 U16 AttachedDevHandle; /* 0x00 */ 868 U8 PortStatus; /* 0x02 */ 869 U8 Reserved03; /* 0x03 */ 870 U8 CurrentPortInfo; /* 0x04 */ 871 U8 Reserved05; /* 0x05 */ 872 U8 PreviousPortInfo; /* 0x06 */ 873 U8 Reserved07; /* 0x07 */ 874 } MPI3_EVENT_PCIE_TOPO_PORT_ENTRY, MPI3_POINTER PTR_MPI3_EVENT_PCIE_TOPO_PORT_ENTRY, 875 Mpi3EventPcieTopoPortEntry_t, MPI3_POINTER pMpi3EventPcieTopoPortEntry_t; 876 877 /**** Defines for the PortStatus field ****/ 878 #define MPI3_EVENT_PCIE_TOPO_PS_NOT_RESPONDING (0x02) 879 #define MPI3_EVENT_PCIE_TOPO_PS_PORT_CHANGED (0x03) 880 #define MPI3_EVENT_PCIE_TOPO_PS_NO_CHANGE (0x04) 881 #define MPI3_EVENT_PCIE_TOPO_PS_DELAY_NOT_RESPONDING (0x05) 882 #define MPI3_EVENT_PCIE_TOPO_PS_RESPONDING (0x06) 883 884 /**** Defines for the CurrentPortInfo and PreviousPortInfo field ****/ 885 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_MASK (0xF0) 886 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_UNKNOWN (0x00) 887 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_1 (0x10) 888 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_2 (0x20) 889 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_4 (0x30) 890 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_8 (0x40) 891 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_16 (0x50) 892 893 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_MASK (0x0F) 894 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_UNKNOWN (0x00) 895 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_DISABLED (0x01) 896 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_2_5 (0x02) 897 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_5_0 (0x03) 898 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_8_0 (0x04) 899 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_16_0 (0x05) 900 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_32_0 (0x06) 901 902 typedef struct _MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST 903 { 904 U16 EnclosureHandle; /* 0x00 */ 905 U16 SwitchDevHandle; /* 0x02 */ 906 U8 NumPorts; /* 0x04 */ 907 U8 Reserved05[3]; /* 0x05 */ 908 U8 NumEntries; /* 0x08 */ 909 U8 StartPortNum; /* 0x09 */ 910 U8 SwitchStatus; /* 0x0A */ 911 U8 IOUnitPort; /* 0x0B */ 912 U32 Reserved0C; /* 0x0C */ 913 MPI3_EVENT_PCIE_TOPO_PORT_ENTRY PortEntry[MPI3_EVENT_PCIE_TOPO_PORT_COUNT]; /* 0x10 */ 914 } MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, 915 Mpi3EventDataPcieTopologyChangeList_t, MPI3_POINTER pMpi3EventDataPcieTopologyChangeList_t; 916 917 /**** Defines for the SwitchStatus field ****/ 918 #define MPI3_EVENT_PCIE_TOPO_SS_NO_PCIE_SWITCH (0x00) 919 #define MPI3_EVENT_PCIE_TOPO_SS_NOT_RESPONDING (0x02) 920 #define MPI3_EVENT_PCIE_TOPO_SS_RESPONDING (0x03) 921 #define MPI3_EVENT_PCIE_TOPO_SS_DELAY_NOT_RESPONDING (0x04) 922 923 /***************************************************************************** 924 * PCIe Error Threshold Event * 925 ****************************************************************************/ 926 927 typedef struct _MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD 928 { 929 U64 Timestamp; /* 0x00 */ 930 U8 ReasonCode; /* 0x08 */ 931 U8 Port; /* 0x09 */ 932 U16 SwitchDevHandle; /* 0x0A */ 933 U8 Error; /* 0x0C */ 934 U8 Action; /* 0x0D */ 935 U16 ThresholdCount; /* 0x0E */ 936 U16 AttachedDevHandle; /* 0x10 */ 937 U16 Reserved12; /* 0x12 */ 938 U32 Reserved14; /* 0x14 */ 939 } MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD, 940 Mpi3EventDataPcieErrorThreshold_t, MPI3_POINTER pMpi3EventDataPcieErrorThreshold_t; 941 942 943 /**** Defines for the ReasonCode field ****/ 944 #define MPI3_EVENT_PCI_ERROR_RC_THRESHOLD_EXCEEDED (0x00) 945 #define MPI3_EVENT_PCI_ERROR_RC_ESCALATION (0x01) 946 947 /**** Defines for the Error field - use MPI3_PCIEIOUNIT3_ERROR_ values ****/ 948 949 /**** Defines for the Action field - use MPI3_PCIEIOUNIT3_ACTION_ values ****/ 950 951 /**************************************************************************** 952 * Enclosure Device Added Event * 953 ****************************************************************************/ 954 /* 955 * The Enclosure Device Added Event Data is exactly the same as Enclosure 956 * Page 0 data (including the Configuration Page header). So, please 957 * use/refer to MPI3_ENCLOSURE_PAGE0 structure for Enclosure Device Added 958 * Event data. 959 */ 960 961 /**************************************************************************** 962 * Enclosure Device Changed Event * 963 ****************************************************************************/ 964 /* 965 * The Enclosure Device Change Event Data is exactly the same as Enclosure 966 * Page 0 data (including the Configuration Page header). So, please 967 * use/refer to MPI3_ENCLOSURE_PAGE0 structure for Enclosure Device Change 968 * Event data. 969 */ 970 971 /***************************************************************************** 972 * SAS Initiator Device Status Change Event * 973 ****************************************************************************/ 974 typedef struct _MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE 975 { 976 U8 ReasonCode; /* 0x00 */ 977 U8 IOUnitPort; /* 0x01 */ 978 U16 DevHandle; /* 0x02 */ 979 U32 Reserved04; /* 0x04 */ 980 U64 SASAddress; /* 0x08 */ 981 } MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, 982 Mpi3EventDataSasInitDevStatusChange_t, MPI3_POINTER pMpi3EventDataSasInitDevStatusChange_t; 983 984 /**** Defines for the ReasonCode field ****/ 985 #define MPI3_EVENT_SAS_INIT_RC_ADDED (0x01) 986 #define MPI3_EVENT_SAS_INIT_RC_NOT_RESPONDING (0x02) 987 988 989 /***************************************************************************** 990 * SAS Initiator Device Table Overflow Event * 991 ****************************************************************************/ 992 typedef struct _MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW 993 { 994 U16 MaxInit; /* 0x00 */ 995 U16 CurrentInit; /* 0x02 */ 996 U32 Reserved04; /* 0x04 */ 997 U64 SASAddress; /* 0x08 */ 998 } MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, 999 Mpi3EventDataSasInitTableOverflow_t, MPI3_POINTER pMpi3EventDataSasInitTableOverflow_t; 1000 1001 1002 /***************************************************************************** 1003 * Hard Reset Received Event * 1004 ****************************************************************************/ 1005 typedef struct _MPI3_EVENT_DATA_HARD_RESET_RECEIVED 1006 { 1007 U8 Reserved00; /* 0x00 */ 1008 U8 IOUnitPort; /* 0x01 */ 1009 U16 Reserved02; /* 0x02 */ 1010 } MPI3_EVENT_DATA_HARD_RESET_RECEIVED, MPI3_POINTER PTR_MPI3_EVENT_DATA_HARD_RESET_RECEIVED, 1011 Mpi3EventDataHardResetReceived_t, MPI3_POINTER pMpi3EventDataHardResetReceived_t; 1012 1013 1014 /***************************************************************************** 1015 * Diagnostic Tool Events * 1016 *****************************************************************************/ 1017 1018 /***************************************************************************** 1019 * Diagnostic Buffer Status Change Event * 1020 *****************************************************************************/ 1021 typedef struct _MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE 1022 { 1023 U8 Type; /* 0x00 */ 1024 U8 ReasonCode; /* 0x01 */ 1025 U16 Reserved02; /* 0x02 */ 1026 U32 Reserved04; /* 0x04 */ 1027 } MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE, 1028 Mpi3EventDataDiagBufferStatusChange_t, MPI3_POINTER pMpi3EventDataDiagBufferStatusChange_t; 1029 1030 /**** Defines for the Type field - use MPI3_DIAG_BUFFER_TYPE_ values ****/ 1031 1032 /**** Defines for the ReasonCode field ****/ 1033 #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RELEASED (0x01) 1034 #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_PAUSED (0x02) 1035 #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RESUMED (0x03) 1036 1037 /***************************************************************************** 1038 * Persistent Event Logs * 1039 ****************************************************************************/ 1040 1041 /**** Definitions for the Locale field ****/ 1042 #define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT (0x0200) 1043 #define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT (0x0100) 1044 #define MPI3_PEL_LOCALE_FLAGS_PCIE (0x0080) 1045 #define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION (0x0040) 1046 #define MPI3_PEL_LOCALE_FLAGS_CONTROLER (0x0020) 1047 #define MPI3_PEL_LOCALE_FLAGS_SAS (0x0010) 1048 #define MPI3_PEL_LOCALE_FLAGS_EPACK (0x0008) 1049 #define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE (0x0004) 1050 #define MPI3_PEL_LOCALE_FLAGS_PD (0x0002) 1051 #define MPI3_PEL_LOCALE_FLAGS_VD (0x0001) 1052 1053 /**** Definitions for the Class field ****/ 1054 #define MPI3_PEL_CLASS_DEBUG (0x00) 1055 #define MPI3_PEL_CLASS_PROGRESS (0x01) 1056 #define MPI3_PEL_CLASS_INFORMATIONAL (0x02) 1057 #define MPI3_PEL_CLASS_WARNING (0x03) 1058 #define MPI3_PEL_CLASS_CRITICAL (0x04) 1059 #define MPI3_PEL_CLASS_FATAL (0x05) 1060 #define MPI3_PEL_CLASS_FAULT (0x06) 1061 1062 /**** Definitions for the ClearType field ****/ 1063 #define MPI3_PEL_CLEARTYPE_CLEAR (0x00) 1064 1065 /**** Definitions for the WaitTime field ****/ 1066 #define MPI3_PEL_WAITTIME_INFINITE_WAIT (0x00) 1067 1068 /**** Definitions for the Action field ****/ 1069 #define MPI3_PEL_ACTION_GET_SEQNUM (0x01) 1070 #define MPI3_PEL_ACTION_MARK_CLEAR (0x02) 1071 #define MPI3_PEL_ACTION_GET_LOG (0x03) 1072 #define MPI3_PEL_ACTION_GET_COUNT (0x04) 1073 #define MPI3_PEL_ACTION_WAIT (0x05) 1074 #define MPI3_PEL_ACTION_ABORT (0x06) 1075 #define MPI3_PEL_ACTION_GET_PRINT_STRINGS (0x07) 1076 #define MPI3_PEL_ACTION_ACKNOWLEDGE (0x08) 1077 1078 /**** Definitions for the LogStatus field ****/ 1079 #define MPI3_PEL_STATUS_SUCCESS (0x00) 1080 #define MPI3_PEL_STATUS_NOT_FOUND (0x01) 1081 #define MPI3_PEL_STATUS_ABORTED (0x02) 1082 #define MPI3_PEL_STATUS_NOT_READY (0x03) 1083 1084 /**************************************************************************** 1085 * PEL Sequence Numbers * 1086 ****************************************************************************/ 1087 typedef struct _MPI3_PEL_SEQ 1088 { 1089 U32 Newest; /* 0x00 */ 1090 U32 Oldest; /* 0x04 */ 1091 U32 Clear; /* 0x08 */ 1092 U32 Shutdown; /* 0x0C */ 1093 U32 Boot; /* 0x10 */ 1094 U32 LastAcknowledged; /* 0x14 */ 1095 } MPI3_PEL_SEQ, MPI3_POINTER PTR_MPI3_PEL_SEQ, 1096 Mpi3PELSeq_t, MPI3_POINTER pMpi3PELSeq_t; 1097 1098 /**************************************************************************** 1099 * PEL Entry * 1100 ****************************************************************************/ 1101 1102 typedef struct _MPI3_PEL_ENTRY 1103 { 1104 U64 TimeStamp; /* 0x00 */ 1105 U32 SequenceNumber; /* 0x08 */ 1106 U16 LogCode; /* 0x0C */ 1107 U16 ArgType; /* 0x0E */ 1108 U16 Locale; /* 0x10 */ 1109 U8 Class; /* 0x12 */ 1110 U8 Flags; /* 0x13 */ 1111 U8 ExtNum; /* 0x14 */ 1112 U8 NumExts; /* 0x15 */ 1113 U8 ArgDataSize; /* 0x16 */ 1114 U8 FixedFormatStringsSize; /* 0x17 */ 1115 U32 Reserved18[2]; /* 0x18 */ 1116 U32 PELInfo[24]; /* 0x20 - 0x7F */ 1117 } MPI3_PEL_ENTRY, MPI3_POINTER PTR_MPI3_PEL_ENTRY, 1118 Mpi3PELEntry_t, MPI3_POINTER pMpi3PELEntry_t; 1119 1120 1121 /**** Definitions for the Flags field ****/ 1122 1123 #define MPI3_PEL_FLAGS_COMPLETE_RESET_NEEDED (0x02) 1124 #define MPI3_PEL_FLAGS_ACK_NEEDED (0x01) 1125 1126 /**************************************************************************** 1127 * PEL Event List * 1128 ****************************************************************************/ 1129 typedef struct _MPI3_PEL_LIST 1130 { 1131 U32 LogCount; /* 0x00 */ 1132 U32 Reserved04; /* 0x04 */ 1133 MPI3_PEL_ENTRY Entry[1]; /* 0x08 */ /* variable length */ 1134 } MPI3_PEL_LIST, MPI3_POINTER PTR_MPI3_PEL_LIST, 1135 Mpi3PELList_t, MPI3_POINTER pMpi3PELList_t; 1136 1137 /**************************************************************************** 1138 * PEL Count Data * 1139 ****************************************************************************/ 1140 typedef U32 MPI3_PEL_LOG_COUNT, MPI3_POINTER PTR_MPI3_PEL_LOG_COUNT, 1141 Mpi3PELLogCount_t, MPI3_POINTER pMpi3PELLogCount_t; 1142 1143 /**************************************************************************** 1144 * PEL Arg Map * 1145 ****************************************************************************/ 1146 typedef struct _MPI3_PEL_ARG_MAP 1147 { 1148 U8 ArgType; /* 0x00 */ 1149 U8 Length; /* 0x01 */ 1150 U16 StartLocation; /* 0x02 */ 1151 } MPI3_PEL_ARG_MAP, MPI3_POINTER PTR_MPI3_PEL_ARG_MAP, 1152 Mpi3PELArgMap_t, MPI3_POINTER pMpi3PELArgMap_t; 1153 1154 /**** Definitions for the ArgType field ****/ 1155 #define MPI3_PEL_ARG_MAP_ARG_TYPE_APPEND_STRING (0x00) 1156 #define MPI3_PEL_ARG_MAP_ARG_TYPE_INTEGER (0x01) 1157 #define MPI3_PEL_ARG_MAP_ARG_TYPE_STRING (0x02) 1158 #define MPI3_PEL_ARG_MAP_ARG_TYPE_BIT_FIELD (0x03) 1159 1160 1161 /**************************************************************************** 1162 * PEL Print String * 1163 ****************************************************************************/ 1164 typedef struct _MPI3_PEL_PRINT_STRING 1165 { 1166 U16 LogCode; /* 0x00 */ 1167 U16 StringLength; /* 0x02 */ 1168 U8 NumArgMap; /* 0x04 */ 1169 U8 Reserved05[3]; /* 0x05 */ 1170 MPI3_PEL_ARG_MAP ArgMap[1]; /* 0x08 */ /* variable length */ 1171 /* FormatString - offset must be calculated */ /* variable length */ 1172 } MPI3_PEL_PRINT_STRING, MPI3_POINTER PTR_MPI3_PEL_PRINT_STRING, 1173 Mpi3PELPrintString_t, MPI3_POINTER pMpi3PELPrintString_t; 1174 1175 /**************************************************************************** 1176 * PEL Print String List * 1177 ****************************************************************************/ 1178 typedef struct _MPI3_PEL_PRINT_STRING_LIST 1179 { 1180 U32 NumPrintStrings; /* 0x00 */ 1181 U32 ResidualBytesRemain; /* 0x04 */ 1182 U32 Reserved08[2]; /* 0x08 */ 1183 MPI3_PEL_PRINT_STRING PrintString[1]; /* 0x10 */ /* variable length */ 1184 } MPI3_PEL_PRINT_STRING_LIST, MPI3_POINTER PTR_MPI3_PEL_PRINT_STRING_LIST, 1185 Mpi3PELPrintStringList_t, MPI3_POINTER pMpi3PELPrintStringList_t; 1186 1187 1188 /**************************************************************************** 1189 * PEL Request Msg - generic to allow header decoding * 1190 ****************************************************************************/ 1191 #ifndef MPI3_PEL_ACTION_SPECIFIC_MAX 1192 #define MPI3_PEL_ACTION_SPECIFIC_MAX (1) 1193 #endif /* MPI3_PEL_ACTION_SPECIFIC_MAX */ 1194 1195 typedef struct _MPI3_PEL_REQUEST 1196 { 1197 U16 HostTag; /* 0x00 */ 1198 U8 IOCUseOnly02; /* 0x02 */ 1199 U8 Function; /* 0x03 */ 1200 U16 IOCUseOnly04; /* 0x04 */ 1201 U8 IOCUseOnly06; /* 0x06 */ 1202 U8 MsgFlags; /* 0x07 */ 1203 U16 ChangeCount; /* 0x08 */ 1204 U8 Action; /* 0x0A */ 1205 U8 Reserved0B; /* 0x0B */ 1206 U32 ActionSpecific[MPI3_PEL_ACTION_SPECIFIC_MAX]; /* 0x0C */ /* variable length */ 1207 } MPI3_PEL_REQUEST, MPI3_POINTER PTR_MPI3_PEL_REQUEST, 1208 Mpi3PELRequest_t, MPI3_POINTER pMpi3PELRequest_t; 1209 1210 /**************************************************************************** 1211 * PEL ACTION Get Sequence Nembers * 1212 ****************************************************************************/ 1213 typedef struct _MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS 1214 { 1215 U16 HostTag; /* 0x00 */ 1216 U8 IOCUseOnly02; /* 0x02 */ 1217 U8 Function; /* 0x03 */ 1218 U16 IOCUseOnly04; /* 0x04 */ 1219 U8 IOCUseOnly06; /* 0x06 */ 1220 U8 MsgFlags; /* 0x07 */ 1221 U16 ChangeCount; /* 0x08 */ 1222 U8 Action; /* 0x0A */ 1223 U8 Reserved0B; /* 0x0B */ 1224 U32 Reserved0C[5]; /* 0x0C */ 1225 MPI3_SGE_UNION SGL; /* 0x20 */ 1226 } MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS, 1227 Mpi3PELReqActionGetSequenceNumbers_t, MPI3_POINTER pMpi3PELReqActionGetSequenceNumbers_t; 1228 1229 /**************************************************************************** 1230 * PEL ACTION Clear Log * 1231 ****************************************************************************/ 1232 typedef struct _MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER 1233 { 1234 U16 HostTag; /* 0x00 */ 1235 U8 IOCUseOnly02; /* 0x02 */ 1236 U8 Function; /* 0x03 */ 1237 U16 IOCUseOnly04; /* 0x04 */ 1238 U8 IOCUseOnly06; /* 0x06 */ 1239 U8 MsgFlags; /* 0x07 */ 1240 U16 ChangeCount; /* 0x08 */ 1241 U8 Action; /* 0x0A */ 1242 U8 Reserved0B; /* 0x0B */ 1243 U8 ClearType; /* 0x0C */ 1244 U8 Reserved0D[3]; /* 0x0D */ 1245 } MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER, 1246 Mpi3PELReqActionClearLogMMarker_t, MPI3_POINTER pMpi3PELReqActionClearLogMMarker_t; 1247 1248 /**************************************************************************** 1249 * PEL ACTION Get Log * 1250 ****************************************************************************/ 1251 typedef struct _MPI3_PEL_REQ_ACTION_GET_LOG 1252 { 1253 U16 HostTag; /* 0x00 */ 1254 U8 IOCUseOnly02; /* 0x02 */ 1255 U8 Function; /* 0x03 */ 1256 U16 IOCUseOnly04; /* 0x04 */ 1257 U8 IOCUseOnly06; /* 0x06 */ 1258 U8 MsgFlags; /* 0x07 */ 1259 U16 ChangeCount; /* 0x08 */ 1260 U8 Action; /* 0x0A */ 1261 U8 Reserved0B; /* 0x0B */ 1262 U32 StartingSequenceNumber; /* 0x0C */ 1263 U16 Locale; /* 0x10 */ 1264 U8 Class; /* 0x12 */ 1265 U8 Reserved13; /* 0x13 */ 1266 U32 Reserved14[3]; /* 0x14 */ 1267 MPI3_SGE_UNION SGL; /* 0x20 */ 1268 } MPI3_PEL_REQ_ACTION_GET_LOG, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_LOG, 1269 Mpi3PELReqActionGetLog_t, MPI3_POINTER pMpi3PELReqActionGetLog_t; 1270 1271 /**************************************************************************** 1272 * PEL ACTION Get Count * 1273 ****************************************************************************/ 1274 typedef struct _MPI3_PEL_REQ_ACTION_GET_COUNT 1275 { 1276 U16 HostTag; /* 0x00 */ 1277 U8 IOCUseOnly02; /* 0x02 */ 1278 U8 Function; /* 0x03 */ 1279 U16 IOCUseOnly04; /* 0x04 */ 1280 U8 IOCUseOnly06; /* 0x06 */ 1281 U8 MsgFlags; /* 0x07 */ 1282 U16 ChangeCount; /* 0x08 */ 1283 U8 Action; /* 0x0A */ 1284 U8 Reserved0B; /* 0x0B */ 1285 U32 StartingSequenceNumber; /* 0x0C */ 1286 U16 Locale; /* 0x10 */ 1287 U8 Class; /* 0x12 */ 1288 U8 Reserved13; /* 0x13 */ 1289 U32 Reserved14[3]; /* 0x14 */ 1290 MPI3_SGE_UNION SGL; /* 0x20 */ 1291 } MPI3_PEL_REQ_ACTION_GET_COUNT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_COUNT, 1292 Mpi3PELReqActionGetCount_t, MPI3_POINTER pMpi3PELReqActionGetCount_t; 1293 1294 /**************************************************************************** 1295 * PEL ACTION Wait * 1296 ****************************************************************************/ 1297 typedef struct _MPI3_PEL_REQ_ACTION_WAIT 1298 { 1299 U16 HostTag; /* 0x00 */ 1300 U8 IOCUseOnly02; /* 0x02 */ 1301 U8 Function; /* 0x03 */ 1302 U16 IOCUseOnly04; /* 0x04 */ 1303 U8 IOCUseOnly06; /* 0x06 */ 1304 U8 MsgFlags; /* 0x07 */ 1305 U16 ChangeCount; /* 0x08 */ 1306 U8 Action; /* 0x0A */ 1307 U8 Reserved0B; /* 0x0B */ 1308 U32 StartingSequenceNumber; /* 0x0C */ 1309 U16 Locale; /* 0x10 */ 1310 U8 Class; /* 0x12 */ 1311 U8 Reserved13; /* 0x13 */ 1312 U16 WaitTime; /* 0x14 */ 1313 U16 Reserved16; /* 0x16 */ 1314 U32 Reserved18[2]; /* 0x18 */ 1315 } MPI3_PEL_REQ_ACTION_WAIT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_WAIT, 1316 Mpi3PELReqActionWait_t, MPI3_POINTER pMpi3PELReqActionWait_t; 1317 1318 /**************************************************************************** 1319 * PEL ACTION Abort * 1320 ****************************************************************************/ 1321 typedef struct _MPI3_PEL_REQ_ACTION_ABORT 1322 { 1323 U16 HostTag; /* 0x00 */ 1324 U8 IOCUseOnly02; /* 0x02 */ 1325 U8 Function; /* 0x03 */ 1326 U16 IOCUseOnly04; /* 0x04 */ 1327 U8 IOCUseOnly06; /* 0x06 */ 1328 U8 MsgFlags; /* 0x07 */ 1329 U16 ChangeCount; /* 0x08 */ 1330 U8 Action; /* 0x0A */ 1331 U8 Reserved0B; /* 0x0B */ 1332 U32 Reserved0C; /* 0x0C */ 1333 U16 AbortHostTag; /* 0x10 */ 1334 U16 Reserved12; /* 0x12 */ 1335 U32 Reserved14; /* 0x14 */ 1336 } MPI3_PEL_REQ_ACTION_ABORT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_ABORT, 1337 Mpi3PELReqActionAbort_t, MPI3_POINTER pMpi3PELReqActionAbort_t; 1338 1339 /**************************************************************************** 1340 * PEL ACTION Get Print Strings * 1341 ****************************************************************************/ 1342 typedef struct _MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS 1343 { 1344 U16 HostTag; /* 0x00 */ 1345 U8 IOCUseOnly02; /* 0x02 */ 1346 U8 Function; /* 0x03 */ 1347 U16 IOCUseOnly04; /* 0x04 */ 1348 U8 IOCUseOnly06; /* 0x06 */ 1349 U8 MsgFlags; /* 0x07 */ 1350 U16 ChangeCount; /* 0x08 */ 1351 U8 Action; /* 0x0A */ 1352 U8 Reserved0B; /* 0x0B */ 1353 U32 Reserved0C; /* 0x0C */ 1354 U16 StartLogCode; /* 0x10 */ 1355 U16 Reserved12; /* 0x12 */ 1356 U32 Reserved14[3]; /* 0x14 */ 1357 MPI3_SGE_UNION SGL; /* 0x20 */ 1358 } MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS, 1359 Mpi3PELReqActionGetPrintStrings_t, MPI3_POINTER pMpi3PELReqActionGetPrintStrings_t; 1360 1361 /**************************************************************************** 1362 * PEL ACTION Acknowledge * 1363 ****************************************************************************/ 1364 typedef struct _MPI3_PEL_REQ_ACTION_ACKNOWLEDGE 1365 { 1366 U16 HostTag; /* 0x00 */ 1367 U8 IOCUseOnly02; /* 0x02 */ 1368 U8 Function; /* 0x03 */ 1369 U16 IOCUseOnly04; /* 0x04 */ 1370 U8 IOCUseOnly06; /* 0x06 */ 1371 U8 MsgFlags; /* 0x07 */ 1372 U16 ChangeCount; /* 0x08 */ 1373 U8 Action; /* 0x0A */ 1374 U8 Reserved0B; /* 0x0B */ 1375 U32 SequenceNumber; /* 0x0C */ 1376 U32 Reserved10; /* 0x10 */ 1377 } MPI3_PEL_REQ_ACTION_ACKNOWLEDGE, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_ACKNOWLEDGE, 1378 Mpi3PELReqActionAcknowledge_t, MPI3_POINTER pMpi3PELReqActionAcknowledge_t; 1379 1380 /**** Definitions for the MsgFlags field ****/ 1381 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_MASK (0x03) 1382 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_NO_GUIDANCE (0x00) 1383 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_CONTINUE_OP (0x01) 1384 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_TRANSITION_TO_FAULT (0x02) 1385 1386 /**************************************************************************** 1387 * PEL Reply * 1388 ****************************************************************************/ 1389 typedef struct _MPI3_PEL_REPLY 1390 { 1391 U16 HostTag; /* 0x00 */ 1392 U8 IOCUseOnly02; /* 0x02 */ 1393 U8 Function; /* 0x03 */ 1394 U16 IOCUseOnly04; /* 0x04 */ 1395 U8 IOCUseOnly06; /* 0x06 */ 1396 U8 MsgFlags; /* 0x07 */ 1397 U16 IOCUseOnly08; /* 0x08 */ 1398 U16 IOCStatus; /* 0x0A */ 1399 U32 IOCLogInfo; /* 0x0C */ 1400 U8 Action; /* 0x10 */ 1401 U8 Reserved11; /* 0x11 */ 1402 U16 Reserved12; /* 0x12 */ 1403 U16 PELogStatus; /* 0x14 */ 1404 U16 Reserved16; /* 0x16 */ 1405 U32 TransferLength; /* 0x18 */ 1406 } MPI3_PEL_REPLY, MPI3_POINTER PTR_MPI3_PEL_REPLY, 1407 Mpi3PELReply_t, MPI3_POINTER pMpi3PELReply_t; 1408 1409 1410 /***************************************************************************** 1411 * Component Image Download * 1412 ****************************************************************************/ 1413 typedef struct _MPI3_CI_DOWNLOAD_REQUEST 1414 { 1415 U16 HostTag; /* 0x00 */ 1416 U8 IOCUseOnly02; /* 0x02 */ 1417 U8 Function; /* 0x03 */ 1418 U16 IOCUseOnly04; /* 0x04 */ 1419 U8 IOCUseOnly06; /* 0x06 */ 1420 U8 MsgFlags; /* 0x07 */ 1421 U16 ChangeCount; /* 0x08 */ 1422 U8 Action; /* 0x0A */ 1423 U8 Reserved0B; /* 0x0B */ 1424 U32 Signature1; /* 0x0C */ 1425 U32 TotalImageSize; /* 0x10 */ 1426 U32 ImageOffset; /* 0x14 */ 1427 U32 SegmentSize; /* 0x18 */ 1428 U32 Reserved1C; /* 0x1C */ 1429 MPI3_SGE_UNION SGL; /* 0x20 */ 1430 } MPI3_CI_DOWNLOAD_REQUEST, MPI3_POINTER PTR_MPI3_CI_DOWNLOAD_REQUEST, 1431 Mpi3CIDownloadRequest_t, MPI3_POINTER pMpi3CIDownloadRequest_t; 1432 1433 /**** Definitions for the MsgFlags field ****/ 1434 #define MPI3_CI_DOWNLOAD_MSGFLAGS_LAST_SEGMENT (0x80) 1435 #define MPI3_CI_DOWNLOAD_MSGFLAGS_FORCE_FMC_ENABLE (0x40) 1436 #define MPI3_CI_DOWNLOAD_MSGFLAGS_SIGNED_NVDATA (0x20) 1437 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MASK (0x03) 1438 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_FAST (0x00) 1439 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MEDIUM (0x01) 1440 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_SLOW (0x02) 1441 1442 /**** Definitions for the Action field ****/ 1443 #define MPI3_CI_DOWNLOAD_ACTION_DOWNLOAD (0x01) 1444 #define MPI3_CI_DOWNLOAD_ACTION_ONLINE_ACTIVATION (0x02) 1445 #define MPI3_CI_DOWNLOAD_ACTION_OFFLINE_ACTIVATION (0x03) 1446 #define MPI3_CI_DOWNLOAD_ACTION_GET_STATUS (0x04) 1447 #define MPI3_CI_DOWNLOAD_ACTION_CANCEL_OFFLINE_ACTIVATION (0x05) 1448 1449 typedef struct _MPI3_CI_DOWNLOAD_REPLY 1450 { 1451 U16 HostTag; /* 0x00 */ 1452 U8 IOCUseOnly02; /* 0x02 */ 1453 U8 Function; /* 0x03 */ 1454 U16 IOCUseOnly04; /* 0x04 */ 1455 U8 IOCUseOnly06; /* 0x06 */ 1456 U8 MsgFlags; /* 0x07 */ 1457 U16 IOCUseOnly08; /* 0x08 */ 1458 U16 IOCStatus; /* 0x0A */ 1459 U32 IOCLogInfo; /* 0x0C */ 1460 U8 Flags; /* 0x10 */ 1461 U8 CacheDirty; /* 0x11 */ 1462 U8 PendingCount; /* 0x12 */ 1463 U8 Reserved13; /* 0x13 */ 1464 } MPI3_CI_DOWNLOAD_REPLY, MPI3_POINTER PTR_MPI3_CI_DOWNLOAD_REPLY, 1465 Mpi3CIDownloadReply_t, MPI3_POINTER pMpi3CIDownloadReply_t; 1466 1467 /**** Definitions for the Flags field ****/ 1468 #define MPI3_CI_DOWNLOAD_FLAGS_DOWNLOAD_IN_PROGRESS (0x80) 1469 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_FAILURE (0x40) 1470 #define MPI3_CI_DOWNLOAD_FLAGS_OFFLINE_ACTIVATION_REQUIRED (0x20) 1471 #define MPI3_CI_DOWNLOAD_FLAGS_KEY_UPDATE_PENDING (0x10) 1472 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_MASK (0x0E) 1473 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_NOT_NEEDED (0x00) 1474 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_AWAITING (0x02) 1475 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_ONLINE_PENDING (0x04) 1476 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_OFFLINE_PENDING (0x06) 1477 #define MPI3_CI_DOWNLOAD_FLAGS_COMPATIBLE (0x01) 1478 1479 /***************************************************************************** 1480 * Component Image Upload * 1481 ****************************************************************************/ 1482 typedef struct _MPI3_CI_UPLOAD_REQUEST 1483 { 1484 U16 HostTag; /* 0x00 */ 1485 U8 IOCUseOnly02; /* 0x02 */ 1486 U8 Function; /* 0x03 */ 1487 U16 IOCUseOnly04; /* 0x04 */ 1488 U8 IOCUseOnly06; /* 0x06 */ 1489 U8 MsgFlags; /* 0x07 */ 1490 U16 ChangeCount; /* 0x08 */ 1491 U16 Reserved0A; /* 0x0A */ 1492 U32 Signature1; /* 0x0C */ 1493 U32 Reserved10; /* 0x10 */ 1494 U32 ImageOffset; /* 0x14 */ 1495 U32 SegmentSize; /* 0x18 */ 1496 U32 Reserved1C; /* 0x1C */ 1497 MPI3_SGE_UNION SGL; /* 0x20 */ 1498 } MPI3_CI_UPLOAD_REQUEST, MPI3_POINTER PTR_MPI3_CI_UPLOAD_REQUEST, 1499 Mpi3CIUploadRequest_t, MPI3_POINTER pMpi3CIUploadRequest_t; 1500 1501 /**** Defines for the MsgFlags field ****/ 1502 #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_MASK (0x01) 1503 #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_PRIMARY (0x00) 1504 #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_SECONDARY (0x01) 1505 #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_MASK (0x02) 1506 #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_FLASH (0x00) 1507 #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_EXECUTABLE (0x02) 1508 1509 /**** Defines for Signature1 field - use MPI3_IMAGE_HEADER_SIGNATURE1_ defines */ 1510 1511 /***************************************************************************** 1512 * IO Unit Control * 1513 ****************************************************************************/ 1514 1515 /**** Definitions for the Operation field ****/ 1516 #define MPI3_CTRL_OP_FORCE_FULL_DISCOVERY (0x01) 1517 #define MPI3_CTRL_OP_LOOKUP_MAPPING (0x02) 1518 #define MPI3_CTRL_OP_UPDATE_TIMESTAMP (0x04) 1519 #define MPI3_CTRL_OP_GET_TIMESTAMP (0x05) 1520 #define MPI3_CTRL_OP_GET_IOC_CHANGE_COUNT (0x06) 1521 #define MPI3_CTRL_OP_CHANGE_PROFILE (0x07) 1522 #define MPI3_CTRL_OP_REMOVE_DEVICE (0x10) 1523 #define MPI3_CTRL_OP_CLOSE_PERSISTENT_CONNECTION (0x11) 1524 #define MPI3_CTRL_OP_HIDDEN_ACK (0x12) 1525 #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS (0x13) 1526 #define MPI3_CTRL_OP_SEND_SAS_PRIMITIVE (0x20) 1527 #define MPI3_CTRL_OP_SAS_PHY_CONTROL (0x21) 1528 #define MPI3_CTRL_OP_READ_INTERNAL_BUS (0x23) 1529 #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS (0x24) 1530 #define MPI3_CTRL_OP_PCIE_LINK_CONTROL (0x30) 1531 1532 /**** Depending on the Operation selected, the various ParamX fields *****/ 1533 /**** contain defined data values. These indexes help identify those values *****/ 1534 #define MPI3_CTRL_OP_LOOKUP_MAPPING_PARAM8_LOOKUP_METHOD_INDEX (0x00) 1535 #define MPI3_CTRL_OP_UPDATE_TIMESTAMP_PARAM64_TIMESTAMP_INDEX (0x00) 1536 #define MPI3_CTRL_OP_CHANGE_PROFILE_PARAM8_PROFILE_ID_INDEX (0x00) 1537 #define MPI3_CTRL_OP_REMOVE_DEVICE_PARAM16_DEVHANDLE_INDEX (0x00) 1538 #define MPI3_CTRL_OP_CLOSE_PERSIST_CONN_PARAM16_DEVHANDLE_INDEX (0x00) 1539 #define MPI3_CTRL_OP_HIDDEN_ACK_PARAM16_DEVHANDLE_INDEX (0x00) 1540 #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS_PARAM16_DEVHANDLE_INDEX (0x00) 1541 #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PHY_INDEX (0x00) 1542 #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PRIMSEQ_INDEX (0x01) 1543 #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM32_PRIMITIVE_INDEX (0x00) 1544 #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_ACTION_INDEX (0x00) 1545 #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_PHY_INDEX (0x01) 1546 #define MPI3_CTRL_OP_READ_INTERNAL_BUS_PARAM64_ADDRESS_INDEX (0x00) 1547 #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM64_ADDRESS_INDEX (0x00) 1548 #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM32_VALUE_INDEX (0x00) 1549 #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_ACTION_INDEX (0x00) 1550 #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_LINK_INDEX (0x01) 1551 1552 /**** Definitions for the LookupMethod field in LOOKUP_MAPPING reqs ****/ 1553 #define MPI3_CTRL_LOOKUP_METHOD_WWID_ADDRESS (0x01) 1554 #define MPI3_CTRL_LOOKUP_METHOD_ENCLOSURE_SLOT (0x02) 1555 #define MPI3_CTRL_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03) 1556 #define MPI3_CTRL_LOOKUP_METHOD_PERSISTENT_ID (0x04) 1557 1558 /**** Definitions for IoUnitControl Lookup Mapping Method Parameters ****/ 1559 #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM16_DEVH_INDEX (0) 1560 #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM64_WWID_INDEX (0) 1561 #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM16_SLOTNUM_INDEX (0) 1562 #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM64_ENCLOSURELID_INDEX (0) 1563 #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM16_DEVH_INDEX (0) 1564 #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM64_DEVNAME_INDEX (0) 1565 #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_DEVH_INDEX (0) 1566 #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_PERSISTENT_ID_INDEX (1) 1567 1568 /*** Definitions for IoUnitControl Reply fields ****/ 1569 #define MPI3_CTRL_LOOKUP_METHOD_VALUE16_DEVH_INDEX (0) 1570 #define MPI3_CTRL_GET_TIMESTAMP_VALUE64_TIMESTAMP_INDEX (0) 1571 #define MPI3_CTRL_GET_IOC_CHANGE_COUNT_VALUE16_CHANGECOUNT_INDEX (0) 1572 #define MPI3_CTRL_READ_INTERNAL_BUS_VALUE32_VALUE_INDEX (0) 1573 1574 /**** Definitions for the PrimSeq field in SEND_SAS_PRIMITIVE reqs ****/ 1575 #define MPI3_CTRL_PRIMFLAGS_SINGLE (0x01) 1576 #define MPI3_CTRL_PRIMFLAGS_TRIPLE (0x03) 1577 #define MPI3_CTRL_PRIMFLAGS_REDUNDANT (0x06) 1578 1579 /**** Definitions for the Action field in PCIE_LINK_CONTROL and SAS_PHY_CONTROL reqs ****/ 1580 #define MPI3_CTRL_ACTION_NOP (0x00) 1581 #define MPI3_CTRL_ACTION_LINK_RESET (0x01) 1582 #define MPI3_CTRL_ACTION_HARD_RESET (0x02) 1583 #define MPI3_CTRL_ACTION_CLEAR_ERROR_LOG (0x05) 1584 1585 typedef struct _MPI3_IOUNIT_CONTROL_REQUEST 1586 { 1587 U16 HostTag; /* 0x00 */ 1588 U8 IOCUseOnly02; /* 0x02 */ 1589 U8 Function; /* 0x03 */ 1590 U16 IOCUseOnly04; /* 0x04 */ 1591 U8 IOCUseOnly06; /* 0x06 */ 1592 U8 MsgFlags; /* 0x07 */ 1593 U16 ChangeCount; /* 0x08 */ 1594 U8 Reserved0A; /* 0x0A */ 1595 U8 Operation; /* 0x0B */ 1596 U32 Reserved0C; /* 0x0C */ 1597 U64 Param64[2]; /* 0x10 */ 1598 U32 Param32[4]; /* 0x20 */ 1599 U16 Param16[4]; /* 0x30 */ 1600 U8 Param8[8]; /* 0x38 */ 1601 } MPI3_IOUNIT_CONTROL_REQUEST, MPI3_POINTER PTR_MPI3_IOUNIT_CONTROL_REQUEST, 1602 Mpi3IoUnitControlRequest_t, MPI3_POINTER pMpi3IoUnitControlRequest_t; 1603 1604 1605 typedef struct _MPI3_IOUNIT_CONTROL_REPLY 1606 { 1607 U16 HostTag; /* 0x00 */ 1608 U8 IOCUseOnly02; /* 0x02 */ 1609 U8 Function; /* 0x03 */ 1610 U16 IOCUseOnly04; /* 0x04 */ 1611 U8 IOCUseOnly06; /* 0x06 */ 1612 U8 MsgFlags; /* 0x07 */ 1613 U16 IOCUseOnly08; /* 0x08 */ 1614 U16 IOCStatus; /* 0x0A */ 1615 U32 IOCLogInfo; /* 0x0C */ 1616 U64 Value64[2]; /* 0x10 */ 1617 U32 Value32[4]; /* 0x20 */ 1618 U16 Value16[4]; /* 0x30 */ 1619 U8 Value8[8]; /* 0x38 */ 1620 } MPI3_IOUNIT_CONTROL_REPLY, MPI3_POINTER PTR_MPI3_IOUNIT_CONTROL_REPLY, 1621 Mpi3IoUnitControlReply_t, MPI3_POINTER pMpi3IoUnitControlReply_t; 1622 1623 #endif /* MPI30_IOC_H */ 1624 1625 1626