| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 306 assert(ScratchReg != MaskReg && "ScratchReg and MaskReg must be unique"); in doMaskedAtomicBinOpExpansion() local
278 insertMaskedMerge(const RISCVInstrInfo * TII,DebugLoc DL,MachineBasicBlock * MBB,Register DestReg,Register OldValReg,Register NewValReg,Register MaskReg,Register ScratchReg) insertMaskedMerge() argument
446 Register MaskReg = MI.getOperand(5).getReg(); expandAtomicMinMaxOp() local
544 tryToFoldBNEOnCmpXchgResult(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,Register DestReg,Register CmpValReg,Register MaskReg,MachineBasicBlock * & LoopHeadBNETarget) tryToFoldBNEOnCmpXchgResult() argument
611 Register MaskReg = IsMasked ? MI.getOperand(5).getReg() : Register(); expandAtomicCmpXchg() local
659 Register MaskReg = MI.getOperand(5).getReg(); expandAtomicCmpXchg() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandAtomicPseudoInsts.cpp | 227 insertMaskedMerge(const LoongArchInstrInfo * TII,DebugLoc DL,MachineBasicBlock * MBB,Register DestReg,Register OldValReg,Register NewValReg,Register MaskReg,Register ScratchReg) insertMaskedMerge() argument
253 Register MaskReg = MI.getOperand(4).getReg(); doMaskedAtomicBinOpExpansion() local
401 Register MaskReg = MI.getOperand(5).getReg(); expandAtomicMinMaxOp() local
562 Register MaskReg = MI.getOperand(5).getReg(); expandAtomicCmpXchg() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 101 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 4810 Register MaskReg = MI.getOperand(2).getReg(); in getInstrMapping() local
4819 Register MaskReg = MI.getOperand(2).getReg(); in getInstrMapping() local
4837 Register MaskReg = MI.getOperand(2).getReg(); in getInstrMapping() local
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| H A D | AMDGPUInstructionSelector.cpp | 2899 Register MaskReg = I.getOperand(2).getReg(); in selectG_PTRMASK() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 232 Register MaskReg = getMRI()->createGenericVirtualRegister(MaskTy); in buildMaskLowPtrBits() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 6175 Register MaskReg = MIB.getReg(1); in expandPostRAPseudo() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 1481 MachineInstr *PTest, unsigned MaskReg, unsigned PredReg, in optimizePTestInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3130 Register MaskReg = I.getOperand(2).getReg(); in select() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 12272 Register MaskReg = RegInfo.createVirtualRegister(GPRC); in EmitPartwordAtomicBinary() local
13287 Register MaskReg = RegInfo.createVirtualRegister(GPRC); in EmitInstrWithCustomInserter() local
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