xref: /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/imx7d-pinfunc.h (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1  /* SPDX-License-Identifier: GPL-2.0-only */
2  /*
3   * Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
4   */
5  
6  #ifndef __DTS_IMX7D_PINFUNC_H
7  #define __DTS_IMX7D_PINFUNC_H
8  
9  /*
10   * The pin function ID is a tuple of
11   * <mux_reg conf_reg input_reg mux_mode input_val>
12   */
13  
14  #define MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0                       0x0000 0x0030 0x0000 0x0 0x0
15  #define MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT                        0x0000 0x0030 0x0000 0x1 0x0
16  #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_ANY                  0x0000 0x0030 0x0000 0x2 0x0
17  #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B                    0x0000 0x0030 0x0000 0x3 0x0
18  #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG__RST_B_DEB           0x0000 0x0030 0x0000 0x4 0x0
19  #define MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1                       0x0004 0x0034 0x0000 0x0 0x0
20  #define MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT                        0x0004 0x0034 0x0000 0x1 0x0
21  #define MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3               0x0004 0x0034 0x0000 0x2 0x0
22  #define MX7D_PAD_LPSR_GPIO1_IO01__SAI1_MCLK                       0x0004 0x0034 0x0000 0x3 0x0
23  #define MX7D_PAD_LPSR_GPIO1_IO01__ANATOP_24M_OUT                  0x0004 0x0034 0x0000 0x4 0x0
24  #define MX7D_PAD_LPSR_GPIO1_IO01__OBSERVE0_OUT                    0x0004 0x0034 0x0000 0x6 0x0
25  #define MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2                       0x0008 0x0038 0x0000 0x0 0x0
26  #define MX7D_PAD_LPSR_GPIO1_IO02__PWM2_OUT                        0x0008 0x0038 0x0000 0x1 0x0
27  #define MX7D_PAD_LPSR_GPIO1_IO02__CCM_ENET_REF_CLK1               0x0008 0x0038 0x0564 0x2 0x3
28  #define MX7D_PAD_LPSR_GPIO1_IO02__SAI2_MCLK                       0x0008 0x0038 0x0000 0x3 0x0
29  #define MX7D_PAD_LPSR_GPIO1_IO02__CCM_CLKO1                       0x0008 0x0038 0x0000 0x5 0x0
30  #define MX7D_PAD_LPSR_GPIO1_IO02__OBSERVE1_OUT                    0x0008 0x0038 0x0000 0x6 0x0
31  #define MX7D_PAD_LPSR_GPIO1_IO02__USB_OTG1_ID                     0x0008 0x0038 0x0734 0x7 0x3
32  #define MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3                       0x000C 0x003C 0x0000 0x0 0x0
33  #define MX7D_PAD_LPSR_GPIO1_IO03__PWM3_OUT                        0x000C 0x003C 0x0000 0x1 0x0
34  #define MX7D_PAD_LPSR_GPIO1_IO03__CCM_ENET_REF_CLK2               0x000C 0x003C 0x0570 0x2 0x3
35  #define MX7D_PAD_LPSR_GPIO1_IO03__SAI3_MCLK                       0x000C 0x003C 0x0000 0x3 0x0
36  #define MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2                       0x000C 0x003C 0x0000 0x5 0x0
37  #define MX7D_PAD_LPSR_GPIO1_IO03__OBSERVE2_OUT                    0x000C 0x003C 0x0000 0x6 0x0
38  #define MX7D_PAD_LPSR_GPIO1_IO03__USB_OTG2_ID                     0x000C 0x003C 0x0730 0x7 0x3
39  #define MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4                       0x0010 0x0040 0x0000 0x0 0x0
40  #define MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC                     0x0010 0x0040 0x072C 0x1 0x1
41  #define MX7D_PAD_LPSR_GPIO1_IO04__FLEXTIMER1_CH4                  0x0010 0x0040 0x0594 0x2 0x1
42  #define MX7D_PAD_LPSR_GPIO1_IO04__UART5_DCE_CTS                   0x0010 0x0040 0x0000 0x3 0x0
43  #define MX7D_PAD_LPSR_GPIO1_IO04__UART5_DTE_RTS                   0x0010 0x0040 0x0710 0x3 0x4
44  #define MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL                        0x0010 0x0040 0x05D4 0x4 0x2
45  #define MX7D_PAD_LPSR_GPIO1_IO04__OBSERVE3_OUT                    0x0010 0x0040 0x0000 0x6 0x0
46  #define MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5                       0x0014 0x0044 0x0000 0x0 0x0
47  #define MX7D_PAD_LPSR_GPIO1_IO05__USB_OTG1_PWR                    0x0014 0x0044 0x0000 0x1 0x0
48  #define MX7D_PAD_LPSR_GPIO1_IO05__FLEXTIMER1_CH5                  0x0014 0x0044 0x0598 0x2 0x1
49  #define MX7D_PAD_LPSR_GPIO1_IO05__UART5_DCE_RTS                   0x0014 0x0044 0x0710 0x3 0x5
50  #define MX7D_PAD_LPSR_GPIO1_IO05__UART5_DTE_CTS                   0x0014 0x0044 0x0000 0x3 0x0
51  #define MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA                        0x0014 0x0044 0x05D8 0x4 0x2
52  #define MX7D_PAD_LPSR_GPIO1_IO05__OBSERVE4_OUT                    0x0014 0x0044 0x0000 0x6 0x0
53  #define MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6                       0x0018 0x0048 0x0000 0x0 0x0
54  #define MX7D_PAD_LPSR_GPIO1_IO06__USB_OTG2_OC                     0x0018 0x0048 0x0728 0x1 0x1
55  #define MX7D_PAD_LPSR_GPIO1_IO06__FLEXTIMER1_CH6                  0x0018 0x0048 0x059C 0x2 0x1
56  #define MX7D_PAD_LPSR_GPIO1_IO06__UART5_DCE_RX                    0x0018 0x0048 0x0714 0x3 0x4
57  #define MX7D_PAD_LPSR_GPIO1_IO06__UART5_DTE_TX                    0x0018 0x0048 0x0000 0x3 0x0
58  #define MX7D_PAD_LPSR_GPIO1_IO06__I2C2_SCL                        0x0018 0x0048 0x05DC 0x4 0x2
59  #define MX7D_PAD_LPSR_GPIO1_IO06__CCM_WAIT                        0x0018 0x0048 0x0000 0x5 0x0
60  #define MX7D_PAD_LPSR_GPIO1_IO06__KPP_ROW4                        0x0018 0x0048 0x0624 0x6 0x1
61  #define MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7                       0x001C 0x004C 0x0000 0x0 0x0
62  #define MX7D_PAD_LPSR_GPIO1_IO07__USB_OTG2_PWR                    0x001C 0x004C 0x0000 0x1 0x0
63  #define MX7D_PAD_LPSR_GPIO1_IO07__FLEXTIMER1_CH7                  0x001C 0x004C 0x05A0 0x2 0x1
64  #define MX7D_PAD_LPSR_GPIO1_IO07__UART5_DCE_TX                    0x001C 0x004C 0x0000 0x3 0x0
65  #define MX7D_PAD_LPSR_GPIO1_IO07__UART5_DTE_RX                    0x001C 0x004C 0x0714 0x3 0x5
66  #define MX7D_PAD_LPSR_GPIO1_IO07__I2C2_SDA                        0x001C 0x004C 0x05E0 0x4 0x2
67  #define MX7D_PAD_LPSR_GPIO1_IO07__CCM_STOP                        0x001C 0x004C 0x0000 0x5 0x0
68  #define MX7D_PAD_LPSR_GPIO1_IO07__KPP_COL4                        0x001C 0x004C 0x0604 0x6 0x1
69  #define MX7D_PAD_GPIO1_IO08__GPIO1_IO8                            0x0014 0x026C 0x0000 0x0 0x0
70  #define MX7D_PAD_GPIO1_IO08__SD1_VSELECT                          0x0014 0x026C 0x0000 0x1 0x0
71  #define MX7D_PAD_GPIO1_IO08__WDOG1_WDOG_B                         0x0014 0x026C 0x0000 0x2 0x0
72  #define MX7D_PAD_GPIO1_IO08__UART3_DCE_RX                         0x0014 0x026C 0x0704 0x3 0x0
73  #define MX7D_PAD_GPIO1_IO08__UART3_DTE_TX                         0x0014 0x026C 0x0000 0x3 0x0
74  #define MX7D_PAD_GPIO1_IO08__I2C3_SCL                             0x0014 0x026C 0x05E4 0x4 0x0
75  #define MX7D_PAD_GPIO1_IO08__KPP_COL5                             0x0014 0x026C 0x0608 0x6 0x0
76  #define MX7D_PAD_GPIO1_IO08__PWM1_OUT                             0x0014 0x026C 0x0000 0x7 0x0
77  #define MX7D_PAD_GPIO1_IO09__GPIO1_IO9                            0x0018 0x0270 0x0000 0x0 0x0
78  #define MX7D_PAD_GPIO1_IO09__SD1_LCTL                             0x0018 0x0270 0x0000 0x1 0x0
79  #define MX7D_PAD_GPIO1_IO09__CCM_ENET_REF_CLK3                    0x0018 0x0270 0x0000 0x2 0x0
80  #define MX7D_PAD_GPIO1_IO09__UART3_DCE_TX                         0x0018 0x0270 0x0000 0x3 0x0
81  #define MX7D_PAD_GPIO1_IO09__UART3_DTE_RX                         0x0018 0x0270 0x0704 0x3 0x1
82  #define MX7D_PAD_GPIO1_IO09__I2C3_SDA                             0x0018 0x0270 0x05E8 0x4 0x0
83  #define MX7D_PAD_GPIO1_IO09__CCM_PMIC_READY                       0x0018 0x0270 0x04F4 0x5 0x0
84  #define MX7D_PAD_GPIO1_IO09__KPP_ROW5                             0x0018 0x0270 0x0628 0x6 0x0
85  #define MX7D_PAD_GPIO1_IO09__PWM2_OUT                             0x0018 0x0270 0x0000 0x7 0x0
86  #define MX7D_PAD_GPIO1_IO10__GPIO1_IO10                           0x001C 0x0274 0x0000 0x0 0x0
87  #define MX7D_PAD_GPIO1_IO10__SD2_LCTL                             0x001C 0x0274 0x0000 0x1 0x0
88  #define MX7D_PAD_GPIO1_IO10__ENET1_MDIO                           0x001C 0x0274 0x0568 0x2 0x0
89  #define MX7D_PAD_GPIO1_IO10__UART3_DCE_RTS                        0x001C 0x0274 0x0700 0x3 0x0
90  #define MX7D_PAD_GPIO1_IO10__UART3_DTE_CTS                        0x001C 0x0274 0x0000 0x3 0x0
91  #define MX7D_PAD_GPIO1_IO10__I2C4_SCL                             0x001C 0x0274 0x05EC 0x4 0x0
92  #define MX7D_PAD_GPIO1_IO10__FLEXTIMER1_PHA                       0x001C 0x0274 0x05A4 0x5 0x0
93  #define MX7D_PAD_GPIO1_IO10__KPP_COL6                             0x001C 0x0274 0x060C 0x6 0x0
94  #define MX7D_PAD_GPIO1_IO10__PWM3_OUT                             0x001C 0x0274 0x0000 0x7 0x0
95  #define MX7D_PAD_GPIO1_IO11__GPIO1_IO11                           0x0020 0x0278 0x0000 0x0 0x0
96  #define MX7D_PAD_GPIO1_IO11__SD3_LCTL                             0x0020 0x0278 0x0000 0x1 0x0
97  #define MX7D_PAD_GPIO1_IO11__ENET1_MDC                            0x0020 0x0278 0x0000 0x2 0x0
98  #define MX7D_PAD_GPIO1_IO11__UART3_DCE_CTS                        0x0020 0x0278 0x0000 0x3 0x0
99  #define MX7D_PAD_GPIO1_IO11__UART3_DTE_RTS                        0x0020 0x0278 0x0700 0x3 0x1
100  #define MX7D_PAD_GPIO1_IO11__I2C4_SDA                             0x0020 0x0278 0x05F0 0x4 0x0
101  #define MX7D_PAD_GPIO1_IO11__FLEXTIMER1_PHB                       0x0020 0x0278 0x05A8 0x5 0x0
102  #define MX7D_PAD_GPIO1_IO11__KPP_ROW6                             0x0020 0x0278 0x062C 0x6 0x0
103  #define MX7D_PAD_GPIO1_IO11__PWM4_OUT                             0x0020 0x0278 0x0000 0x7 0x0
104  #define MX7D_PAD_GPIO1_IO12__GPIO1_IO12                           0x0024 0x027C 0x0000 0x0 0x0
105  #define MX7D_PAD_GPIO1_IO12__SD2_VSELECT                          0x0024 0x027C 0x0000 0x1 0x0
106  #define MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1                    0x0024 0x027C 0x0564 0x2 0x0
107  #define MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX                          0x0024 0x027C 0x04DC 0x3 0x0
108  #define MX7D_PAD_GPIO1_IO12__CM4_NMI                              0x0024 0x027C 0x0000 0x4 0x0
109  #define MX7D_PAD_GPIO1_IO12__CCM_EXT_CLK1                         0x0024 0x027C 0x04E4 0x5 0x0
110  #define MX7D_PAD_GPIO1_IO12__SNVS_VIO_5                           0x0024 0x027C 0x0000 0x6 0x0
111  #define MX7D_PAD_GPIO1_IO12__USB_OTG1_ID                          0x0024 0x027C 0x0734 0x7 0x0
112  #define MX7D_PAD_GPIO1_IO13__GPIO1_IO13                           0x0028 0x0280 0x0000 0x0 0x0
113  #define MX7D_PAD_GPIO1_IO13__SD3_VSELECT                          0x0028 0x0280 0x0000 0x1 0x0
114  #define MX7D_PAD_GPIO1_IO13__CCM_ENET_REF_CLK2                    0x0028 0x0280 0x0570 0x2 0x0
115  #define MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX                          0x0028 0x0280 0x0000 0x3 0x0
116  #define MX7D_PAD_GPIO1_IO13__CCM_PMIC_READY                       0x0028 0x0280 0x04F4 0x4 0x1
117  #define MX7D_PAD_GPIO1_IO13__CCM_EXT_CLK2                         0x0028 0x0280 0x04E8 0x5 0x0
118  #define MX7D_PAD_GPIO1_IO13__SNVS_VIO_5_CTL                       0x0028 0x0280 0x0000 0x6 0x0
119  #define MX7D_PAD_GPIO1_IO13__USB_OTG2_ID                          0x0028 0x0280 0x0730 0x7 0x0
120  #define MX7D_PAD_GPIO1_IO14__GPIO1_IO14                           0x002C 0x0284 0x0000 0x0 0x0
121  #define MX7D_PAD_GPIO1_IO14__SD3_CD_B                             0x002C 0x0284 0x0738 0x1 0x0
122  #define MX7D_PAD_GPIO1_IO14__ENET2_MDIO                           0x002C 0x0284 0x0574 0x2 0x0
123  #define MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX                          0x002C 0x0284 0x04E0 0x3 0x0
124  #define MX7D_PAD_GPIO1_IO14__WDOG3_WDOG_B                         0x002C 0x0284 0x0000 0x4 0x0
125  #define MX7D_PAD_GPIO1_IO14__CCM_EXT_CLK3                         0x002C 0x0284 0x04EC 0x5 0x0
126  #define MX7D_PAD_GPIO1_IO14__SDMA_EXT_EVENT0                      0x002C 0x0284 0x06D8 0x6 0x0
127  #define MX7D_PAD_GPIO1_IO15__GPIO1_IO15                           0x0030 0x0288 0x0000 0x0 0x0
128  #define MX7D_PAD_GPIO1_IO15__SD3_WP                               0x0030 0x0288 0x073C 0x1 0x0
129  #define MX7D_PAD_GPIO1_IO15__ENET2_MDC                            0x0030 0x0288 0x0000 0x2 0x0
130  #define MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX                          0x0030 0x0288 0x0000 0x3 0x0
131  #define MX7D_PAD_GPIO1_IO15__WDOG4_WDOG_B                         0x0030 0x0288 0x0000 0x4 0x0
132  #define MX7D_PAD_GPIO1_IO15__CCM_EXT_CLK4                         0x0030 0x0288 0x04F0 0x5 0x0
133  #define MX7D_PAD_GPIO1_IO15__SDMA_EXT_EVENT1                      0x0030 0x0288 0x06DC 0x6 0x0
134  #define MX7D_PAD_EPDC_DATA00__EPDC_DATA0                          0x0034 0x02A4 0x0000 0x0 0x0
135  #define MX7D_PAD_EPDC_DATA00__SIM1_PORT2_TRXD                     0x0034 0x02A4 0x0000 0x1 0x0
136  #define MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0                        0x0034 0x02A4 0x0000 0x2 0x0
137  #define MX7D_PAD_EPDC_DATA00__KPP_ROW3                            0x0034 0x02A4 0x0620 0x3 0x0
138  #define MX7D_PAD_EPDC_DATA00__EIM_AD0                             0x0034 0x02A4 0x0000 0x4 0x0
139  #define MX7D_PAD_EPDC_DATA00__GPIO2_IO0                           0x0034 0x02A4 0x0000 0x5 0x0
140  #define MX7D_PAD_EPDC_DATA00__LCD_DATA0                           0x0034 0x02A4 0x0638 0x6 0x0
141  #define MX7D_PAD_EPDC_DATA00__LCD_CLK                             0x0034 0x02A4 0x0000 0x7 0x0
142  #define MX7D_PAD_EPDC_DATA01__EPDC_DATA1                          0x0038 0x02A8 0x0000 0x0 0x0
143  #define MX7D_PAD_EPDC_DATA01__SIM1_PORT2_CLK                      0x0038 0x02A8 0x0000 0x1 0x0
144  #define MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1                        0x0038 0x02A8 0x0000 0x2 0x0
145  #define MX7D_PAD_EPDC_DATA01__KPP_COL3                            0x0038 0x02A8 0x0600 0x3 0x0
146  #define MX7D_PAD_EPDC_DATA01__EIM_AD1                             0x0038 0x02A8 0x0000 0x4 0x0
147  #define MX7D_PAD_EPDC_DATA01__GPIO2_IO1                           0x0038 0x02A8 0x0000 0x5 0x0
148  #define MX7D_PAD_EPDC_DATA01__LCD_DATA1                           0x0038 0x02A8 0x063C 0x6 0x0
149  #define MX7D_PAD_EPDC_DATA01__LCD_ENABLE                          0x0038 0x02A8 0x0000 0x7 0x0
150  #define MX7D_PAD_EPDC_DATA02__EPDC_DATA2                          0x003C 0x02AC 0x0000 0x0 0x0
151  #define MX7D_PAD_EPDC_DATA02__SIM1_PORT2_RST_B                    0x003C 0x02AC 0x0000 0x1 0x0
152  #define MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2                        0x003C 0x02AC 0x0000 0x2 0x0
153  #define MX7D_PAD_EPDC_DATA02__KPP_ROW2                            0x003C 0x02AC 0x061C 0x3 0x0
154  #define MX7D_PAD_EPDC_DATA02__EIM_AD2                             0x003C 0x02AC 0x0000 0x4 0x0
155  #define MX7D_PAD_EPDC_DATA02__GPIO2_IO2                           0x003C 0x02AC 0x0000 0x5 0x0
156  #define MX7D_PAD_EPDC_DATA02__LCD_DATA2                           0x003C 0x02AC 0x0640 0x6 0x0
157  #define MX7D_PAD_EPDC_DATA02__LCD_VSYNC                           0x003C 0x02AC 0x0698 0x7 0x0
158  #define MX7D_PAD_EPDC_DATA03__EPDC_DATA3                          0x0040 0x02B0 0x0000 0x0 0x0
159  #define MX7D_PAD_EPDC_DATA03__SIM1_PORT2_SVEN                     0x0040 0x02B0 0x0000 0x1 0x0
160  #define MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3                        0x0040 0x02B0 0x0000 0x2 0x0
161  #define MX7D_PAD_EPDC_DATA03__KPP_COL2                            0x0040 0x02B0 0x05FC 0x3 0x0
162  #define MX7D_PAD_EPDC_DATA03__EIM_AD3                             0x0040 0x02B0 0x0000 0x4 0x0
163  #define MX7D_PAD_EPDC_DATA03__GPIO2_IO3                           0x0040 0x02B0 0x0000 0x5 0x0
164  #define MX7D_PAD_EPDC_DATA03__LCD_DATA3                           0x0040 0x02B0 0x0644 0x6 0x0
165  #define MX7D_PAD_EPDC_DATA03__LCD_HSYNC                           0x0040 0x02B0 0x0000 0x7 0x0
166  #define MX7D_PAD_EPDC_DATA04__EPDC_DATA4                          0x0044 0x02B4 0x0000 0x0 0x0
167  #define MX7D_PAD_EPDC_DATA04__SIM1_PORT2_PD                       0x0044 0x02B4 0x0000 0x1 0x0
168  #define MX7D_PAD_EPDC_DATA04__QSPI_A_DQS                          0x0044 0x02B4 0x0000 0x2 0x0
169  #define MX7D_PAD_EPDC_DATA04__KPP_ROW1                            0x0044 0x02B4 0x0618 0x3 0x0
170  #define MX7D_PAD_EPDC_DATA04__EIM_AD4                             0x0044 0x02B4 0x0000 0x4 0x0
171  #define MX7D_PAD_EPDC_DATA04__GPIO2_IO4                           0x0044 0x02B4 0x0000 0x5 0x0
172  #define MX7D_PAD_EPDC_DATA04__LCD_DATA4                           0x0044 0x02B4 0x0648 0x6 0x0
173  #define MX7D_PAD_EPDC_DATA04__JTAG_FAIL                           0x0044 0x02B4 0x0000 0x7 0x0
174  #define MX7D_PAD_EPDC_DATA05__EPDC_DATA5                          0x0048 0x02B8 0x0000 0x0 0x0
175  #define MX7D_PAD_EPDC_DATA05__SIM2_PORT2_TRXD                     0x0048 0x02B8 0x0000 0x1 0x0
176  #define MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK                         0x0048 0x02B8 0x0000 0x2 0x0
177  #define MX7D_PAD_EPDC_DATA05__KPP_COL1                            0x0048 0x02B8 0x05F8 0x3 0x0
178  #define MX7D_PAD_EPDC_DATA05__EIM_AD5                             0x0048 0x02B8 0x0000 0x4 0x0
179  #define MX7D_PAD_EPDC_DATA05__GPIO2_IO5                           0x0048 0x02B8 0x0000 0x5 0x0
180  #define MX7D_PAD_EPDC_DATA05__LCD_DATA5                           0x0048 0x02B8 0x064C 0x6 0x0
181  #define MX7D_PAD_EPDC_DATA05__JTAG_ACTIVE                         0x0048 0x02B8 0x0000 0x7 0x0
182  #define MX7D_PAD_EPDC_DATA06__EPDC_DATA6                          0x004C 0x02BC 0x0000 0x0 0x0
183  #define MX7D_PAD_EPDC_DATA06__SIM2_PORT2_CLK                      0x004C 0x02BC 0x0000 0x1 0x0
184  #define MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B                        0x004C 0x02BC 0x0000 0x2 0x0
185  #define MX7D_PAD_EPDC_DATA06__KPP_ROW0                            0x004C 0x02BC 0x0614 0x3 0x0
186  #define MX7D_PAD_EPDC_DATA06__EIM_AD6                             0x004C 0x02BC 0x0000 0x4 0x0
187  #define MX7D_PAD_EPDC_DATA06__GPIO2_IO6                           0x004C 0x02BC 0x0000 0x5 0x0
188  #define MX7D_PAD_EPDC_DATA06__LCD_DATA6                           0x004C 0x02BC 0x0650 0x6 0x0
189  #define MX7D_PAD_EPDC_DATA06__JTAG_DE_B                           0x004C 0x02BC 0x0000 0x7 0x0
190  #define MX7D_PAD_EPDC_DATA07__EPDC_DATA7                          0x0050 0x02C0 0x0000 0x0 0x0
191  #define MX7D_PAD_EPDC_DATA07__SIM2_PORT2_RST_B                    0x0050 0x02C0 0x0000 0x1 0x0
192  #define MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B                        0x0050 0x02C0 0x0000 0x2 0x0
193  #define MX7D_PAD_EPDC_DATA07__KPP_COL0                            0x0050 0x02C0 0x05F4 0x3 0x0
194  #define MX7D_PAD_EPDC_DATA07__EIM_AD7                             0x0050 0x02C0 0x0000 0x4 0x0
195  #define MX7D_PAD_EPDC_DATA07__GPIO2_IO7                           0x0050 0x02C0 0x0000 0x5 0x0
196  #define MX7D_PAD_EPDC_DATA07__LCD_DATA7                           0x0050 0x02C0 0x0654 0x6 0x0
197  #define MX7D_PAD_EPDC_DATA07__JTAG_DONE                           0x0050 0x02C0 0x0000 0x7 0x0
198  #define MX7D_PAD_EPDC_DATA08__EPDC_DATA8                          0x0054 0x02C4 0x0000 0x0 0x0
199  #define MX7D_PAD_EPDC_DATA08__SIM1_PORT1_TRXD                     0x0054 0x02C4 0x06E4 0x1 0x0
200  #define MX7D_PAD_EPDC_DATA08__QSPI_B_DATA0                        0x0054 0x02C4 0x0000 0x2 0x0
201  #define MX7D_PAD_EPDC_DATA08__UART6_DCE_RX                        0x0054 0x02C4 0x071C 0x3 0x0
202  #define MX7D_PAD_EPDC_DATA08__UART6_DTE_TX                        0x0054 0x02C4 0x0000 0x3 0x0
203  #define MX7D_PAD_EPDC_DATA08__EIM_OE                              0x0054 0x02C4 0x0000 0x4 0x0
204  #define MX7D_PAD_EPDC_DATA08__GPIO2_IO8                           0x0054 0x02C4 0x0000 0x5 0x0
205  #define MX7D_PAD_EPDC_DATA08__LCD_DATA8                           0x0054 0x02C4 0x0658 0x6 0x0
206  #define MX7D_PAD_EPDC_DATA08__LCD_BUSY                            0x0054 0x02C4 0x0634 0x7 0x0
207  #define MX7D_PAD_EPDC_DATA08__EPDC_SDCLK                          0x0054 0x02C4 0x0000 0x8 0x0
208  #define MX7D_PAD_EPDC_DATA09__EPDC_DATA9                          0x0058 0x02C8 0x0000 0x0 0x0
209  #define MX7D_PAD_EPDC_DATA09__SIM1_PORT1_CLK                      0x0058 0x02C8 0x0000 0x1 0x0
210  #define MX7D_PAD_EPDC_DATA09__QSPI_B_DATA1                        0x0058 0x02C8 0x0000 0x2 0x0
211  #define MX7D_PAD_EPDC_DATA09__UART6_DCE_TX                        0x0058 0x02C8 0x0000 0x3 0x0
212  #define MX7D_PAD_EPDC_DATA09__UART6_DTE_RX                        0x0058 0x02C8 0x071C 0x3 0x1
213  #define MX7D_PAD_EPDC_DATA09__EIM_RW                              0x0058 0x02C8 0x0000 0x4 0x0
214  #define MX7D_PAD_EPDC_DATA09__GPIO2_IO9                           0x0058 0x02C8 0x0000 0x5 0x0
215  #define MX7D_PAD_EPDC_DATA09__LCD_DATA9                           0x0058 0x02C8 0x065C 0x6 0x0
216  #define MX7D_PAD_EPDC_DATA09__LCD_DATA0                           0x0058 0x02C8 0x0638 0x7 0x1
217  #define MX7D_PAD_EPDC_DATA09__EPDC_SDLE                           0x0058 0x02C8 0x0000 0x8 0x0
218  #define MX7D_PAD_EPDC_DATA10__EPDC_DATA10                         0x005C 0x02CC 0x0000 0x0 0x0
219  #define MX7D_PAD_EPDC_DATA10__SIM1_PORT1_RST_B                    0x005C 0x02CC 0x0000 0x1 0x0
220  #define MX7D_PAD_EPDC_DATA10__QSPI_B_DATA2                        0x005C 0x02CC 0x0000 0x2 0x0
221  #define MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS                       0x005C 0x02CC 0x0718 0x3 0x0
222  #define MX7D_PAD_EPDC_DATA10__UART6_DTE_CTS                       0x005C 0x02CC 0x0000 0x3 0x0
223  #define MX7D_PAD_EPDC_DATA10__EIM_CS0_B                           0x005C 0x02CC 0x0000 0x4 0x0
224  #define MX7D_PAD_EPDC_DATA10__GPIO2_IO10                          0x005C 0x02CC 0x0000 0x5 0x0
225  #define MX7D_PAD_EPDC_DATA10__LCD_DATA10                          0x005C 0x02CC 0x0660 0x6 0x0
226  #define MX7D_PAD_EPDC_DATA10__LCD_DATA9                           0x005C 0x02CC 0x065C 0x7 0x1
227  #define MX7D_PAD_EPDC_DATA10__EPDC_SDOE                           0x005C 0x02CC 0x0000 0x8 0x0
228  #define MX7D_PAD_EPDC_DATA11__EPDC_DATA11                         0x0060 0x02D0 0x0000 0x0 0x0
229  #define MX7D_PAD_EPDC_DATA11__SIM1_PORT1_SVEN                     0x0060 0x02D0 0x0000 0x1 0x0
230  #define MX7D_PAD_EPDC_DATA11__QSPI_B_DATA3                        0x0060 0x02D0 0x0000 0x2 0x0
231  #define MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS                       0x0060 0x02D0 0x0000 0x3 0x0
232  #define MX7D_PAD_EPDC_DATA11__UART6_DTE_RTS                       0x0060 0x02D0 0x0718 0x3 0x1
233  #define MX7D_PAD_EPDC_DATA11__EIM_BCLK                            0x0060 0x02D0 0x0000 0x4 0x0
234  #define MX7D_PAD_EPDC_DATA11__GPIO2_IO11                          0x0060 0x02D0 0x0000 0x5 0x0
235  #define MX7D_PAD_EPDC_DATA11__LCD_DATA11                          0x0060 0x02D0 0x0664 0x6 0x0
236  #define MX7D_PAD_EPDC_DATA11__LCD_DATA1                           0x0060 0x02D0 0x063C 0x7 0x1
237  #define MX7D_PAD_EPDC_DATA11__EPDC_SDCE0                          0x0060 0x02D0 0x0000 0x8 0x0
238  #define MX7D_PAD_EPDC_DATA12__EPDC_DATA12                         0x0064 0x02D4 0x0000 0x0 0x0
239  #define MX7D_PAD_EPDC_DATA12__SIM1_PORT1_PD                       0x0064 0x02D4 0x06E0 0x1 0x0
240  #define MX7D_PAD_EPDC_DATA12__QSPI_B_DQS                          0x0064 0x02D4 0x0000 0x2 0x0
241  #define MX7D_PAD_EPDC_DATA12__UART7_DCE_RX                        0x0064 0x02D4 0x0724 0x3 0x0
242  #define MX7D_PAD_EPDC_DATA12__UART7_DTE_TX                        0x0064 0x02D4 0x0000 0x3 0x0
243  #define MX7D_PAD_EPDC_DATA12__EIM_LBA_B                           0x0064 0x02D4 0x0000 0x4 0x0
244  #define MX7D_PAD_EPDC_DATA12__GPIO2_IO12                          0x0064 0x02D4 0x0000 0x5 0x0
245  #define MX7D_PAD_EPDC_DATA12__LCD_DATA12                          0x0064 0x02D4 0x0668 0x6 0x0
246  #define MX7D_PAD_EPDC_DATA12__LCD_DATA21                          0x0064 0x02D4 0x068C 0x7 0x0
247  #define MX7D_PAD_EPDC_DATA12__EPDC_GDCLK                          0x0064 0x02D4 0x0000 0x8 0x0
248  #define MX7D_PAD_EPDC_DATA13__EPDC_DATA13                         0x0068 0x02D8 0x0000 0x0 0x0
249  #define MX7D_PAD_EPDC_DATA13__SIM2_PORT1_TRXD                     0x0068 0x02D8 0x06EC 0x1 0x0
250  #define MX7D_PAD_EPDC_DATA13__QSPI_B_SCLK                         0x0068 0x02D8 0x0000 0x2 0x0
251  #define MX7D_PAD_EPDC_DATA13__UART7_DCE_TX                        0x0068 0x02D8 0x0000 0x3 0x0
252  #define MX7D_PAD_EPDC_DATA13__UART7_DTE_RX                        0x0068 0x02D8 0x0724 0x3 0x1
253  #define MX7D_PAD_EPDC_DATA13__EIM_WAIT                            0x0068 0x02D8 0x0000 0x4 0x0
254  #define MX7D_PAD_EPDC_DATA13__GPIO2_IO13                          0x0068 0x02D8 0x0000 0x5 0x0
255  #define MX7D_PAD_EPDC_DATA13__LCD_DATA13                          0x0068 0x02D8 0x066C 0x6 0x0
256  #define MX7D_PAD_EPDC_DATA13__LCD_CS                              0x0068 0x02D8 0x0000 0x7 0x0
257  #define MX7D_PAD_EPDC_DATA13__EPDC_GDOE                           0x0068 0x02D8 0x0000 0x8 0x0
258  #define MX7D_PAD_EPDC_DATA14__EPDC_DATA14                         0x006C 0x02DC 0x0000 0x0 0x0
259  #define MX7D_PAD_EPDC_DATA14__SIM2_PORT1_CLK                      0x006C 0x02DC 0x0000 0x1 0x0
260  #define MX7D_PAD_EPDC_DATA14__QSPI_B_SS0_B                        0x006C 0x02DC 0x0000 0x2 0x0
261  #define MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS                       0x006C 0x02DC 0x0720 0x3 0x0
262  #define MX7D_PAD_EPDC_DATA14__UART7_DTE_CTS                       0x006C 0x02DC 0x0000 0x3 0x0
263  #define MX7D_PAD_EPDC_DATA14__EIM_EB_B0                           0x006C 0x02DC 0x0000 0x4 0x0
264  #define MX7D_PAD_EPDC_DATA14__GPIO2_IO14                          0x006C 0x02DC 0x0000 0x5 0x0
265  #define MX7D_PAD_EPDC_DATA14__LCD_DATA14                          0x006C 0x02DC 0x0670 0x6 0x0
266  #define MX7D_PAD_EPDC_DATA14__LCD_DATA22                          0x006C 0x02DC 0x0690 0x7 0x0
267  #define MX7D_PAD_EPDC_DATA14__EPDC_GDSP                           0x006C 0x02DC 0x0000 0x8 0x0
268  #define MX7D_PAD_EPDC_DATA15__EPDC_DATA15                         0x0070 0x02E0 0x0000 0x0 0x0
269  #define MX7D_PAD_EPDC_DATA15__SIM2_PORT1_RST_B                    0x0070 0x02E0 0x0000 0x1 0x0
270  #define MX7D_PAD_EPDC_DATA15__QSPI_B_SS1_B                        0x0070 0x02E0 0x0000 0x2 0x0
271  #define MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS                       0x0070 0x02E0 0x0000 0x3 0x0
272  #define MX7D_PAD_EPDC_DATA15__UART7_DTE_RTS                       0x0070 0x02E0 0x0720 0x3 0x1
273  #define MX7D_PAD_EPDC_DATA15__EIM_CS1_B                           0x0070 0x02E0 0x0000 0x4 0x0
274  #define MX7D_PAD_EPDC_DATA15__GPIO2_IO15                          0x0070 0x02E0 0x0000 0x5 0x0
275  #define MX7D_PAD_EPDC_DATA15__LCD_DATA15                          0x0070 0x02E0 0x0674 0x6 0x0
276  #define MX7D_PAD_EPDC_DATA15__LCD_WR_RWN                          0x0070 0x02E0 0x0000 0x7 0x0
277  #define MX7D_PAD_EPDC_DATA15__EPDC_PWR_COM                        0x0070 0x02E0 0x0000 0x8 0x0
278  #define MX7D_PAD_EPDC_SDCLK__EPDC_SDCLK                           0x0074 0x02E4 0x0000 0x0 0x0
279  #define MX7D_PAD_EPDC_SDCLK__SIM2_PORT2_SVEN                      0x0074 0x02E4 0x0000 0x1 0x0
280  #define MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0                      0x0074 0x02E4 0x0000 0x2 0x0
281  #define MX7D_PAD_EPDC_SDCLK__KPP_ROW4                             0x0074 0x02E4 0x0624 0x3 0x0
282  #define MX7D_PAD_EPDC_SDCLK__EIM_AD10                             0x0074 0x02E4 0x0000 0x4 0x0
283  #define MX7D_PAD_EPDC_SDCLK__GPIO2_IO16                           0x0074 0x02E4 0x0000 0x5 0x0
284  #define MX7D_PAD_EPDC_SDCLK__LCD_CLK                              0x0074 0x02E4 0x0000 0x6 0x0
285  #define MX7D_PAD_EPDC_SDCLK__LCD_DATA20                           0x0074 0x02E4 0x0688 0x7 0x0
286  #define MX7D_PAD_EPDC_SDLE__EPDC_SDLE                             0x0078 0x02E8 0x0000 0x0 0x0
287  #define MX7D_PAD_EPDC_SDLE__SIM2_PORT2_PD                         0x0078 0x02E8 0x0000 0x1 0x0
288  #define MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1                       0x0078 0x02E8 0x0000 0x2 0x0
289  #define MX7D_PAD_EPDC_SDLE__KPP_COL4                              0x0078 0x02E8 0x0604 0x3 0x0
290  #define MX7D_PAD_EPDC_SDLE__EIM_AD11                              0x0078 0x02E8 0x0000 0x4 0x0
291  #define MX7D_PAD_EPDC_SDLE__GPIO2_IO17                            0x0078 0x02E8 0x0000 0x5 0x0
292  #define MX7D_PAD_EPDC_SDLE__LCD_DATA16                            0x0078 0x02E8 0x0678 0x6 0x0
293  #define MX7D_PAD_EPDC_SDLE__LCD_DATA8                             0x0078 0x02E8 0x0658 0x7 0x1
294  #define MX7D_PAD_EPDC_SDOE__EPDC_SDOE                             0x007C 0x02EC 0x0000 0x0 0x0
295  #define MX7D_PAD_EPDC_SDOE__FLEXTIMER1_CH0                        0x007C 0x02EC 0x0584 0x1 0x0
296  #define MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2                       0x007C 0x02EC 0x0000 0x2 0x0
297  #define MX7D_PAD_EPDC_SDOE__KPP_COL5                              0x007C 0x02EC 0x0608 0x3 0x1
298  #define MX7D_PAD_EPDC_SDOE__EIM_AD12                              0x007C 0x02EC 0x0000 0x4 0x0
299  #define MX7D_PAD_EPDC_SDOE__GPIO2_IO18                            0x007C 0x02EC 0x0000 0x5 0x0
300  #define MX7D_PAD_EPDC_SDOE__LCD_DATA17                            0x007C 0x02EC 0x067C 0x6 0x0
301  #define MX7D_PAD_EPDC_SDOE__LCD_DATA23                            0x007C 0x02EC 0x0694 0x7 0x0
302  #define MX7D_PAD_EPDC_SDSHR__EPDC_SDSHR                           0x0080 0x02F0 0x0000 0x0 0x0
303  #define MX7D_PAD_EPDC_SDSHR__FLEXTIMER1_CH1                       0x0080 0x02F0 0x0588 0x1 0x0
304  #define MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3                      0x0080 0x02F0 0x0000 0x2 0x0
305  #define MX7D_PAD_EPDC_SDSHR__KPP_ROW5                             0x0080 0x02F0 0x0628 0x3 0x1
306  #define MX7D_PAD_EPDC_SDSHR__EIM_AD13                             0x0080 0x02F0 0x0000 0x4 0x0
307  #define MX7D_PAD_EPDC_SDSHR__GPIO2_IO19                           0x0080 0x02F0 0x0000 0x5 0x0
308  #define MX7D_PAD_EPDC_SDSHR__LCD_DATA18                           0x0080 0x02F0 0x0680 0x6 0x0
309  #define MX7D_PAD_EPDC_SDSHR__LCD_DATA10                           0x0080 0x02F0 0x0660 0x7 0x1
310  #define MX7D_PAD_EPDC_SDCE0__EPDC_SDCE0                           0x0084 0x02F4 0x0000 0x0 0x0
311  #define MX7D_PAD_EPDC_SDCE0__FLEXTIMER1_CH2                       0x0084 0x02F4 0x058C 0x1 0x0
312  #define MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL                   0x0084 0x02F4 0x0000 0x2 0x0
313  #define MX7D_PAD_EPDC_SDCE0__EIM_AD14                             0x0084 0x02F4 0x0000 0x4 0x0
314  #define MX7D_PAD_EPDC_SDCE0__GPIO2_IO20                           0x0084 0x02F4 0x0000 0x5 0x0
315  #define MX7D_PAD_EPDC_SDCE0__LCD_DATA19                           0x0084 0x02F4 0x0684 0x6 0x0
316  #define MX7D_PAD_EPDC_SDCE0__LCD_DATA5                            0x0084 0x02F4 0x064C 0x7 0x1
317  #define MX7D_PAD_EPDC_SDCE1__EPDC_SDCE1                           0x0088 0x02F8 0x0000 0x0 0x0
318  #define MX7D_PAD_EPDC_SDCE1__FLEXTIMER1_CH3                       0x0088 0x02F8 0x0590 0x1 0x0
319  #define MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC                      0x0088 0x02F8 0x0578 0x2 0x0
320  #define MX7D_PAD_EPDC_SDCE1__ENET2_RX_ER                          0x0088 0x02F8 0x0000 0x3 0x0
321  #define MX7D_PAD_EPDC_SDCE1__EIM_AD15                             0x0088 0x02F8 0x0000 0x4 0x0
322  #define MX7D_PAD_EPDC_SDCE1__GPIO2_IO21                           0x0088 0x02F8 0x0000 0x5 0x0
323  #define MX7D_PAD_EPDC_SDCE1__LCD_DATA20                           0x0088 0x02F8 0x0688 0x6 0x1
324  #define MX7D_PAD_EPDC_SDCE1__LCD_DATA4                            0x0088 0x02F8 0x0648 0x7 0x1
325  #define MX7D_PAD_EPDC_SDCE2__EPDC_SDCE2                           0x008C 0x02FC 0x0000 0x0 0x0
326  #define MX7D_PAD_EPDC_SDCE2__SIM2_PORT1_SVEN                      0x008C 0x02FC 0x0000 0x1 0x0
327  #define MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0                      0x008C 0x02FC 0x0000 0x2 0x0
328  #define MX7D_PAD_EPDC_SDCE2__KPP_COL6                             0x008C 0x02FC 0x060C 0x3 0x1
329  #define MX7D_PAD_EPDC_SDCE2__EIM_ADDR16                           0x008C 0x02FC 0x0000 0x4 0x0
330  #define MX7D_PAD_EPDC_SDCE2__GPIO2_IO22                           0x008C 0x02FC 0x0000 0x5 0x0
331  #define MX7D_PAD_EPDC_SDCE2__LCD_DATA21                           0x008C 0x02FC 0x068C 0x6 0x1
332  #define MX7D_PAD_EPDC_SDCE2__LCD_DATA3                            0x008C 0x02FC 0x0644 0x7 0x1
333  #define MX7D_PAD_EPDC_SDCE3__EPDC_SDCE3                           0x0090 0x0300 0x0000 0x0 0x0
334  #define MX7D_PAD_EPDC_SDCE3__SIM2_PORT1_PD                        0x0090 0x0300 0x06E8 0x1 0x0
335  #define MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1                      0x0090 0x0300 0x0000 0x2 0x0
336  #define MX7D_PAD_EPDC_SDCE3__KPP_ROW6                             0x0090 0x0300 0x062C 0x3 0x1
337  #define MX7D_PAD_EPDC_SDCE3__EIM_ADDR17                           0x0090 0x0300 0x0000 0x4 0x0
338  #define MX7D_PAD_EPDC_SDCE3__GPIO2_IO23                           0x0090 0x0300 0x0000 0x5 0x0
339  #define MX7D_PAD_EPDC_SDCE3__LCD_DATA22                           0x0090 0x0300 0x0690 0x6 0x1
340  #define MX7D_PAD_EPDC_SDCE3__LCD_DATA2                            0x0090 0x0300 0x0640 0x7 0x1
341  #define MX7D_PAD_EPDC_GDCLK__EPDC_GDCLK                           0x0094 0x0304 0x0000 0x0 0x0
342  #define MX7D_PAD_EPDC_GDCLK__FLEXTIMER2_CH0                       0x0094 0x0304 0x05AC 0x1 0x0
343  #define MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2                      0x0094 0x0304 0x0000 0x2 0x0
344  #define MX7D_PAD_EPDC_GDCLK__KPP_COL7                             0x0094 0x0304 0x0610 0x3 0x0
345  #define MX7D_PAD_EPDC_GDCLK__EIM_ADDR18                           0x0094 0x0304 0x0000 0x4 0x0
346  #define MX7D_PAD_EPDC_GDCLK__GPIO2_IO24                           0x0094 0x0304 0x0000 0x5 0x0
347  #define MX7D_PAD_EPDC_GDCLK__LCD_DATA23                           0x0094 0x0304 0x0694 0x6 0x1
348  #define MX7D_PAD_EPDC_GDCLK__LCD_DATA16                           0x0094 0x0304 0x0678 0x7 0x1
349  #define MX7D_PAD_EPDC_GDOE__EPDC_GDOE                             0x0098 0x0308 0x0000 0x0 0x0
350  #define MX7D_PAD_EPDC_GDOE__FLEXTIMER2_CH1                        0x0098 0x0308 0x05B0 0x1 0x0
351  #define MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3                       0x0098 0x0308 0x0000 0x2 0x0
352  #define MX7D_PAD_EPDC_GDOE__KPP_ROW7                              0x0098 0x0308 0x0630 0x3 0x0
353  #define MX7D_PAD_EPDC_GDOE__EIM_ADDR19                            0x0098 0x0308 0x0000 0x4 0x0
354  #define MX7D_PAD_EPDC_GDOE__GPIO2_IO25                            0x0098 0x0308 0x0000 0x5 0x0
355  #define MX7D_PAD_EPDC_GDOE__LCD_WR_RWN                            0x0098 0x0308 0x0000 0x6 0x0
356  #define MX7D_PAD_EPDC_GDOE__LCD_DATA18                            0x0098 0x0308 0x0680 0x7 0x1
357  #define MX7D_PAD_EPDC_GDRL__EPDC_GDRL                             0x009C 0x030C 0x0000 0x0 0x0
358  #define MX7D_PAD_EPDC_GDRL__FLEXTIMER2_CH2                        0x009C 0x030C 0x05B4 0x1 0x0
359  #define MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL                    0x009C 0x030C 0x0000 0x2 0x0
360  #define MX7D_PAD_EPDC_GDRL__EIM_ADDR20                            0x009C 0x030C 0x0000 0x4 0x0
361  #define MX7D_PAD_EPDC_GDRL__GPIO2_IO26                            0x009C 0x030C 0x0000 0x5 0x0
362  #define MX7D_PAD_EPDC_GDRL__LCD_RD_E                              0x009C 0x030C 0x0000 0x6 0x0
363  #define MX7D_PAD_EPDC_GDRL__LCD_DATA19                            0x009C 0x030C 0x0684 0x7 0x1
364  #define MX7D_PAD_EPDC_GDSP__EPDC_GDSP                             0x00A0 0x0310 0x0000 0x0 0x0
365  #define MX7D_PAD_EPDC_GDSP__FLEXTIMER2_CH3                        0x00A0 0x0310 0x05B8 0x1 0x0
366  #define MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC                       0x00A0 0x0310 0x0000 0x2 0x0
367  #define MX7D_PAD_EPDC_GDSP__ENET2_TX_ER                           0x00A0 0x0310 0x0000 0x3 0x0
368  #define MX7D_PAD_EPDC_GDSP__EIM_ADDR21                            0x00A0 0x0310 0x0000 0x4 0x0
369  #define MX7D_PAD_EPDC_GDSP__GPIO2_IO27                            0x00A0 0x0310 0x0000 0x5 0x0
370  #define MX7D_PAD_EPDC_GDSP__LCD_BUSY                              0x00A0 0x0310 0x0634 0x6 0x1
371  #define MX7D_PAD_EPDC_GDSP__LCD_DATA17                            0x00A0 0x0310 0x067C 0x7 0x1
372  #define MX7D_PAD_EPDC_BDR0__EPDC_BDR0                             0x00A4 0x0314 0x0000 0x0 0x0
373  #define MX7D_PAD_EPDC_BDR0__ENET2_TX_CLK                          0x00A4 0x0314 0x0000 0x2 0x0
374  #define MX7D_PAD_EPDC_BDR0__CCM_ENET_REF_CLK2                     0x00A4 0x0314 0x0570 0x3 0x1
375  #define MX7D_PAD_EPDC_BDR0__EIM_ADDR22                            0x00A4 0x0314 0x0000 0x4 0x0
376  #define MX7D_PAD_EPDC_BDR0__GPIO2_IO28                            0x00A4 0x0314 0x0000 0x5 0x0
377  #define MX7D_PAD_EPDC_BDR0__LCD_CS                                0x00A4 0x0314 0x0000 0x6 0x0
378  #define MX7D_PAD_EPDC_BDR0__LCD_DATA7                             0x00A4 0x0314 0x0654 0x7 0x1
379  #define MX7D_PAD_EPDC_BDR1__EPDC_BDR1                             0x00A8 0x0318 0x0000 0x0 0x0
380  #define MX7D_PAD_EPDC_BDR1__EPDC_SDCLKN                           0x00A8 0x0318 0x0000 0x1 0x0
381  #define MX7D_PAD_EPDC_BDR1__ENET2_RX_CLK                          0x00A8 0x0318 0x0578 0x2 0x1
382  #define MX7D_PAD_EPDC_BDR1__EIM_AD8                               0x00A8 0x0318 0x0000 0x4 0x0
383  #define MX7D_PAD_EPDC_BDR1__GPIO2_IO29                            0x00A8 0x0318 0x0000 0x5 0x0
384  #define MX7D_PAD_EPDC_BDR1__LCD_ENABLE                            0x00A8 0x0318 0x0000 0x6 0x0
385  #define MX7D_PAD_EPDC_BDR1__LCD_DATA6                             0x00A8 0x0318 0x0650 0x7 0x1
386  #define MX7D_PAD_EPDC_PWR_COM__EPDC_PWR_COM                       0x00AC 0x031C 0x0000 0x0 0x0
387  #define MX7D_PAD_EPDC_PWR_COM__FLEXTIMER2_PHA                     0x00AC 0x031C 0x05CC 0x1 0x0
388  #define MX7D_PAD_EPDC_PWR_COM__ENET2_CRS                          0x00AC 0x031C 0x0000 0x2 0x0
389  #define MX7D_PAD_EPDC_PWR_COM__EIM_AD9                            0x00AC 0x031C 0x0000 0x4 0x0
390  #define MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30                         0x00AC 0x031C 0x0000 0x5 0x0
391  #define MX7D_PAD_EPDC_PWR_COM__LCD_HSYNC                          0x00AC 0x031C 0x0000 0x6 0x0
392  #define MX7D_PAD_EPDC_PWR_COM__LCD_DATA11                         0x00AC 0x031C 0x0664 0x7 0x1
393  #define MX7D_PAD_EPDC_PWR_STAT__EPDC_PWR_STAT                     0x00B0 0x0320 0x0580 0x0 0x0
394  #define MX7D_PAD_EPDC_PWR_STAT__FLEXTIMER2_PHB                    0x00B0 0x0320 0x05D0 0x1 0x0
395  #define MX7D_PAD_EPDC_PWR_STAT__ENET2_COL                         0x00B0 0x0320 0x0000 0x2 0x0
396  #define MX7D_PAD_EPDC_PWR_STAT__EIM_EB_B1                         0x00B0 0x0320 0x0000 0x4 0x0
397  #define MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31                        0x00B0 0x0320 0x0000 0x5 0x0
398  #define MX7D_PAD_EPDC_PWR_STAT__LCD_VSYNC                         0x00B0 0x0320 0x0698 0x6 0x1
399  #define MX7D_PAD_EPDC_PWR_STAT__LCD_DATA12                        0x00B0 0x0320 0x0668 0x7 0x1
400  #define MX7D_PAD_LCD_CLK__LCD_CLK                                 0x00B4 0x0324 0x0000 0x0 0x0
401  #define MX7D_PAD_LCD_CLK__ECSPI4_MISO                             0x00B4 0x0324 0x0558 0x1 0x0
402  #define MX7D_PAD_LCD_CLK__ENET1_1588_EVENT2_IN                    0x00B4 0x0324 0x0000 0x2 0x0
403  #define MX7D_PAD_LCD_CLK__CSI_DATA16                              0x00B4 0x0324 0x0000 0x3 0x0
404  #define MX7D_PAD_LCD_CLK__UART2_DCE_RX                            0x00B4 0x0324 0x06FC 0x4 0x0
405  #define MX7D_PAD_LCD_CLK__UART2_DTE_TX                            0x00B4 0x0324 0x0000 0x4 0x0
406  #define MX7D_PAD_LCD_CLK__GPIO3_IO0                               0x00B4 0x0324 0x0000 0x5 0x0
407  #define MX7D_PAD_LCD_ENABLE__LCD_ENABLE                           0x00B8 0x0328 0x0000 0x0 0x0
408  #define MX7D_PAD_LCD_ENABLE__ECSPI4_MOSI                          0x00B8 0x0328 0x055C 0x1 0x0
409  #define MX7D_PAD_LCD_ENABLE__ENET1_1588_EVENT3_IN                 0x00B8 0x0328 0x0000 0x2 0x0
410  #define MX7D_PAD_LCD_ENABLE__CSI_DATA17                           0x00B8 0x0328 0x0000 0x3 0x0
411  #define MX7D_PAD_LCD_ENABLE__UART2_DCE_TX                         0x00B8 0x0328 0x0000 0x4 0x0
412  #define MX7D_PAD_LCD_ENABLE__UART2_DTE_RX                         0x00B8 0x0328 0x06FC 0x4 0x1
413  #define MX7D_PAD_LCD_ENABLE__GPIO3_IO1                            0x00B8 0x0328 0x0000 0x5 0x0
414  #define MX7D_PAD_LCD_HSYNC__LCD_HSYNC                             0x00BC 0x032C 0x0000 0x0 0x0
415  #define MX7D_PAD_LCD_HSYNC__ECSPI4_SCLK                           0x00BC 0x032C 0x0554 0x1 0x0
416  #define MX7D_PAD_LCD_HSYNC__ENET2_1588_EVENT2_IN                  0x00BC 0x032C 0x0000 0x2 0x0
417  #define MX7D_PAD_LCD_HSYNC__CSI_DATA18                            0x00BC 0x032C 0x0000 0x3 0x0
418  #define MX7D_PAD_LCD_HSYNC__UART2_DCE_RTS                         0x00BC 0x032C 0x06F8 0x4 0x0
419  #define MX7D_PAD_LCD_HSYNC__UART2_DTE_CTS                         0x00BC 0x032C 0x0000 0x4 0x0
420  #define MX7D_PAD_LCD_HSYNC__GPIO3_IO2                             0x00BC 0x032C 0x0000 0x5 0x0
421  #define MX7D_PAD_LCD_VSYNC__LCD_VSYNC                             0x00C0 0x0330 0x0698 0x0 0x2
422  #define MX7D_PAD_LCD_VSYNC__ECSPI4_SS0                            0x00C0 0x0330 0x0560 0x1 0x0
423  #define MX7D_PAD_LCD_VSYNC__ENET2_1588_EVENT3_IN                  0x00C0 0x0330 0x0000 0x2 0x0
424  #define MX7D_PAD_LCD_VSYNC__CSI_DATA19                            0x00C0 0x0330 0x0000 0x3 0x0
425  #define MX7D_PAD_LCD_VSYNC__UART2_DCE_CTS                         0x00C0 0x0330 0x0000 0x4 0x0
426  #define MX7D_PAD_LCD_VSYNC__UART2_DTE_RTS                         0x00C0 0x0330 0x06F8 0x4 0x1
427  #define MX7D_PAD_LCD_VSYNC__GPIO3_IO3                             0x00C0 0x0330 0x0000 0x5 0x0
428  #define MX7D_PAD_LCD_RESET__LCD_RESET                             0x00C4 0x0334 0x0000 0x0 0x0
429  #define MX7D_PAD_LCD_RESET__GPT1_COMPARE1                         0x00C4 0x0334 0x0000 0x1 0x0
430  #define MX7D_PAD_LCD_RESET__ARM_PLATFORM_EVENTI                   0x00C4 0x0334 0x0000 0x2 0x0
431  #define MX7D_PAD_LCD_RESET__CSI_FIELD                             0x00C4 0x0334 0x0000 0x3 0x0
432  #define MX7D_PAD_LCD_RESET__EIM_DTACK_B                           0x00C4 0x0334 0x0000 0x4 0x0
433  #define MX7D_PAD_LCD_RESET__GPIO3_IO4                             0x00C4 0x0334 0x0000 0x5 0x0
434  #define MX7D_PAD_LCD_DATA00__LCD_DATA0                            0x00C8 0x0338 0x0638 0x0 0x2
435  #define MX7D_PAD_LCD_DATA00__GPT1_COMPARE2                        0x00C8 0x0338 0x0000 0x1 0x0
436  #define MX7D_PAD_LCD_DATA00__CSI_DATA20                           0x00C8 0x0338 0x0000 0x3 0x0
437  #define MX7D_PAD_LCD_DATA00__EIM_DATA0                            0x00C8 0x0338 0x0000 0x4 0x0
438  #define MX7D_PAD_LCD_DATA00__GPIO3_IO5                            0x00C8 0x0338 0x0000 0x5 0x0
439  #define MX7D_PAD_LCD_DATA00__SRC_BOOT_CFG0                        0x00C8 0x0338 0x0000 0x6 0x0
440  #define MX7D_PAD_LCD_DATA01__LCD_DATA1                            0x00CC 0x033C 0x063C 0x0 0x2
441  #define MX7D_PAD_LCD_DATA01__GPT1_COMPARE3                        0x00CC 0x033C 0x0000 0x1 0x0
442  #define MX7D_PAD_LCD_DATA01__CSI_DATA21                           0x00CC 0x033C 0x0000 0x3 0x0
443  #define MX7D_PAD_LCD_DATA01__EIM_DATA1                            0x00CC 0x033C 0x0000 0x4 0x0
444  #define MX7D_PAD_LCD_DATA01__GPIO3_IO6                            0x00CC 0x033C 0x0000 0x5 0x0
445  #define MX7D_PAD_LCD_DATA01__SRC_BOOT_CFG1                        0x00CC 0x033C 0x0000 0x6 0x0
446  #define MX7D_PAD_LCD_DATA02__LCD_DATA2                            0x00D0 0x0340 0x0640 0x0 0x2
447  #define MX7D_PAD_LCD_DATA02__GPT1_CLK                             0x00D0 0x0340 0x0000 0x1 0x0
448  #define MX7D_PAD_LCD_DATA02__CSI_DATA22                           0x00D0 0x0340 0x0000 0x3 0x0
449  #define MX7D_PAD_LCD_DATA02__EIM_DATA2                            0x00D0 0x0340 0x0000 0x4 0x0
450  #define MX7D_PAD_LCD_DATA02__GPIO3_IO7                            0x00D0 0x0340 0x0000 0x5 0x0
451  #define MX7D_PAD_LCD_DATA02__SRC_BOOT_CFG2                        0x00D0 0x0340 0x0000 0x6 0x0
452  #define MX7D_PAD_LCD_DATA03__LCD_DATA3                            0x00D4 0x0344 0x0644 0x0 0x2
453  #define MX7D_PAD_LCD_DATA03__GPT1_CAPTURE1                        0x00D4 0x0344 0x0000 0x1 0x0
454  #define MX7D_PAD_LCD_DATA03__CSI_DATA23                           0x00D4 0x0344 0x0000 0x3 0x0
455  #define MX7D_PAD_LCD_DATA03__EIM_DATA3                            0x00D4 0x0344 0x0000 0x4 0x0
456  #define MX7D_PAD_LCD_DATA03__GPIO3_IO8                            0x00D4 0x0344 0x0000 0x5 0x0
457  #define MX7D_PAD_LCD_DATA03__SRC_BOOT_CFG3                        0x00D4 0x0344 0x0000 0x6 0x0
458  #define MX7D_PAD_LCD_DATA04__LCD_DATA4                            0x00D8 0x0348 0x0648 0x0 0x2
459  #define MX7D_PAD_LCD_DATA04__GPT1_CAPTURE2                        0x00D8 0x0348 0x0000 0x1 0x0
460  #define MX7D_PAD_LCD_DATA04__CSI_VSYNC                            0x00D8 0x0348 0x0520 0x3 0x0
461  #define MX7D_PAD_LCD_DATA04__EIM_DATA4                            0x00D8 0x0348 0x0000 0x4 0x0
462  #define MX7D_PAD_LCD_DATA04__GPIO3_IO9                            0x00D8 0x0348 0x0000 0x5 0x0
463  #define MX7D_PAD_LCD_DATA04__SRC_BOOT_CFG4                        0x00D8 0x0348 0x0000 0x6 0x0
464  #define MX7D_PAD_LCD_DATA05__LCD_DATA5                            0x00DC 0x034C 0x064C 0x0 0x2
465  #define MX7D_PAD_LCD_DATA05__CSI_HSYNC                            0x00DC 0x034C 0x0518 0x3 0x0
466  #define MX7D_PAD_LCD_DATA05__EIM_DATA5                            0x00DC 0x034C 0x0000 0x4 0x0
467  #define MX7D_PAD_LCD_DATA05__GPIO3_IO10                           0x00DC 0x034C 0x0000 0x5 0x0
468  #define MX7D_PAD_LCD_DATA05__SRC_BOOT_CFG5                        0x00DC 0x034C 0x0000 0x6 0x0
469  #define MX7D_PAD_LCD_DATA06__LCD_DATA6                            0x00E0 0x0350 0x0650 0x0 0x2
470  #define MX7D_PAD_LCD_DATA06__CSI_PIXCLK                           0x00E0 0x0350 0x051C 0x3 0x0
471  #define MX7D_PAD_LCD_DATA06__EIM_DATA6                            0x00E0 0x0350 0x0000 0x4 0x0
472  #define MX7D_PAD_LCD_DATA06__GPIO3_IO11                           0x00E0 0x0350 0x0000 0x5 0x0
473  #define MX7D_PAD_LCD_DATA06__SRC_BOOT_CFG6                        0x00E0 0x0350 0x0000 0x6 0x0
474  #define MX7D_PAD_LCD_DATA07__LCD_DATA7                            0x00E4 0x0354 0x0654 0x0 0x2
475  #define MX7D_PAD_LCD_DATA07__CSI_MCLK                             0x00E4 0x0354 0x0000 0x3 0x0
476  #define MX7D_PAD_LCD_DATA07__EIM_DATA7                            0x00E4 0x0354 0x0000 0x4 0x0
477  #define MX7D_PAD_LCD_DATA07__GPIO3_IO12                           0x00E4 0x0354 0x0000 0x5 0x0
478  #define MX7D_PAD_LCD_DATA07__SRC_BOOT_CFG7                        0x00E4 0x0354 0x0000 0x6 0x0
479  #define MX7D_PAD_LCD_DATA08__LCD_DATA8                            0x00E8 0x0358 0x0658 0x0 0x2
480  #define MX7D_PAD_LCD_DATA08__CSI_DATA9                            0x00E8 0x0358 0x0514 0x3 0x0
481  #define MX7D_PAD_LCD_DATA08__EIM_DATA8                            0x00E8 0x0358 0x0000 0x4 0x0
482  #define MX7D_PAD_LCD_DATA08__GPIO3_IO13                           0x00E8 0x0358 0x0000 0x5 0x0
483  #define MX7D_PAD_LCD_DATA08__SRC_BOOT_CFG8                        0x00E8 0x0358 0x0000 0x6 0x0
484  #define MX7D_PAD_LCD_DATA09__LCD_DATA9                            0x00EC 0x035C 0x065C 0x0 0x2
485  #define MX7D_PAD_LCD_DATA09__CSI_DATA8                            0x00EC 0x035C 0x0510 0x3 0x0
486  #define MX7D_PAD_LCD_DATA09__EIM_DATA9                            0x00EC 0x035C 0x0000 0x4 0x0
487  #define MX7D_PAD_LCD_DATA09__GPIO3_IO14                           0x00EC 0x035C 0x0000 0x5 0x0
488  #define MX7D_PAD_LCD_DATA09__SRC_BOOT_CFG9                        0x00EC 0x035C 0x0000 0x6 0x0
489  #define MX7D_PAD_LCD_DATA10__LCD_DATA10                           0x00F0 0x0360 0x0660 0x0 0x2
490  #define MX7D_PAD_LCD_DATA10__CSI_DATA7                            0x00F0 0x0360 0x050C 0x3 0x0
491  #define MX7D_PAD_LCD_DATA10__EIM_DATA10                           0x00F0 0x0360 0x0000 0x4 0x0
492  #define MX7D_PAD_LCD_DATA10__GPIO3_IO15                           0x00F0 0x0360 0x0000 0x5 0x0
493  #define MX7D_PAD_LCD_DATA10__SRC_BOOT_CFG10                       0x00F0 0x0360 0x0000 0x6 0x0
494  #define MX7D_PAD_LCD_DATA11__LCD_DATA11                           0x00F4 0x0364 0x0664 0x0 0x2
495  #define MX7D_PAD_LCD_DATA11__CSI_DATA6                            0x00F4 0x0364 0x0508 0x3 0x0
496  #define MX7D_PAD_LCD_DATA11__EIM_DATA11                           0x00F4 0x0364 0x0000 0x4 0x0
497  #define MX7D_PAD_LCD_DATA11__GPIO3_IO16                           0x00F4 0x0364 0x0000 0x5 0x0
498  #define MX7D_PAD_LCD_DATA11__SRC_BOOT_CFG11                       0x00F4 0x0364 0x0000 0x6 0x0
499  #define MX7D_PAD_LCD_DATA12__LCD_DATA12                           0x00F8 0x0368 0x0668 0x0 0x2
500  #define MX7D_PAD_LCD_DATA12__CSI_DATA5                            0x00F8 0x0368 0x0504 0x3 0x0
501  #define MX7D_PAD_LCD_DATA12__EIM_DATA12                           0x00F8 0x0368 0x0000 0x4 0x0
502  #define MX7D_PAD_LCD_DATA12__GPIO3_IO17                           0x00F8 0x0368 0x0000 0x5 0x0
503  #define MX7D_PAD_LCD_DATA12__SRC_BOOT_CFG12                       0x00F8 0x0368 0x0000 0x6 0x0
504  #define MX7D_PAD_LCD_DATA13__LCD_DATA13                           0x00FC 0x036C 0x066C 0x0 0x1
505  #define MX7D_PAD_LCD_DATA13__CSI_DATA4                            0x00FC 0x036C 0x0500 0x3 0x0
506  #define MX7D_PAD_LCD_DATA13__EIM_DATA13                           0x00FC 0x036C 0x0000 0x4 0x0
507  #define MX7D_PAD_LCD_DATA13__GPIO3_IO18                           0x00FC 0x036C 0x0000 0x5 0x0
508  #define MX7D_PAD_LCD_DATA13__SRC_BOOT_CFG13                       0x00FC 0x036C 0x0000 0x6 0x0
509  #define MX7D_PAD_LCD_DATA14__LCD_DATA14                           0x0100 0x0370 0x0670 0x0 0x1
510  #define MX7D_PAD_LCD_DATA14__CSI_DATA3                            0x0100 0x0370 0x04FC 0x3 0x0
511  #define MX7D_PAD_LCD_DATA14__EIM_DATA14                           0x0100 0x0370 0x0000 0x4 0x0
512  #define MX7D_PAD_LCD_DATA14__GPIO3_IO19                           0x0100 0x0370 0x0000 0x5 0x0
513  #define MX7D_PAD_LCD_DATA14__SRC_BOOT_CFG14                       0x0100 0x0370 0x0000 0x6 0x0
514  #define MX7D_PAD_LCD_DATA15__LCD_DATA15                           0x0104 0x0374 0x0674 0x0 0x1
515  #define MX7D_PAD_LCD_DATA15__CSI_DATA2                            0x0104 0x0374 0x04F8 0x3 0x0
516  #define MX7D_PAD_LCD_DATA15__EIM_DATA15                           0x0104 0x0374 0x0000 0x4 0x0
517  #define MX7D_PAD_LCD_DATA15__GPIO3_IO20                           0x0104 0x0374 0x0000 0x5 0x0
518  #define MX7D_PAD_LCD_DATA15__SRC_BOOT_CFG15                       0x0104 0x0374 0x0000 0x6 0x0
519  #define MX7D_PAD_LCD_DATA16__LCD_DATA16                           0x0108 0x0378 0x0678 0x0 0x2
520  #define MX7D_PAD_LCD_DATA16__FLEXTIMER1_CH4                       0x0108 0x0378 0x0594 0x1 0x0
521  #define MX7D_PAD_LCD_DATA16__CSI_DATA1                            0x0108 0x0378 0x0000 0x3 0x0
522  #define MX7D_PAD_LCD_DATA16__EIM_CRE                              0x0108 0x0378 0x0000 0x4 0x0
523  #define MX7D_PAD_LCD_DATA16__GPIO3_IO21                           0x0108 0x0378 0x0000 0x5 0x0
524  #define MX7D_PAD_LCD_DATA16__SRC_BOOT_CFG16                       0x0108 0x0378 0x0000 0x6 0x0
525  #define MX7D_PAD_LCD_DATA17__LCD_DATA17                           0x010C 0x037C 0x067C 0x0 0x2
526  #define MX7D_PAD_LCD_DATA17__FLEXTIMER1_CH5                       0x010C 0x037C 0x0598 0x1 0x0
527  #define MX7D_PAD_LCD_DATA17__CSI_DATA0                            0x010C 0x037C 0x0000 0x3 0x0
528  #define MX7D_PAD_LCD_DATA17__EIM_ACLK_FREERUN                     0x010C 0x037C 0x0000 0x4 0x0
529  #define MX7D_PAD_LCD_DATA17__GPIO3_IO22                           0x010C 0x037C 0x0000 0x5 0x0
530  #define MX7D_PAD_LCD_DATA17__SRC_BOOT_CFG17                       0x010C 0x037C 0x0000 0x6 0x0
531  #define MX7D_PAD_LCD_DATA18__LCD_DATA18                           0x0110 0x0380 0x0680 0x0 0x2
532  #define MX7D_PAD_LCD_DATA18__FLEXTIMER1_CH6                       0x0110 0x0380 0x059C 0x1 0x0
533  #define MX7D_PAD_LCD_DATA18__ARM_PLATFORM_EVENTO                  0x0110 0x0380 0x0000 0x2 0x0
534  #define MX7D_PAD_LCD_DATA18__CSI_DATA15                           0x0110 0x0380 0x0000 0x3 0x0
535  #define MX7D_PAD_LCD_DATA18__EIM_CS2_B                            0x0110 0x0380 0x0000 0x4 0x0
536  #define MX7D_PAD_LCD_DATA18__GPIO3_IO23                           0x0110 0x0380 0x0000 0x5 0x0
537  #define MX7D_PAD_LCD_DATA18__SRC_BOOT_CFG18                       0x0110 0x0380 0x0000 0x6 0x0
538  #define MX7D_PAD_LCD_DATA19__EIM_CS3_B                            0x0114 0x0384 0x0000 0x4 0x0
539  #define MX7D_PAD_LCD_DATA19__GPIO3_IO24                           0x0114 0x0384 0x0000 0x5 0x0
540  #define MX7D_PAD_LCD_DATA19__SRC_BOOT_CFG19                       0x0114 0x0384 0x0000 0x6 0x0
541  #define MX7D_PAD_LCD_DATA19__LCD_DATA19                           0x0114 0x0384 0x0684 0x0 0x2
542  #define MX7D_PAD_LCD_DATA19__FLEXTIMER1_CH7                       0x0114 0x0384 0x05A0 0x1 0x0
543  #define MX7D_PAD_LCD_DATA19__CSI_DATA14                           0x0114 0x0384 0x0000 0x3 0x0
544  #define MX7D_PAD_LCD_DATA20__EIM_ADDR23                           0x0118 0x0388 0x0000 0x4 0x0
545  #define MX7D_PAD_LCD_DATA20__GPIO3_IO25                           0x0118 0x0388 0x0000 0x5 0x0
546  #define MX7D_PAD_LCD_DATA20__I2C3_SCL                             0x0118 0x0388 0x05E4 0x6 0x1
547  #define MX7D_PAD_LCD_DATA20__LCD_DATA20                           0x0118 0x0388 0x0688 0x0 0x2
548  #define MX7D_PAD_LCD_DATA20__FLEXTIMER2_CH4                       0x0118 0x0388 0x05BC 0x1 0x0
549  #define MX7D_PAD_LCD_DATA20__ENET1_1588_EVENT2_OUT                0x0118 0x0388 0x0000 0x2 0x0
550  #define MX7D_PAD_LCD_DATA20__CSI_DATA13                           0x0118 0x0388 0x0000 0x3 0x0
551  #define MX7D_PAD_LCD_DATA21__LCD_DATA21                           0x011C 0x038C 0x068C 0x0 0x2
552  #define MX7D_PAD_LCD_DATA21__FLEXTIMER2_CH5                       0x011C 0x038C 0x05C0 0x1 0x0
553  #define MX7D_PAD_LCD_DATA21__ENET1_1588_EVENT3_OUT                0x011C 0x038C 0x0000 0x2 0x0
554  #define MX7D_PAD_LCD_DATA21__CSI_DATA12                           0x011C 0x038C 0x0000 0x3 0x0
555  #define MX7D_PAD_LCD_DATA21__EIM_ADDR24                           0x011C 0x038C 0x0000 0x4 0x0
556  #define MX7D_PAD_LCD_DATA21__GPIO3_IO26                           0x011C 0x038C 0x0000 0x5 0x0
557  #define MX7D_PAD_LCD_DATA21__I2C3_SDA                             0x011C 0x038C 0x05E8 0x6 0x1
558  #define MX7D_PAD_LCD_DATA22__LCD_DATA22                           0x0120 0x0390 0x0690 0x0 0x2
559  #define MX7D_PAD_LCD_DATA22__FLEXTIMER2_CH6                       0x0120 0x0390 0x05C4 0x1 0x0
560  #define MX7D_PAD_LCD_DATA22__ENET2_1588_EVENT2_OUT                0x0120 0x0390 0x0000 0x2 0x0
561  #define MX7D_PAD_LCD_DATA22__CSI_DATA11                           0x0120 0x0390 0x0000 0x3 0x0
562  #define MX7D_PAD_LCD_DATA22__EIM_ADDR25                           0x0120 0x0390 0x0000 0x4 0x0
563  #define MX7D_PAD_LCD_DATA22__GPIO3_IO27                           0x0120 0x0390 0x0000 0x5 0x0
564  #define MX7D_PAD_LCD_DATA22__I2C4_SCL                             0x0120 0x0390 0x05EC 0x6 0x1
565  #define MX7D_PAD_LCD_DATA23__LCD_DATA23                           0x0124 0x0394 0x0694 0x0 0x2
566  #define MX7D_PAD_LCD_DATA23__FLEXTIMER2_CH7                       0x0124 0x0394 0x05C8 0x1 0x0
567  #define MX7D_PAD_LCD_DATA23__ENET2_1588_EVENT3_OUT                0x0124 0x0394 0x0000 0x2 0x0
568  #define MX7D_PAD_LCD_DATA23__CSI_DATA10                           0x0124 0x0394 0x0000 0x3 0x0
569  #define MX7D_PAD_LCD_DATA23__EIM_ADDR26                           0x0124 0x0394 0x0000 0x4 0x0
570  #define MX7D_PAD_LCD_DATA23__GPIO3_IO28                           0x0124 0x0394 0x0000 0x5 0x0
571  #define MX7D_PAD_LCD_DATA23__I2C4_SDA                             0x0124 0x0394 0x05F0 0x6 0x1
572  #define MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX                      0x0128 0x0398 0x06F4 0x0 0x0
573  #define MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX                      0x0128 0x0398 0x0000 0x0 0x0
574  #define MX7D_PAD_UART1_RX_DATA__I2C1_SCL                          0x0128 0x0398 0x05D4 0x1 0x0
575  #define MX7D_PAD_UART1_RX_DATA__CCM_PMIC_READY                    0x0128 0x0398 0x0000 0x2 0x0
576  #define MX7D_PAD_UART1_RX_DATA__ECSPI1_SS1                        0x0128 0x0398 0x0000 0x3 0x0
577  #define MX7D_PAD_UART1_RX_DATA__ENET2_1588_EVENT0_IN              0x0128 0x0398 0x0000 0x4 0x0
578  #define MX7D_PAD_UART1_RX_DATA__GPIO4_IO0                         0x0128 0x0398 0x0000 0x5 0x0
579  #define MX7D_PAD_UART1_RX_DATA__ENET1_MDIO                        0x0128 0x0398 0x0000 0x6 0x0
580  #define MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX                      0x012C 0x039C 0x0000 0x0 0x0
581  #define MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX                      0x012C 0x039C 0x06F4 0x0 0x1
582  #define MX7D_PAD_UART1_TX_DATA__I2C1_SDA                          0x012C 0x039C 0x05D8 0x1 0x0
583  #define MX7D_PAD_UART1_TX_DATA__SAI3_MCLK                         0x012C 0x039C 0x0000 0x2 0x0
584  #define MX7D_PAD_UART1_TX_DATA__ECSPI1_SS2                        0x012C 0x039C 0x0000 0x3 0x0
585  #define MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT             0x012C 0x039C 0x0000 0x4 0x0
586  #define MX7D_PAD_UART1_TX_DATA__GPIO4_IO1                         0x012C 0x039C 0x0000 0x5 0x0
587  #define MX7D_PAD_UART1_TX_DATA__ENET1_MDC                         0x012C 0x039C 0x0000 0x6 0x0
588  #define MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX                      0x0130 0x03A0 0x06FC 0x0 0x2
589  #define MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX                      0x0130 0x03A0 0x0000 0x0 0x0
590  #define MX7D_PAD_UART2_RX_DATA__I2C2_SCL                          0x0130 0x03A0 0x05DC 0x1 0x0
591  #define MX7D_PAD_UART2_RX_DATA__SAI3_RX_BCLK                      0x0130 0x03A0 0x06C4 0x2 0x0
592  #define MX7D_PAD_UART2_RX_DATA__ECSPI1_SS3                        0x0130 0x03A0 0x0000 0x3 0x0
593  #define MX7D_PAD_UART2_RX_DATA__ENET2_1588_EVENT1_IN              0x0130 0x03A0 0x0000 0x4 0x0
594  #define MX7D_PAD_UART2_RX_DATA__GPIO4_IO2                         0x0130 0x03A0 0x0000 0x5 0x0
595  #define MX7D_PAD_UART2_RX_DATA__ENET2_MDIO                        0x0130 0x03A0 0x0574 0x6 0x1
596  #define MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX                      0x0134 0x03A4 0x0000 0x0 0x0
597  #define MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX                      0x0134 0x03A4 0x06FC 0x0 0x3
598  #define MX7D_PAD_UART2_TX_DATA__I2C2_SDA                          0x0134 0x03A4 0x05E0 0x1 0x0
599  #define MX7D_PAD_UART2_TX_DATA__SAI3_RX_DATA0                     0x0134 0x03A4 0x06C8 0x2 0x0
600  #define MX7D_PAD_UART2_TX_DATA__ECSPI1_RDY                        0x0134 0x03A4 0x0000 0x3 0x0
601  #define MX7D_PAD_UART2_TX_DATA__ENET2_1588_EVENT1_OUT             0x0134 0x03A4 0x0000 0x4 0x0
602  #define MX7D_PAD_UART2_TX_DATA__GPIO4_IO3                         0x0134 0x03A4 0x0000 0x5 0x0
603  #define MX7D_PAD_UART2_TX_DATA__ENET2_MDC                         0x0134 0x03A4 0x0000 0x6 0x0
604  #define MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX                      0x0138 0x03A8 0x0704 0x0 0x2
605  #define MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX                      0x0138 0x03A8 0x0000 0x0 0x0
606  #define MX7D_PAD_UART3_RX_DATA__USB_OTG1_OC                       0x0138 0x03A8 0x072C 0x1 0x0
607  #define MX7D_PAD_UART3_RX_DATA__SAI3_RX_SYNC                      0x0138 0x03A8 0x06CC 0x2 0x0
608  #define MX7D_PAD_UART3_RX_DATA__ECSPI1_MISO                       0x0138 0x03A8 0x0528 0x3 0x0
609  #define MX7D_PAD_UART3_RX_DATA__ENET1_1588_EVENT0_IN              0x0138 0x03A8 0x0000 0x4 0x0
610  #define MX7D_PAD_UART3_RX_DATA__GPIO4_IO4                         0x0138 0x03A8 0x0000 0x5 0x0
611  #define MX7D_PAD_UART3_RX_DATA__SD1_LCTL                          0x0138 0x03A8 0x0000 0x6 0x0
612  #define MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX                      0x013C 0x03AC 0x0000 0x0 0x0
613  #define MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX                      0x013C 0x03AC 0x0704 0x0 0x3
614  #define MX7D_PAD_UART3_TX_DATA__USB_OTG1_PWR                      0x013C 0x03AC 0x0000 0x1 0x0
615  #define MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK                      0x013C 0x03AC 0x06D0 0x2 0x0
616  #define MX7D_PAD_UART3_TX_DATA__ECSPI1_MOSI                       0x013C 0x03AC 0x052C 0x3 0x0
617  #define MX7D_PAD_UART3_TX_DATA__ENET1_1588_EVENT0_OUT             0x013C 0x03AC 0x0000 0x4 0x0
618  #define MX7D_PAD_UART3_TX_DATA__GPIO4_IO5                         0x013C 0x03AC 0x0000 0x5 0x0
619  #define MX7D_PAD_UART3_TX_DATA__SD2_LCTL                          0x013C 0x03AC 0x0000 0x6 0x0
620  #define MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS                       0x0140 0x03B0 0x0700 0x0 0x2
621  #define MX7D_PAD_UART3_RTS_B__UART3_DTE_CTS                       0x0140 0x03B0 0x0000 0x0 0x0
622  #define MX7D_PAD_UART3_RTS_B__USB_OTG2_OC                         0x0140 0x03B0 0x0728 0x1 0x0
623  #define MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0                       0x0140 0x03B0 0x0000 0x2 0x0
624  #define MX7D_PAD_UART3_RTS_B__ECSPI1_SCLK                         0x0140 0x03B0 0x0000 0x3 0x0
625  #define MX7D_PAD_UART3_RTS_B__ENET1_1588_EVENT1_IN                0x0140 0x03B0 0x0000 0x4 0x0
626  #define MX7D_PAD_UART3_RTS_B__GPIO4_IO6                           0x0140 0x03B0 0x0000 0x5 0x0
627  #define MX7D_PAD_UART3_RTS_B__SD3_LCTL                            0x0140 0x03B0 0x0000 0x6 0x0
628  #define MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS                       0x0144 0x03B4 0x0000 0x0 0x0
629  #define MX7D_PAD_UART3_CTS_B__UART3_DTE_RTS                       0x0144 0x03B4 0x0700 0x0 0x3
630  #define MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR                        0x0144 0x03B4 0x0000 0x1 0x0
631  #define MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC                        0x0144 0x03B4 0x06D4 0x2 0x0
632  #define MX7D_PAD_UART3_CTS_B__ECSPI1_SS0                          0x0144 0x03B4 0x0530 0x3 0x0
633  #define MX7D_PAD_UART3_CTS_B__ENET1_1588_EVENT1_OUT               0x0144 0x03B4 0x0000 0x4 0x0
634  #define MX7D_PAD_UART3_CTS_B__GPIO4_IO7                           0x0144 0x03B4 0x0000 0x5 0x0
635  #define MX7D_PAD_UART3_CTS_B__SD1_VSELECT                         0x0144 0x03B4 0x0000 0x6 0x0
636  #define MX7D_PAD_I2C1_SCL__I2C1_SCL                               0x0148 0x03B8 0x05D4 0x0 0x1
637  #define MX7D_PAD_I2C1_SCL__UART4_DCE_CTS                          0x0148 0x03B8 0x0000 0x1 0x0
638  #define MX7D_PAD_I2C1_SCL__UART4_DTE_RTS                          0x0148 0x03B8 0x0708 0x1 0x0
639  #define MX7D_PAD_I2C1_SCL__FLEXCAN1_RX                            0x0148 0x03B8 0x04DC 0x2 0x1
640  #define MX7D_PAD_I2C1_SCL__ECSPI3_MISO                            0x0148 0x03B8 0x0548 0x3 0x0
641  #define MX7D_PAD_I2C1_SCL__GPIO4_IO8                              0x0148 0x03B8 0x0000 0x5 0x0
642  #define MX7D_PAD_I2C1_SCL__SD2_VSELECT                            0x0148 0x03B8 0x0000 0x6 0x0
643  #define MX7D_PAD_I2C1_SDA__I2C1_SDA                               0x014C 0x03BC 0x05D8 0x0 0x1
644  #define MX7D_PAD_I2C1_SDA__UART4_DCE_RTS                          0x014C 0x03BC 0x0708 0x1 0x1
645  #define MX7D_PAD_I2C1_SDA__UART4_DTE_CTS                          0x014C 0x03BC 0x0000 0x1 0x0
646  #define MX7D_PAD_I2C1_SDA__FLEXCAN1_TX                            0x014C 0x03BC 0x0000 0x2 0x0
647  #define MX7D_PAD_I2C1_SDA__ECSPI3_MOSI                            0x014C 0x03BC 0x054C 0x3 0x0
648  #define MX7D_PAD_I2C1_SDA__CCM_ENET_REF_CLK1                      0x014C 0x03BC 0x0564 0x4 0x1
649  #define MX7D_PAD_I2C1_SDA__GPIO4_IO9                              0x014C 0x03BC 0x0000 0x5 0x0
650  #define MX7D_PAD_I2C1_SDA__SD3_VSELECT                            0x014C 0x03BC 0x0000 0x6 0x0
651  #define MX7D_PAD_I2C2_SCL__I2C2_SCL                               0x0150 0x03C0 0x05DC 0x0 0x1
652  #define MX7D_PAD_I2C2_SCL__UART4_DCE_RX                           0x0150 0x03C0 0x070C 0x1 0x0
653  #define MX7D_PAD_I2C2_SCL__UART4_DTE_TX                           0x0150 0x03C0 0x0000 0x1 0x0
654  #define MX7D_PAD_I2C2_SCL__WDOG3_WDOG_B                           0x0150 0x03C0 0x0000 0x2 0x0
655  #define MX7D_PAD_I2C2_SCL__ECSPI3_SCLK                            0x0150 0x03C0 0x0544 0x3 0x0
656  #define MX7D_PAD_I2C2_SCL__CCM_ENET_REF_CLK2                      0x0150 0x03C0 0x0570 0x4 0x2
657  #define MX7D_PAD_I2C2_SCL__GPIO4_IO10                             0x0150 0x03C0 0x0000 0x5 0x0
658  #define MX7D_PAD_I2C2_SCL__SD3_CD_B                               0x0150 0x03C0 0x0738 0x6 0x1
659  #define MX7D_PAD_I2C2_SDA__I2C2_SDA                               0x0154 0x03C4 0x05E0 0x0 0x1
660  #define MX7D_PAD_I2C2_SDA__UART4_DCE_TX                           0x0154 0x03C4 0x0000 0x1 0x0
661  #define MX7D_PAD_I2C2_SDA__UART4_DTE_RX                           0x0154 0x03C4 0x070C 0x1 0x1
662  #define MX7D_PAD_I2C2_SDA__WDOG3_WDOG_RST_B_DEB                   0x0154 0x03C4 0x0000 0x2 0x0
663  #define MX7D_PAD_I2C2_SDA__ECSPI3_SS0                             0x0154 0x03C4 0x0550 0x3 0x0
664  #define MX7D_PAD_I2C2_SDA__CCM_ENET_REF_CLK3                      0x0154 0x03C4 0x0000 0x4 0x0
665  #define MX7D_PAD_I2C2_SDA__GPIO4_IO11                             0x0154 0x03C4 0x0000 0x5 0x0
666  #define MX7D_PAD_I2C2_SDA__SD3_WP                                 0x0154 0x03C4 0x073C 0x6 0x1
667  #define MX7D_PAD_I2C3_SCL__I2C3_SCL                               0x0158 0x03C8 0x05E4 0x0 0x2
668  #define MX7D_PAD_I2C3_SCL__UART5_DCE_CTS                          0x0158 0x03C8 0x0000 0x1 0x0
669  #define MX7D_PAD_I2C3_SCL__UART5_DTE_RTS                          0x0158 0x03C8 0x0710 0x1 0x0
670  #define MX7D_PAD_I2C3_SCL__FLEXCAN2_RX                            0x0158 0x03C8 0x04E0 0x2 0x1
671  #define MX7D_PAD_I2C3_SCL__CSI_VSYNC                              0x0158 0x03C8 0x0520 0x3 0x1
672  #define MX7D_PAD_I2C3_SCL__SDMA_EXT_EVENT0                        0x0158 0x03C8 0x06D8 0x4 0x1
673  #define MX7D_PAD_I2C3_SCL__GPIO4_IO12                             0x0158 0x03C8 0x0000 0x5 0x0
674  #define MX7D_PAD_I2C3_SCL__EPDC_BDR0                              0x0158 0x03C8 0x0000 0x6 0x0
675  #define MX7D_PAD_I2C3_SDA__I2C3_SDA                               0x015C 0x03CC 0x05E8 0x0 0x2
676  #define MX7D_PAD_I2C3_SDA__UART5_DCE_RTS                          0x015C 0x03CC 0x0710 0x1 0x1
677  #define MX7D_PAD_I2C3_SDA__UART5_DTE_CTS                          0x015C 0x03CC 0x0000 0x1 0x0
678  #define MX7D_PAD_I2C3_SDA__FLEXCAN2_TX                            0x015C 0x03CC 0x0000 0x2 0x0
679  #define MX7D_PAD_I2C3_SDA__CSI_HSYNC                              0x015C 0x03CC 0x0518 0x3 0x1
680  #define MX7D_PAD_I2C3_SDA__SDMA_EXT_EVENT1                        0x015C 0x03CC 0x06DC 0x4 0x1
681  #define MX7D_PAD_I2C3_SDA__GPIO4_IO13                             0x015C 0x03CC 0x0000 0x5 0x0
682  #define MX7D_PAD_I2C3_SDA__EPDC_BDR1                              0x015C 0x03CC 0x0000 0x6 0x0
683  #define MX7D_PAD_I2C4_SCL__I2C4_SCL                               0x0160 0x03D0 0x05EC 0x0 0x2
684  #define MX7D_PAD_I2C4_SCL__UART5_DCE_RX                           0x0160 0x03D0 0x0714 0x1 0x0
685  #define MX7D_PAD_I2C4_SCL__UART5_DTE_TX                           0x0160 0x03D0 0x0000 0x1 0x0
686  #define MX7D_PAD_I2C4_SCL__WDOG4_WDOG_B                           0x0160 0x03D0 0x0000 0x2 0x0
687  #define MX7D_PAD_I2C4_SCL__CSI_PIXCLK                             0x0160 0x03D0 0x051C 0x3 0x1
688  #define MX7D_PAD_I2C4_SCL__USB_OTG1_ID                            0x0160 0x03D0 0x0734 0x4 0x1
689  #define MX7D_PAD_I2C4_SCL__GPIO4_IO14                             0x0160 0x03D0 0x0000 0x5 0x0
690  #define MX7D_PAD_I2C4_SCL__EPDC_VCOM0                             0x0160 0x03D0 0x0000 0x6 0x0
691  #define MX7D_PAD_I2C4_SDA__I2C4_SDA                               0x0164 0x03D4 0x05F0 0x0 0x2
692  #define MX7D_PAD_I2C4_SDA__UART5_DCE_TX                           0x0164 0x03D4 0x0000 0x1 0x0
693  #define MX7D_PAD_I2C4_SDA__UART5_DTE_RX                           0x0164 0x03D4 0x0714 0x1 0x1
694  #define MX7D_PAD_I2C4_SDA__WDOG4_WDOG_RST_B_DEB                   0x0164 0x03D4 0x0000 0x2 0x0
695  #define MX7D_PAD_I2C4_SDA__CSI_MCLK                               0x0164 0x03D4 0x0000 0x3 0x0
696  #define MX7D_PAD_I2C4_SDA__USB_OTG2_ID                            0x0164 0x03D4 0x0730 0x4 0x1
697  #define MX7D_PAD_I2C4_SDA__GPIO4_IO15                             0x0164 0x03D4 0x0000 0x5 0x0
698  #define MX7D_PAD_I2C4_SDA__EPDC_VCOM1                             0x0164 0x03D4 0x0000 0x6 0x0
699  #define MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK                         0x0168 0x03D8 0x0524 0x0 0x1
700  #define MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX                        0x0168 0x03D8 0x071C 0x1 0x2
701  #define MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX                        0x0168 0x03D8 0x0000 0x1 0x0
702  #define MX7D_PAD_ECSPI1_SCLK__SD2_DATA4                           0x0168 0x03D8 0x0000 0x2 0x0
703  #define MX7D_PAD_ECSPI1_SCLK__CSI_DATA2                           0x0168 0x03D8 0x04F8 0x3 0x1
704  #define MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16                          0x0168 0x03D8 0x0000 0x5 0x0
705  #define MX7D_PAD_ECSPI1_SCLK__EPDC_PWR_COM                        0x0168 0x03D8 0x0000 0x6 0x0
706  #define MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI                         0x016C 0x03DC 0x052C 0x0 0x1
707  #define MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX                        0x016C 0x03DC 0x0000 0x1 0x0
708  #define MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX                        0x016C 0x03DC 0x071C 0x1 0x3
709  #define MX7D_PAD_ECSPI1_MOSI__SD2_DATA5                           0x016C 0x03DC 0x0000 0x2 0x0
710  #define MX7D_PAD_ECSPI1_MOSI__CSI_DATA3                           0x016C 0x03DC 0x04FC 0x3 0x1
711  #define MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17                          0x016C 0x03DC 0x0000 0x5 0x0
712  #define MX7D_PAD_ECSPI1_MOSI__EPDC_PWR_STAT                       0x016C 0x03DC 0x0580 0x6 0x1
713  #define MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO                         0x0170 0x03E0 0x0528 0x0 0x1
714  #define MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS                       0x0170 0x03E0 0x0718 0x1 0x2
715  #define MX7D_PAD_ECSPI1_MISO__UART6_DTE_CTS                       0x0170 0x03E0 0x0000 0x1 0x0
716  #define MX7D_PAD_ECSPI1_MISO__SD2_DATA6                           0x0170 0x03E0 0x0000 0x2 0x0
717  #define MX7D_PAD_ECSPI1_MISO__CSI_DATA4                           0x0170 0x03E0 0x0500 0x3 0x1
718  #define MX7D_PAD_ECSPI1_MISO__GPIO4_IO18                          0x0170 0x03E0 0x0000 0x5 0x0
719  #define MX7D_PAD_ECSPI1_MISO__EPDC_PWR_IRQ                        0x0170 0x03E0 0x057C 0x6 0x0
720  #define MX7D_PAD_ECSPI1_SS0__ECSPI1_SS0                           0x0174 0x03E4 0x0530 0x0 0x1
721  #define MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS                        0x0174 0x03E4 0x0000 0x1 0x0
722  #define MX7D_PAD_ECSPI1_SS0__UART6_DTE_RTS                        0x0174 0x03E4 0x0718 0x1 0x3
723  #define MX7D_PAD_ECSPI1_SS0__SD2_DATA7                            0x0174 0x03E4 0x0000 0x2 0x0
724  #define MX7D_PAD_ECSPI1_SS0__CSI_DATA5                            0x0174 0x03E4 0x0504 0x3 0x1
725  #define MX7D_PAD_ECSPI1_SS0__GPIO4_IO19                           0x0174 0x03E4 0x0000 0x5 0x0
726  #define MX7D_PAD_ECSPI1_SS0__EPDC_PWR_CTRL3                       0x0174 0x03E4 0x0000 0x6 0x0
727  #define MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK                         0x0178 0x03E8 0x0534 0x0 0x0
728  #define MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX                        0x0178 0x03E8 0x0724 0x1 0x2
729  #define MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX                        0x0178 0x03E8 0x0000 0x1 0x0
730  #define MX7D_PAD_ECSPI2_SCLK__SD1_DATA4                           0x0178 0x03E8 0x0000 0x2 0x0
731  #define MX7D_PAD_ECSPI2_SCLK__CSI_DATA6                           0x0178 0x03E8 0x0508 0x3 0x1
732  #define MX7D_PAD_ECSPI2_SCLK__LCD_DATA13                          0x0178 0x03E8 0x066C 0x4 0x2
733  #define MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20                          0x0178 0x03E8 0x0000 0x5 0x0
734  #define MX7D_PAD_ECSPI2_SCLK__EPDC_PWR_CTRL0                      0x0178 0x03E8 0x0000 0x6 0x0
735  #define MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI                         0x017C 0x03EC 0x053C 0x0 0x0
736  #define MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX                        0x017C 0x03EC 0x0000 0x1 0x0
737  #define MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX                        0x017C 0x03EC 0x0724 0x1 0x3
738  #define MX7D_PAD_ECSPI2_MOSI__SD1_DATA5                           0x017C 0x03EC 0x0000 0x2 0x0
739  #define MX7D_PAD_ECSPI2_MOSI__CSI_DATA7                           0x017C 0x03EC 0x050C 0x3 0x1
740  #define MX7D_PAD_ECSPI2_MOSI__LCD_DATA14                          0x017C 0x03EC 0x0670 0x4 0x2
741  #define MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21                          0x017C 0x03EC 0x0000 0x5 0x0
742  #define MX7D_PAD_ECSPI2_MOSI__EPDC_PWR_CTRL1                      0x017C 0x03EC 0x0000 0x6 0x0
743  #define MX7D_PAD_ECSPI2_MISO__GPIO4_IO22                          0x0180 0x03F0 0x0000 0x5 0x0
744  #define MX7D_PAD_ECSPI2_MISO__EPDC_PWR_CTRL2                      0x0180 0x03F0 0x0000 0x6 0x0
745  #define MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO                         0x0180 0x03F0 0x0538 0x0 0x0
746  #define MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS                       0x0180 0x03F0 0x0720 0x1 0x2
747  #define MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS                       0x0180 0x03F0 0x0000 0x1 0x0
748  #define MX7D_PAD_ECSPI2_MISO__SD1_DATA6                           0x0180 0x03F0 0x0000 0x2 0x0
749  #define MX7D_PAD_ECSPI2_MISO__CSI_DATA8                           0x0180 0x03F0 0x0510 0x3 0x1
750  #define MX7D_PAD_ECSPI2_MISO__LCD_DATA15                          0x0180 0x03F0 0x0674 0x4 0x2
751  #define MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0                           0x0184 0x03F4 0x0540 0x0 0x0
752  #define MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS                        0x0184 0x03F4 0x0000 0x1 0x0
753  #define MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS                        0x0184 0x03F4 0x0720 0x1 0x3
754  #define MX7D_PAD_ECSPI2_SS0__SD1_DATA7                            0x0184 0x03F4 0x0000 0x2 0x0
755  #define MX7D_PAD_ECSPI2_SS0__CSI_DATA9                            0x0184 0x03F4 0x0514 0x3 0x1
756  #define MX7D_PAD_ECSPI2_SS0__LCD_RESET                            0x0184 0x03F4 0x0000 0x4 0x0
757  #define MX7D_PAD_ECSPI2_SS0__GPIO4_IO23                           0x0184 0x03F4 0x0000 0x5 0x0
758  #define MX7D_PAD_ECSPI2_SS0__EPDC_PWR_WAKE                        0x0184 0x03F4 0x0000 0x6 0x0
759  #define MX7D_PAD_SD1_CD_B__SD1_CD_B                               0x0188 0x03F8 0x0000 0x0 0x0
760  #define MX7D_PAD_SD1_CD_B__UART6_DCE_RX                           0x0188 0x03F8 0x071C 0x2 0x4
761  #define MX7D_PAD_SD1_CD_B__UART6_DTE_TX                           0x0188 0x03F8 0x0000 0x2 0x0
762  #define MX7D_PAD_SD1_CD_B__ECSPI4_MISO                            0x0188 0x03F8 0x0558 0x3 0x1
763  #define MX7D_PAD_SD1_CD_B__FLEXTIMER1_CH0                         0x0188 0x03F8 0x0584 0x4 0x1
764  #define MX7D_PAD_SD1_CD_B__GPIO5_IO0                              0x0188 0x03F8 0x0000 0x5 0x0
765  #define MX7D_PAD_SD1_CD_B__CCM_CLKO1                              0x0188 0x03F8 0x0000 0x6 0x0
766  #define MX7D_PAD_SD1_WP__SD1_WP                                   0x018C 0x03FC 0x0000 0x0 0x0
767  #define MX7D_PAD_SD1_WP__UART6_DCE_TX                             0x018C 0x03FC 0x0000 0x2 0x0
768  #define MX7D_PAD_SD1_WP__UART6_DTE_RX                             0x018C 0x03FC 0x071C 0x2 0x5
769  #define MX7D_PAD_SD1_WP__ECSPI4_MOSI                              0x018C 0x03FC 0x055C 0x3 0x1
770  #define MX7D_PAD_SD1_WP__FLEXTIMER1_CH1                           0x018C 0x03FC 0x0588 0x4 0x1
771  #define MX7D_PAD_SD1_WP__GPIO5_IO1                                0x018C 0x03FC 0x0000 0x5 0x0
772  #define MX7D_PAD_SD1_WP__CCM_CLKO2                                0x018C 0x03FC 0x0000 0x6 0x0
773  #define MX7D_PAD_SD1_RESET_B__SD1_RESET_B                         0x0190 0x0400 0x0000 0x0 0x0
774  #define MX7D_PAD_SD1_RESET_B__SAI3_MCLK                           0x0190 0x0400 0x0000 0x1 0x0
775  #define MX7D_PAD_SD1_RESET_B__UART6_DCE_RTS                       0x0190 0x0400 0x0718 0x2 0x4
776  #define MX7D_PAD_SD1_RESET_B__UART6_DTE_CTS                       0x0190 0x0400 0x0000 0x2 0x0
777  #define MX7D_PAD_SD1_RESET_B__ECSPI4_SCLK                         0x0190 0x0400 0x0554 0x3 0x1
778  #define MX7D_PAD_SD1_RESET_B__FLEXTIMER1_CH2                      0x0190 0x0400 0x058C 0x4 0x1
779  #define MX7D_PAD_SD1_RESET_B__GPIO5_IO2                           0x0190 0x0400 0x0000 0x5 0x0
780  #define MX7D_PAD_SD1_CLK__SD1_CLK                                 0x0194 0x0404 0x0000 0x0 0x0
781  #define MX7D_PAD_SD1_CLK__SAI3_RX_SYNC                            0x0194 0x0404 0x06CC 0x1 0x1
782  #define MX7D_PAD_SD1_CLK__UART6_DCE_CTS                           0x0194 0x0404 0x0000 0x2 0x0
783  #define MX7D_PAD_SD1_CLK__UART6_DTE_RTS                           0x0194 0x0404 0x0718 0x2 0x5
784  #define MX7D_PAD_SD1_CLK__ECSPI4_SS0                              0x0194 0x0404 0x0560 0x3 0x1
785  #define MX7D_PAD_SD1_CLK__FLEXTIMER1_CH3                          0x0194 0x0404 0x0590 0x4 0x1
786  #define MX7D_PAD_SD1_CLK__GPIO5_IO3                               0x0194 0x0404 0x0000 0x5 0x0
787  #define MX7D_PAD_SD1_CMD__SD1_CMD                                 0x0198 0x0408 0x0000 0x0 0x0
788  #define MX7D_PAD_SD1_CMD__SAI3_RX_BCLK                            0x0198 0x0408 0x06C4 0x1 0x1
789  #define MX7D_PAD_SD1_CMD__ECSPI4_SS1                              0x0198 0x0408 0x0000 0x3 0x0
790  #define MX7D_PAD_SD1_CMD__FLEXTIMER2_CH0                          0x0198 0x0408 0x05AC 0x4 0x1
791  #define MX7D_PAD_SD1_CMD__GPIO5_IO4                               0x0198 0x0408 0x0000 0x5 0x0
792  #define MX7D_PAD_SD1_DATA0__SD1_DATA0                             0x019C 0x040C 0x0000 0x0 0x0
793  #define MX7D_PAD_SD1_DATA0__SAI3_RX_DATA0                         0x019C 0x040C 0x06C8 0x1 0x1
794  #define MX7D_PAD_SD1_DATA0__UART7_DCE_RX                          0x019C 0x040C 0x0724 0x2 0x4
795  #define MX7D_PAD_SD1_DATA0__UART7_DTE_TX                          0x019C 0x040C 0x0000 0x2 0x0
796  #define MX7D_PAD_SD1_DATA0__ECSPI4_SS2                            0x019C 0x040C 0x0000 0x3 0x0
797  #define MX7D_PAD_SD1_DATA0__FLEXTIMER2_CH1                        0x019C 0x040C 0x05B0 0x4 0x1
798  #define MX7D_PAD_SD1_DATA0__GPIO5_IO5                             0x019C 0x040C 0x0000 0x5 0x0
799  #define MX7D_PAD_SD1_DATA0__CCM_EXT_CLK1                          0x019C 0x040C 0x04E4 0x6 0x1
800  #define MX7D_PAD_SD1_DATA1__SD1_DATA1                             0x01A0 0x0410 0x0000 0x0 0x0
801  #define MX7D_PAD_SD1_DATA1__SAI3_TX_BCLK                          0x01A0 0x0410 0x06D0 0x1 0x1
802  #define MX7D_PAD_SD1_DATA1__UART7_DCE_TX                          0x01A0 0x0410 0x0000 0x2 0x0
803  #define MX7D_PAD_SD1_DATA1__UART7_DTE_RX                          0x01A0 0x0410 0x0724 0x2 0x5
804  #define MX7D_PAD_SD1_DATA1__ECSPI4_SS3                            0x01A0 0x0410 0x0000 0x3 0x0
805  #define MX7D_PAD_SD1_DATA1__FLEXTIMER2_CH2                        0x01A0 0x0410 0x05B4 0x4 0x1
806  #define MX7D_PAD_SD1_DATA1__GPIO5_IO6                             0x01A0 0x0410 0x0000 0x5 0x0
807  #define MX7D_PAD_SD1_DATA1__CCM_EXT_CLK2                          0x01A0 0x0410 0x04E8 0x6 0x1
808  #define MX7D_PAD_SD1_DATA2__SD1_DATA2                             0x01A4 0x0414 0x0000 0x0 0x0
809  #define MX7D_PAD_SD1_DATA2__SAI3_TX_SYNC                          0x01A4 0x0414 0x06D4 0x1 0x1
810  #define MX7D_PAD_SD1_DATA2__UART7_DCE_CTS                         0x01A4 0x0414 0x0000 0x2 0x0
811  #define MX7D_PAD_SD1_DATA2__UART7_DTE_RTS                         0x01A4 0x0414 0x0720 0x2 0x4
812  #define MX7D_PAD_SD1_DATA2__ECSPI4_RDY                            0x01A4 0x0414 0x0000 0x3 0x0
813  #define MX7D_PAD_SD1_DATA2__FLEXTIMER2_CH3                        0x01A4 0x0414 0x05B8 0x4 0x1
814  #define MX7D_PAD_SD1_DATA2__GPIO5_IO7                             0x01A4 0x0414 0x0000 0x5 0x0
815  #define MX7D_PAD_SD1_DATA2__CCM_EXT_CLK3                          0x01A4 0x0414 0x04EC 0x6 0x1
816  #define MX7D_PAD_SD1_DATA3__SD1_DATA3                             0x01A8 0x0418 0x0000 0x0 0x0
817  #define MX7D_PAD_SD1_DATA3__SAI3_TX_DATA0                         0x01A8 0x0418 0x0000 0x1 0x0
818  #define MX7D_PAD_SD1_DATA3__UART7_DCE_RTS                         0x01A8 0x0418 0x0720 0x2 0x5
819  #define MX7D_PAD_SD1_DATA3__UART7_DTE_CTS                         0x01A8 0x0418 0x0000 0x2 0x0
820  #define MX7D_PAD_SD1_DATA3__ECSPI3_SS1                            0x01A8 0x0418 0x0000 0x3 0x0
821  #define MX7D_PAD_SD1_DATA3__FLEXTIMER1_PHA                        0x01A8 0x0418 0x05A4 0x4 0x1
822  #define MX7D_PAD_SD1_DATA3__GPIO5_IO8                             0x01A8 0x0418 0x0000 0x5 0x0
823  #define MX7D_PAD_SD1_DATA3__CCM_EXT_CLK4                          0x01A8 0x0418 0x04F0 0x6 0x1
824  #define MX7D_PAD_SD2_CD_B__SD2_CD_B                               0x01AC 0x041C 0x0000 0x0 0x0
825  #define MX7D_PAD_SD2_CD_B__ENET1_MDIO                             0x01AC 0x041C 0x0568 0x1 0x2
826  #define MX7D_PAD_SD2_CD_B__ENET2_MDIO                             0x01AC 0x041C 0x0574 0x2 0x2
827  #define MX7D_PAD_SD2_CD_B__ECSPI3_SS2                             0x01AC 0x041C 0x0000 0x3 0x0
828  #define MX7D_PAD_SD2_CD_B__FLEXTIMER1_PHB                         0x01AC 0x041C 0x05A8 0x4 0x1
829  #define MX7D_PAD_SD2_CD_B__GPIO5_IO9                              0x01AC 0x041C 0x0000 0x5 0x0
830  #define MX7D_PAD_SD2_CD_B__SDMA_EXT_EVENT0                        0x01AC 0x041C 0x06D8 0x6 0x2
831  #define MX7D_PAD_SD2_WP__SD2_WP                                   0x01B0 0x0420 0x0000 0x0 0x0
832  #define MX7D_PAD_SD2_WP__ENET1_MDC                                0x01B0 0x0420 0x0000 0x1 0x0
833  #define MX7D_PAD_SD2_WP__ENET2_MDC                                0x01B0 0x0420 0x0000 0x2 0x0
834  #define MX7D_PAD_SD2_WP__ECSPI3_SS3                               0x01B0 0x0420 0x0000 0x3 0x0
835  #define MX7D_PAD_SD2_WP__USB_OTG1_ID                              0x01B0 0x0420 0x0734 0x4 0x2
836  #define MX7D_PAD_SD2_WP__GPIO5_IO10                               0x01B0 0x0420 0x0000 0x5 0x0
837  #define MX7D_PAD_SD2_WP__SDMA_EXT_EVENT1                          0x01B0 0x0420 0x06DC 0x6 0x2
838  #define MX7D_PAD_SD2_RESET_B__SD2_RESET_B                         0x01B4 0x0424 0x0000 0x0 0x0
839  #define MX7D_PAD_SD2_RESET_B__SAI2_MCLK                           0x01B4 0x0424 0x0000 0x1 0x0
840  #define MX7D_PAD_SD2_RESET_B__SD2_RESET                           0x01B4 0x0424 0x0000 0x2 0x0
841  #define MX7D_PAD_SD2_RESET_B__ECSPI3_RDY                          0x01B4 0x0424 0x0000 0x3 0x0
842  #define MX7D_PAD_SD2_RESET_B__USB_OTG2_ID                         0x01B4 0x0424 0x0730 0x4 0x2
843  #define MX7D_PAD_SD2_RESET_B__GPIO5_IO11                          0x01B4 0x0424 0x0000 0x5 0x0
844  #define MX7D_PAD_SD2_CLK__SD2_CLK                                 0x01B8 0x0428 0x0000 0x0 0x0
845  #define MX7D_PAD_SD2_CLK__SAI2_RX_SYNC                            0x01B8 0x0428 0x06B8 0x1 0x0
846  #define MX7D_PAD_SD2_CLK__MQS_RIGHT                               0x01B8 0x0428 0x0000 0x2 0x0
847  #define MX7D_PAD_SD2_CLK__GPT4_CLK                                0x01B8 0x0428 0x0000 0x3 0x0
848  #define MX7D_PAD_SD2_CLK__GPIO5_IO12                              0x01B8 0x0428 0x0000 0x5 0x0
849  #define MX7D_PAD_SD2_CMD__SD2_CMD                                 0x01BC 0x042C 0x0000 0x0 0x0
850  #define MX7D_PAD_SD2_CMD__SAI2_RX_BCLK                            0x01BC 0x042C 0x06B0 0x1 0x0
851  #define MX7D_PAD_SD2_CMD__MQS_LEFT                                0x01BC 0x042C 0x0000 0x2 0x0
852  #define MX7D_PAD_SD2_CMD__GPT4_CAPTURE1                           0x01BC 0x042C 0x0000 0x3 0x0
853  #define MX7D_PAD_SD2_CMD__SIM2_PORT1_TRXD                         0x01BC 0x042C 0x06EC 0x4 0x1
854  #define MX7D_PAD_SD2_CMD__GPIO5_IO13                              0x01BC 0x042C 0x0000 0x5 0x0
855  #define MX7D_PAD_SD2_DATA0__SD2_DATA0                             0x01C0 0x0430 0x0000 0x0 0x0
856  #define MX7D_PAD_SD2_DATA0__SAI2_RX_DATA0                         0x01C0 0x0430 0x06B4 0x1 0x0
857  #define MX7D_PAD_SD2_DATA0__UART4_DCE_RX                          0x01C0 0x0430 0x070C 0x2 0x2
858  #define MX7D_PAD_SD2_DATA0__UART4_DTE_TX                          0x01C0 0x0430 0x0000 0x2 0x0
859  #define MX7D_PAD_SD2_DATA0__GPT4_CAPTURE2                         0x01C0 0x0430 0x0000 0x3 0x0
860  #define MX7D_PAD_SD2_DATA0__SIM2_PORT1_CLK                        0x01C0 0x0430 0x0000 0x4 0x0
861  #define MX7D_PAD_SD2_DATA0__GPIO5_IO14                            0x01C0 0x0430 0x0000 0x5 0x0
862  #define MX7D_PAD_SD2_DATA1__SD2_DATA1                             0x01C4 0x0434 0x0000 0x0 0x0
863  #define MX7D_PAD_SD2_DATA1__SAI2_TX_BCLK                          0x01C4 0x0434 0x06BC 0x1 0x0
864  #define MX7D_PAD_SD2_DATA1__UART4_DCE_TX                          0x01C4 0x0434 0x0000 0x2 0x0
865  #define MX7D_PAD_SD2_DATA1__UART4_DTE_RX                          0x01C4 0x0434 0x070C 0x2 0x3
866  #define MX7D_PAD_SD2_DATA1__GPT4_COMPARE1                         0x01C4 0x0434 0x0000 0x3 0x0
867  #define MX7D_PAD_SD2_DATA1__SIM2_PORT1_RST_B                      0x01C4 0x0434 0x0000 0x4 0x0
868  #define MX7D_PAD_SD2_DATA1__GPIO5_IO15                            0x01C4 0x0434 0x0000 0x5 0x0
869  #define MX7D_PAD_SD2_DATA2__SD2_DATA2                             0x01C8 0x0438 0x0000 0x0 0x0
870  #define MX7D_PAD_SD2_DATA2__SAI2_TX_SYNC                          0x01C8 0x0438 0x06C0 0x1 0x0
871  #define MX7D_PAD_SD2_DATA2__UART4_DCE_CTS                         0x01C8 0x0438 0x0000 0x2 0x0
872  #define MX7D_PAD_SD2_DATA2__UART4_DTE_RTS                         0x01C8 0x0438 0x0708 0x2 0x2
873  #define MX7D_PAD_SD2_DATA2__GPT4_COMPARE2                         0x01C8 0x0438 0x0000 0x3 0x0
874  #define MX7D_PAD_SD2_DATA2__SIM2_PORT1_SVEN                       0x01C8 0x0438 0x0000 0x4 0x0
875  #define MX7D_PAD_SD2_DATA2__GPIO5_IO16                            0x01C8 0x0438 0x0000 0x5 0x0
876  #define MX7D_PAD_SD2_DATA3__SD2_DATA3                             0x01CC 0x043C 0x0000 0x0 0x0
877  #define MX7D_PAD_SD2_DATA3__SAI2_TX_DATA0                         0x01CC 0x043C 0x0000 0x1 0x0
878  #define MX7D_PAD_SD2_DATA3__UART4_DCE_RTS                         0x01CC 0x043C 0x0708 0x2 0x3
879  #define MX7D_PAD_SD2_DATA3__UART4_DTE_CTS                         0x01CC 0x043C 0x0000 0x2 0x0
880  #define MX7D_PAD_SD2_DATA3__GPT4_COMPARE3                         0x01CC 0x043C 0x0000 0x3 0x0
881  #define MX7D_PAD_SD2_DATA3__SIM2_PORT1_PD                         0x01CC 0x043C 0x06E8 0x4 0x1
882  #define MX7D_PAD_SD2_DATA3__GPIO5_IO17                            0x01CC 0x043C 0x0000 0x5 0x0
883  #define MX7D_PAD_SD3_CLK__SD3_CLK                                 0x01D0 0x0440 0x0000 0x0 0x0
884  #define MX7D_PAD_SD3_CLK__NAND_CLE                                0x01D0 0x0440 0x0000 0x1 0x0
885  #define MX7D_PAD_SD3_CLK__ECSPI4_MISO                             0x01D0 0x0440 0x0558 0x2 0x2
886  #define MX7D_PAD_SD3_CLK__SAI3_RX_SYNC                            0x01D0 0x0440 0x06CC 0x3 0x2
887  #define MX7D_PAD_SD3_CLK__GPT3_CLK                                0x01D0 0x0440 0x0000 0x4 0x0
888  #define MX7D_PAD_SD3_CLK__GPIO6_IO0                               0x01D0 0x0440 0x0000 0x5 0x0
889  #define MX7D_PAD_SD3_CMD__SD3_CMD                                 0x01D4 0x0444 0x0000 0x0 0x0
890  #define MX7D_PAD_SD3_CMD__NAND_ALE                                0x01D4 0x0444 0x0000 0x1 0x0
891  #define MX7D_PAD_SD3_CMD__ECSPI4_MOSI                             0x01D4 0x0444 0x055C 0x2 0x2
892  #define MX7D_PAD_SD3_CMD__SAI3_RX_BCLK                            0x01D4 0x0444 0x06C4 0x3 0x2
893  #define MX7D_PAD_SD3_CMD__GPT3_CAPTURE1                           0x01D4 0x0444 0x0000 0x4 0x0
894  #define MX7D_PAD_SD3_CMD__GPIO6_IO1                               0x01D4 0x0444 0x0000 0x5 0x0
895  #define MX7D_PAD_SD3_DATA0__SD3_DATA0                             0x01D8 0x0448 0x0000 0x0 0x0
896  #define MX7D_PAD_SD3_DATA0__NAND_DATA00                           0x01D8 0x0448 0x0000 0x1 0x0
897  #define MX7D_PAD_SD3_DATA0__ECSPI4_SS0                            0x01D8 0x0448 0x0560 0x2 0x2
898  #define MX7D_PAD_SD3_DATA0__SAI3_RX_DATA0                         0x01D8 0x0448 0x06C8 0x3 0x2
899  #define MX7D_PAD_SD3_DATA0__GPT3_CAPTURE2                         0x01D8 0x0448 0x0000 0x4 0x0
900  #define MX7D_PAD_SD3_DATA0__GPIO6_IO2                             0x01D8 0x0448 0x0000 0x5 0x0
901  #define MX7D_PAD_SD3_DATA1__SD3_DATA1                             0x01DC 0x044C 0x0000 0x0 0x0
902  #define MX7D_PAD_SD3_DATA1__NAND_DATA01                           0x01DC 0x044C 0x0000 0x1 0x0
903  #define MX7D_PAD_SD3_DATA1__ECSPI4_SCLK                           0x01DC 0x044C 0x0554 0x2 0x2
904  #define MX7D_PAD_SD3_DATA1__SAI3_TX_BCLK                          0x01DC 0x044C 0x06D0 0x3 0x2
905  #define MX7D_PAD_SD3_DATA1__GPT3_COMPARE1                         0x01DC 0x044C 0x0000 0x4 0x0
906  #define MX7D_PAD_SD3_DATA1__GPIO6_IO3                             0x01DC 0x044C 0x0000 0x5 0x0
907  #define MX7D_PAD_SD3_DATA2__SD3_DATA2                             0x01E0 0x0450 0x0000 0x0 0x0
908  #define MX7D_PAD_SD3_DATA2__NAND_DATA02                           0x01E0 0x0450 0x0000 0x1 0x0
909  #define MX7D_PAD_SD3_DATA2__I2C3_SDA                              0x01E0 0x0450 0x05E8 0x2 0x3
910  #define MX7D_PAD_SD3_DATA2__SAI3_TX_SYNC                          0x01E0 0x0450 0x06D4 0x3 0x2
911  #define MX7D_PAD_SD3_DATA2__GPT3_COMPARE2                         0x01E0 0x0450 0x0000 0x4 0x0
912  #define MX7D_PAD_SD3_DATA2__GPIO6_IO4                             0x01E0 0x0450 0x0000 0x5 0x0
913  #define MX7D_PAD_SD3_DATA3__SD3_DATA3                             0x01E4 0x0454 0x0000 0x0 0x0
914  #define MX7D_PAD_SD3_DATA3__NAND_DATA03                           0x01E4 0x0454 0x0000 0x1 0x0
915  #define MX7D_PAD_SD3_DATA3__I2C3_SCL                              0x01E4 0x0454 0x05E4 0x2 0x3
916  #define MX7D_PAD_SD3_DATA3__SAI3_TX_DATA0                         0x01E4 0x0454 0x0000 0x3 0x0
917  #define MX7D_PAD_SD3_DATA3__GPT3_COMPARE3                         0x01E4 0x0454 0x0000 0x4 0x0
918  #define MX7D_PAD_SD3_DATA3__GPIO6_IO5                             0x01E4 0x0454 0x0000 0x5 0x0
919  #define MX7D_PAD_SD3_DATA4__SD3_DATA4                             0x01E8 0x0458 0x0000 0x0 0x0
920  #define MX7D_PAD_SD3_DATA4__NAND_DATA04                           0x01E8 0x0458 0x0000 0x1 0x0
921  #define MX7D_PAD_SD3_DATA4__UART3_DCE_RX                          0x01E8 0x0458 0x0704 0x3 0x4
922  #define MX7D_PAD_SD3_DATA4__UART3_DTE_TX                          0x01E8 0x0458 0x0000 0x3 0x0
923  #define MX7D_PAD_SD3_DATA4__FLEXCAN2_RX                           0x01E8 0x0458 0x04E0 0x4 0x2
924  #define MX7D_PAD_SD3_DATA4__GPIO6_IO6                             0x01E8 0x0458 0x0000 0x5 0x0
925  #define MX7D_PAD_SD3_DATA5__SD3_DATA5                             0x01EC 0x045C 0x0000 0x0 0x0
926  #define MX7D_PAD_SD3_DATA5__NAND_DATA05                           0x01EC 0x045C 0x0000 0x1 0x0
927  #define MX7D_PAD_SD3_DATA5__UART3_DCE_TX                          0x01EC 0x045C 0x0000 0x3 0x0
928  #define MX7D_PAD_SD3_DATA5__UART3_DTE_RX                          0x01EC 0x045C 0x0704 0x3 0x5
929  #define MX7D_PAD_SD3_DATA5__FLEXCAN1_TX                           0x01EC 0x045C 0x0000 0x4 0x0
930  #define MX7D_PAD_SD3_DATA5__GPIO6_IO7                             0x01EC 0x045C 0x0000 0x5 0x0
931  #define MX7D_PAD_SD3_DATA6__SD3_DATA6                             0x01F0 0x0460 0x0000 0x0 0x0
932  #define MX7D_PAD_SD3_DATA6__NAND_DATA06                           0x01F0 0x0460 0x0000 0x1 0x0
933  #define MX7D_PAD_SD3_DATA6__SD3_WP                                0x01F0 0x0460 0x073C 0x2 0x2
934  #define MX7D_PAD_SD3_DATA6__UART3_DCE_RTS                         0x01F0 0x0460 0x0700 0x3 0x4
935  #define MX7D_PAD_SD3_DATA6__UART3_DTE_CTS                         0x01F0 0x0460 0x0000 0x3 0x0
936  #define MX7D_PAD_SD3_DATA6__FLEXCAN2_TX                           0x01F0 0x0460 0x0000 0x4 0x0
937  #define MX7D_PAD_SD3_DATA6__GPIO6_IO8                             0x01F0 0x0460 0x0000 0x5 0x0
938  #define MX7D_PAD_SD3_DATA7__SD3_DATA7                             0x01F4 0x0464 0x0000 0x0 0x0
939  #define MX7D_PAD_SD3_DATA7__NAND_DATA07                           0x01F4 0x0464 0x0000 0x1 0x0
940  #define MX7D_PAD_SD3_DATA7__SD3_CD_B                              0x01F4 0x0464 0x0738 0x2 0x2
941  #define MX7D_PAD_SD3_DATA7__UART3_DCE_CTS                         0x01F4 0x0464 0x0000 0x3 0x0
942  #define MX7D_PAD_SD3_DATA7__UART3_DTE_RTS                         0x01F4 0x0464 0x0700 0x3 0x5
943  #define MX7D_PAD_SD3_DATA7__FLEXCAN1_RX                           0x01F4 0x0464 0x04DC 0x4 0x2
944  #define MX7D_PAD_SD3_DATA7__GPIO6_IO9                             0x01F4 0x0464 0x0000 0x5 0x0
945  #define MX7D_PAD_SD3_STROBE__SD3_STROBE                           0x01F8 0x0468 0x0000 0x0 0x0
946  #define MX7D_PAD_SD3_STROBE__NAND_RE_B                            0x01F8 0x0468 0x0000 0x1 0x0
947  #define MX7D_PAD_SD3_STROBE__GPIO6_IO10                           0x01F8 0x0468 0x0000 0x5 0x0
948  #define MX7D_PAD_SD3_RESET_B__SD3_RESET_B                         0x01FC 0x046C 0x0000 0x0 0x0
949  #define MX7D_PAD_SD3_RESET_B__NAND_WE_B                           0x01FC 0x046C 0x0000 0x1 0x0
950  #define MX7D_PAD_SD3_RESET_B__SD3_RESET                           0x01FC 0x046C 0x0000 0x2 0x0
951  #define MX7D_PAD_SD3_RESET_B__SAI3_MCLK                           0x01FC 0x046C 0x0000 0x3 0x0
952  #define MX7D_PAD_SD3_RESET_B__GPIO6_IO11                          0x01FC 0x046C 0x0000 0x5 0x0
953  #define MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0                      0x0200 0x0470 0x06A0 0x0 0x0
954  #define MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B                         0x0200 0x0470 0x0000 0x1 0x0
955  #define MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX                       0x0200 0x0470 0x0714 0x2 0x2
956  #define MX7D_PAD_SAI1_RX_DATA__UART5_DTE_TX                       0x0200 0x0470 0x0000 0x2 0x0
957  #define MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX                        0x0200 0x0470 0x04DC 0x3 0x3
958  #define MX7D_PAD_SAI1_RX_DATA__SIM1_PORT1_TRXD                    0x0200 0x0470 0x06E4 0x4 0x1
959  #define MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12                         0x0200 0x0470 0x0000 0x5 0x0
960  #define MX7D_PAD_SAI1_RX_DATA__SRC_ANY_PU_RESET                   0x0200 0x0470 0x0000 0x7 0x0
961  #define MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK                       0x0204 0x0474 0x06A8 0x0 0x0
962  #define MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B                         0x0204 0x0474 0x0000 0x1 0x0
963  #define MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX                       0x0204 0x0474 0x0000 0x2 0x0
964  #define MX7D_PAD_SAI1_TX_BCLK__UART5_DTE_RX                       0x0204 0x0474 0x0714 0x2 0x3
965  #define MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX                        0x0204 0x0474 0x0000 0x3 0x0
966  #define MX7D_PAD_SAI1_TX_BCLK__SIM1_PORT1_CLK                     0x0204 0x0474 0x0000 0x4 0x0
967  #define MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13                         0x0204 0x0474 0x0000 0x5 0x0
968  #define MX7D_PAD_SAI1_TX_BCLK__SRC_EARLY_RESET                    0x0204 0x0474 0x0000 0x7 0x0
969  #define MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC                       0x0208 0x0478 0x06AC 0x0 0x0
970  #define MX7D_PAD_SAI1_TX_SYNC__NAND_DQS                           0x0208 0x0478 0x0000 0x1 0x0
971  #define MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS                      0x0208 0x0478 0x0000 0x2 0x0
972  #define MX7D_PAD_SAI1_TX_SYNC__UART5_DTE_RTS                      0x0208 0x0478 0x0710 0x2 0x2
973  #define MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX                        0x0208 0x0478 0x04E0 0x3 0x3
974  #define MX7D_PAD_SAI1_TX_SYNC__SIM1_PORT1_RST_B                   0x0208 0x0478 0x0000 0x4 0x0
975  #define MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14                         0x0208 0x0478 0x0000 0x5 0x0
976  #define MX7D_PAD_SAI1_TX_SYNC__SRC_INT_BOOT                       0x0208 0x0478 0x0000 0x7 0x0
977  #define MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0                      0x020C 0x047C 0x0000 0x0 0x0
978  #define MX7D_PAD_SAI1_TX_DATA__NAND_READY_B                       0x020C 0x047C 0x0000 0x1 0x0
979  #define MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS                      0x020C 0x047C 0x0710 0x2 0x3
980  #define MX7D_PAD_SAI1_TX_DATA__UART5_DTE_CTS                      0x020C 0x047C 0x0000 0x2 0x0
981  #define MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX                        0x020C 0x047C 0x0000 0x3 0x0
982  #define MX7D_PAD_SAI1_TX_DATA__SIM1_PORT1_SVEN                    0x020C 0x047C 0x0000 0x4 0x0
983  #define MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15                         0x020C 0x047C 0x0000 0x5 0x0
984  #define MX7D_PAD_SAI1_TX_DATA__SRC_SYSTEM_RESET                   0x020C 0x047C 0x0000 0x7 0x0
985  #define MX7D_PAD_SAI1_RX_SYNC__SAI1_RX_SYNC                       0x0210 0x0480 0x06A4 0x0 0x0
986  #define MX7D_PAD_SAI1_RX_SYNC__NAND_CE2_B                         0x0210 0x0480 0x0000 0x1 0x0
987  #define MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC                       0x0210 0x0480 0x06B8 0x2 0x1
988  #define MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL                           0x0210 0x0480 0x05EC 0x3 0x3
989  #define MX7D_PAD_SAI1_RX_SYNC__SIM1_PORT1_PD                      0x0210 0x0480 0x06E0 0x4 0x1
990  #define MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16                         0x0210 0x0480 0x0000 0x5 0x0
991  #define MX7D_PAD_SAI1_RX_SYNC__MQS_RIGHT                          0x0210 0x0480 0x0000 0x6 0x0
992  #define MX7D_PAD_SAI1_RX_SYNC__SRC_CA7_RESET_B0                   0x0210 0x0480 0x0000 0x7 0x0
993  #define MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK                       0x0214 0x0484 0x069C 0x0 0x0
994  #define MX7D_PAD_SAI1_RX_BCLK__NAND_CE3_B                         0x0214 0x0484 0x0000 0x1 0x0
995  #define MX7D_PAD_SAI1_RX_BCLK__SAI2_RX_BCLK                       0x0214 0x0484 0x06B0 0x2 0x1
996  #define MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA                           0x0214 0x0484 0x05F0 0x3 0x3
997  #define MX7D_PAD_SAI1_RX_BCLK__FLEXTIMER2_PHA                     0x0214 0x0484 0x05CC 0x4 0x1
998  #define MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17                         0x0214 0x0484 0x0000 0x5 0x0
999  #define MX7D_PAD_SAI1_RX_BCLK__MQS_LEFT                           0x0214 0x0484 0x0000 0x6 0x0
1000  #define MX7D_PAD_SAI1_RX_BCLK__SRC_CA7_RESET_B1                   0x0214 0x0484 0x0000 0x7 0x0
1001  #define MX7D_PAD_SAI1_MCLK__SAI1_MCLK                             0x0218 0x0488 0x0000 0x0 0x0
1002  #define MX7D_PAD_SAI1_MCLK__NAND_WP_B                             0x0218 0x0488 0x0000 0x1 0x0
1003  #define MX7D_PAD_SAI1_MCLK__SAI2_MCLK                             0x0218 0x0488 0x0000 0x2 0x0
1004  #define MX7D_PAD_SAI1_MCLK__CCM_PMIC_READY                        0x0218 0x0488 0x04F4 0x3 0x3
1005  #define MX7D_PAD_SAI1_MCLK__FLEXTIMER2_PHB                        0x0218 0x0488 0x05D0 0x4 0x1
1006  #define MX7D_PAD_SAI1_MCLK__GPIO6_IO18                            0x0218 0x0488 0x0000 0x5 0x0
1007  #define MX7D_PAD_SAI1_MCLK__SRC_TESTER_ACK                        0x0218 0x0488 0x0000 0x7 0x0
1008  #define MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC                       0x021C 0x048C 0x06C0 0x0 0x1
1009  #define MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO                        0x021C 0x048C 0x0548 0x1 0x1
1010  #define MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX                       0x021C 0x048C 0x070C 0x2 0x4
1011  #define MX7D_PAD_SAI2_TX_SYNC__UART4_DTE_TX                       0x021C 0x048C 0x0000 0x2 0x0
1012  #define MX7D_PAD_SAI2_TX_SYNC__UART1_DCE_CTS                      0x021C 0x048C 0x0000 0x3 0x0
1013  #define MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS                      0x021C 0x048C 0x06F0 0x3 0x0
1014  #define MX7D_PAD_SAI2_TX_SYNC__FLEXTIMER2_CH4                     0x021C 0x048C 0x05BC 0x4 0x1
1015  #define MX7D_PAD_SAI2_TX_SYNC__GPIO6_IO19                         0x021C 0x048C 0x0000 0x5 0x0
1016  #define MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK                       0x0220 0x0490 0x06BC 0x0 0x1
1017  #define MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI                        0x0220 0x0490 0x054C 0x1 0x1
1018  #define MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX                       0x0220 0x0490 0x0000 0x2 0x0
1019  #define MX7D_PAD_SAI2_TX_BCLK__UART4_DTE_RX                       0x0220 0x0490 0x070C 0x2 0x5
1020  #define MX7D_PAD_SAI2_TX_BCLK__UART1_DCE_RTS                      0x0220 0x0490 0x06F0 0x3 0x1
1021  #define MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS                      0x0220 0x0490 0x0000 0x3 0x0
1022  #define MX7D_PAD_SAI2_TX_BCLK__FLEXTIMER2_CH5                     0x0220 0x0490 0x05C0 0x4 0x1
1023  #define MX7D_PAD_SAI2_TX_BCLK__GPIO6_IO20                         0x0220 0x0490 0x0000 0x5 0x0
1024  #define MX7D_PAD_SAI2_RX_DATA__SAI2_RX_DATA0                      0x0224 0x0494 0x06B4 0x0 0x1
1025  #define MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK                        0x0224 0x0494 0x0544 0x1 0x1
1026  #define MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS                      0x0224 0x0494 0x0000 0x2 0x0
1027  #define MX7D_PAD_SAI2_RX_DATA__UART4_DTE_RTS                      0x0224 0x0494 0x0708 0x2 0x4
1028  #define MX7D_PAD_SAI2_RX_DATA__UART2_DCE_CTS                      0x0224 0x0494 0x0000 0x3 0x0
1029  #define MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS                      0x0224 0x0494 0x06F8 0x3 0x2
1030  #define MX7D_PAD_SAI2_RX_DATA__FLEXTIMER2_CH6                     0x0224 0x0494 0x05C4 0x4 0x1
1031  #define MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21                         0x0224 0x0494 0x0000 0x5 0x0
1032  #define MX7D_PAD_SAI2_RX_DATA__KPP_COL7                           0x0224 0x0494 0x0610 0x6 0x1
1033  #define MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0                      0x0228 0x0498 0x0000 0x0 0x0
1034  #define MX7D_PAD_SAI2_TX_DATA__ECSPI3_SS0                         0x0228 0x0498 0x0550 0x1 0x1
1035  #define MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS                      0x0228 0x0498 0x0708 0x2 0x5
1036  #define MX7D_PAD_SAI2_TX_DATA__UART4_DTE_CTS                      0x0228 0x0498 0x0000 0x2 0x0
1037  #define MX7D_PAD_SAI2_TX_DATA__UART2_DCE_RTS                      0x0228 0x0498 0x06F8 0x3 0x3
1038  #define MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS                      0x0228 0x0498 0x0000 0x3 0x0
1039  #define MX7D_PAD_SAI2_TX_DATA__FLEXTIMER2_CH7                     0x0228 0x0498 0x05C8 0x4 0x1
1040  #define MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22                         0x0228 0x0498 0x0000 0x5 0x0
1041  #define MX7D_PAD_SAI2_TX_DATA__KPP_ROW7                           0x0228 0x0498 0x0630 0x6 0x1
1042  #define MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0                 0x022C 0x049C 0x0000 0x0 0x0
1043  #define MX7D_PAD_ENET1_RGMII_RD0__PWM1_OUT                        0x022C 0x049C 0x0000 0x1 0x0
1044  #define MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL                        0x022C 0x049C 0x05E4 0x2 0x4
1045  #define MX7D_PAD_ENET1_RGMII_RD0__UART1_DCE_CTS                   0x022C 0x049C 0x0000 0x3 0x0
1046  #define MX7D_PAD_ENET1_RGMII_RD0__UART1_DTE_RTS                   0x022C 0x049C 0x06F0 0x3 0x2
1047  #define MX7D_PAD_ENET1_RGMII_RD0__EPDC_VCOM0                      0x022C 0x049C 0x0000 0x4 0x0
1048  #define MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0                       0x022C 0x049C 0x0000 0x5 0x0
1049  #define MX7D_PAD_ENET1_RGMII_RD0__KPP_ROW3                        0x022C 0x049C 0x0620 0x6 0x1
1050  #define MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1                 0x0230 0x04A0 0x0000 0x0 0x0
1051  #define MX7D_PAD_ENET1_RGMII_RD1__PWM2_OUT                        0x0230 0x04A0 0x0000 0x1 0x0
1052  #define MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA                        0x0230 0x04A0 0x05E8 0x2 0x4
1053  #define MX7D_PAD_ENET1_RGMII_RD1__UART1_DCE_RTS                   0x0230 0x04A0 0x06F0 0x3 0x3
1054  #define MX7D_PAD_ENET1_RGMII_RD1__UART1_DTE_CTS                   0x0230 0x04A0 0x0000 0x3 0x0
1055  #define MX7D_PAD_ENET1_RGMII_RD1__EPDC_VCOM1                      0x0230 0x04A0 0x0000 0x4 0x0
1056  #define MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1                       0x0230 0x04A0 0x0000 0x5 0x0
1057  #define MX7D_PAD_ENET1_RGMII_RD1__KPP_COL3                        0x0230 0x04A0 0x0600 0x6 0x1
1058  #define MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2                 0x0234 0x04A4 0x0000 0x0 0x0
1059  #define MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX                     0x0234 0x04A4 0x04DC 0x1 0x4
1060  #define MX7D_PAD_ENET1_RGMII_RD2__ECSPI2_SCLK                     0x0234 0x04A4 0x0534 0x2 0x1
1061  #define MX7D_PAD_ENET1_RGMII_RD2__UART1_DCE_RX                    0x0234 0x04A4 0x06F4 0x3 0x2
1062  #define MX7D_PAD_ENET1_RGMII_RD2__UART1_DTE_TX                    0x0234 0x04A4 0x0000 0x3 0x0
1063  #define MX7D_PAD_ENET1_RGMII_RD2__EPDC_SDCE4                      0x0234 0x04A4 0x0000 0x4 0x0
1064  #define MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2                       0x0234 0x04A4 0x0000 0x5 0x0
1065  #define MX7D_PAD_ENET1_RGMII_RD2__KPP_ROW2                        0x0234 0x04A4 0x061C 0x6 0x1
1066  #define MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3                 0x0238 0x04A8 0x0000 0x0 0x0
1067  #define MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX                     0x0238 0x04A8 0x0000 0x1 0x0
1068  #define MX7D_PAD_ENET1_RGMII_RD3__ECSPI2_MOSI                     0x0238 0x04A8 0x053C 0x2 0x1
1069  #define MX7D_PAD_ENET1_RGMII_RD3__UART1_DCE_TX                    0x0238 0x04A8 0x0000 0x3 0x0
1070  #define MX7D_PAD_ENET1_RGMII_RD3__UART1_DTE_RX                    0x0238 0x04A8 0x06F4 0x3 0x3
1071  #define MX7D_PAD_ENET1_RGMII_RD3__EPDC_SDCE5                      0x0238 0x04A8 0x0000 0x4 0x0
1072  #define MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3                       0x0238 0x04A8 0x0000 0x5 0x0
1073  #define MX7D_PAD_ENET1_RGMII_RD3__KPP_COL2                        0x0238 0x04A8 0x05FC 0x6 0x1
1074  #define MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL           0x023C 0x04AC 0x0000 0x0 0x0
1075  #define MX7D_PAD_ENET1_RGMII_RX_CTL__ECSPI2_SS1                   0x023C 0x04AC 0x0000 0x2 0x0
1076  #define MX7D_PAD_ENET1_RGMII_RX_CTL__EPDC_SDCE6                   0x023C 0x04AC 0x0000 0x4 0x0
1077  #define MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4                    0x023C 0x04AC 0x0000 0x5 0x0
1078  #define MX7D_PAD_ENET1_RGMII_RX_CTL__KPP_ROW1                     0x023C 0x04AC 0x0618 0x6 0x1
1079  #define MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC                 0x0240 0x04B0 0x0000 0x0 0x0
1080  #define MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER                     0x0240 0x04B0 0x0000 0x1 0x0
1081  #define MX7D_PAD_ENET1_RGMII_RXC__ECSPI2_SS2                      0x0240 0x04B0 0x0000 0x2 0x0
1082  #define MX7D_PAD_ENET1_RGMII_RXC__EPDC_SDCE7                      0x0240 0x04B0 0x0000 0x4 0x0
1083  #define MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5                       0x0240 0x04B0 0x0000 0x5 0x0
1084  #define MX7D_PAD_ENET1_RGMII_RXC__KPP_COL1                        0x0240 0x04B0 0x0000 0x6 0x0
1085  #define MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0                 0x0244 0x04B4 0x0000 0x0 0x0
1086  #define MX7D_PAD_ENET1_RGMII_TD0__PWM3_OUT                        0x0244 0x04B4 0x0000 0x1 0x0
1087  #define MX7D_PAD_ENET1_RGMII_TD0__ECSPI2_SS3                      0x0244 0x04B4 0x0000 0x2 0x0
1088  #define MX7D_PAD_ENET1_RGMII_TD0__EPDC_SDCE8                      0x0244 0x04B4 0x0000 0x4 0x0
1089  #define MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6                       0x0244 0x04B4 0x0000 0x5 0x0
1090  #define MX7D_PAD_ENET1_RGMII_TD0__KPP_ROW0                        0x0244 0x04B4 0x0614 0x6 0x1
1091  #define MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1                 0x0248 0x04B8 0x0000 0x0 0x0
1092  #define MX7D_PAD_ENET1_RGMII_TD1__PWM4_OUT                        0x0248 0x04B8 0x0000 0x1 0x0
1093  #define MX7D_PAD_ENET1_RGMII_TD1__ECSPI2_RDY                      0x0248 0x04B8 0x0000 0x2 0x0
1094  #define MX7D_PAD_ENET1_RGMII_TD1__EPDC_SDCE9                      0x0248 0x04B8 0x0000 0x4 0x0
1095  #define MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7                       0x0248 0x04B8 0x0000 0x5 0x0
1096  #define MX7D_PAD_ENET1_RGMII_TD1__KPP_COL0                        0x0248 0x04B8 0x05F4 0x6 0x1
1097  #define MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2                 0x024C 0x04BC 0x0000 0x0 0x0
1098  #define MX7D_PAD_ENET1_RGMII_TD2__FLEXCAN2_RX                     0x024C 0x04BC 0x04E0 0x1 0x4
1099  #define MX7D_PAD_ENET1_RGMII_TD2__ECSPI2_MISO                     0x024C 0x04BC 0x0538 0x2 0x1
1100  #define MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL                        0x024C 0x04BC 0x05EC 0x3 0x4
1101  #define MX7D_PAD_ENET1_RGMII_TD2__EPDC_SDOED                      0x024C 0x04BC 0x0000 0x4 0x0
1102  #define MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8                       0x024C 0x04BC 0x0000 0x5 0x0
1103  #define MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3                 0x0250 0x04C0 0x0000 0x0 0x0
1104  #define MX7D_PAD_ENET1_RGMII_TD3__FLEXCAN2_TX                     0x0250 0x04C0 0x0000 0x1 0x0
1105  #define MX7D_PAD_ENET1_RGMII_TD3__ECSPI2_SS0                      0x0250 0x04C0 0x0540 0x2 0x1
1106  #define MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA                        0x0250 0x04C0 0x05F0 0x3 0x4
1107  #define MX7D_PAD_ENET1_RGMII_TD3__EPDC_SDOEZ                      0x0250 0x04C0 0x0000 0x4 0x0
1108  #define MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9                       0x0250 0x04C0 0x0000 0x5 0x0
1109  #define MX7D_PAD_ENET1_RGMII_TD3__CAAM_RNG_OSC_OBS                0x0250 0x04C0 0x0000 0x7 0x0
1110  #define MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL           0x0254 0x04C4 0x0000 0x0 0x0
1111  #define MX7D_PAD_ENET1_RGMII_TX_CTL__SAI1_RX_SYNC                 0x0254 0x04C4 0x06A4 0x2 0x1
1112  #define MX7D_PAD_ENET1_RGMII_TX_CTL__GPT2_COMPARE1                0x0254 0x04C4 0x0000 0x3 0x0
1113  #define MX7D_PAD_ENET1_RGMII_TX_CTL__EPDC_PWR_CTRL2               0x0254 0x04C4 0x0000 0x4 0x0
1114  #define MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10                   0x0254 0x04C4 0x0000 0x5 0x0
1115  #define MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC                 0x0258 0x04C8 0x0000 0x0 0x0
1116  #define MX7D_PAD_ENET1_RGMII_TXC__ENET1_TX_ER                     0x0258 0x04C8 0x0000 0x1 0x0
1117  #define MX7D_PAD_ENET1_RGMII_TXC__SAI1_RX_BCLK                    0x0258 0x04C8 0x069C 0x2 0x1
1118  #define MX7D_PAD_ENET1_RGMII_TXC__GPT2_COMPARE2                   0x0258 0x04C8 0x0000 0x3 0x0
1119  #define MX7D_PAD_ENET1_RGMII_TXC__EPDC_PWR_CTRL3                  0x0258 0x04C8 0x0000 0x4 0x0
1120  #define MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11                      0x0258 0x04C8 0x0000 0x5 0x0
1121  #define MX7D_PAD_ENET1_TX_CLK__ENET1_TX_CLK                       0x025C 0x04CC 0x0000 0x0 0x0
1122  #define MX7D_PAD_ENET1_TX_CLK__CCM_ENET_REF_CLK1                  0x025C 0x04CC 0x0564 0x1 0x2
1123  #define MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0                      0x025C 0x04CC 0x06A0 0x2 0x1
1124  #define MX7D_PAD_ENET1_TX_CLK__GPT2_COMPARE3                      0x025C 0x04CC 0x0000 0x3 0x0
1125  #define MX7D_PAD_ENET1_TX_CLK__EPDC_PWR_IRQ                       0x025C 0x04CC 0x057C 0x4 0x1
1126  #define MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12                         0x025C 0x04CC 0x0000 0x5 0x0
1127  #define MX7D_PAD_ENET1_TX_CLK__CCM_EXT_CLK1                       0x025C 0x04CC 0x04E4 0x6 0x2
1128  #define MX7D_PAD_ENET1_TX_CLK__CSU_ALARM_AUT0                     0x025C 0x04CC 0x0000 0x7 0x0
1129  #define MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK                       0x0260 0x04D0 0x056C 0x0 0x0
1130  #define MX7D_PAD_ENET1_RX_CLK__WDOG2_WDOG_B                       0x0260 0x04D0 0x0000 0x1 0x0
1131  #define MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK                       0x0260 0x04D0 0x06A8 0x2 0x1
1132  #define MX7D_PAD_ENET1_RX_CLK__GPT2_CLK                           0x0260 0x04D0 0x0000 0x3 0x0
1133  #define MX7D_PAD_ENET1_RX_CLK__EPDC_PWR_WAKE                      0x0260 0x04D0 0x0000 0x4 0x0
1134  #define MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13                         0x0260 0x04D0 0x0000 0x5 0x0
1135  #define MX7D_PAD_ENET1_RX_CLK__CCM_EXT_CLK2                       0x0260 0x04D0 0x04E8 0x6 0x2
1136  #define MX7D_PAD_ENET1_RX_CLK__CSU_ALARM_AUT1                     0x0260 0x04D0 0x0000 0x7 0x0
1137  #define MX7D_PAD_ENET1_CRS__ENET1_CRS                             0x0264 0x04D4 0x0000 0x0 0x0
1138  #define MX7D_PAD_ENET1_CRS__WDOG2_WDOG_RST_B_DEB                  0x0264 0x04D4 0x0000 0x1 0x0
1139  #define MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC                          0x0264 0x04D4 0x06AC 0x2 0x1
1140  #define MX7D_PAD_ENET1_CRS__GPT2_CAPTURE1                         0x0264 0x04D4 0x0000 0x3 0x0
1141  #define MX7D_PAD_ENET1_CRS__EPDC_PWR_CTRL0                        0x0264 0x04D4 0x0000 0x4 0x0
1142  #define MX7D_PAD_ENET1_CRS__GPIO7_IO14                            0x0264 0x04D4 0x0000 0x5 0x0
1143  #define MX7D_PAD_ENET1_CRS__CCM_EXT_CLK3                          0x0264 0x04D4 0x04EC 0x6 0x2
1144  #define MX7D_PAD_ENET1_CRS__CSU_ALARM_AUT2                        0x0264 0x04D4 0x0000 0x7 0x0
1145  #define MX7D_PAD_ENET1_COL__ENET1_COL                             0x0268 0x04D8 0x0000 0x0 0x0
1146  #define MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY                        0x0268 0x04D8 0x0000 0x1 0x0
1147  #define MX7D_PAD_ENET1_COL__SAI1_TX_DATA0                         0x0268 0x04D8 0x0000 0x2 0x0
1148  #define MX7D_PAD_ENET1_COL__GPT2_CAPTURE2                         0x0268 0x04D8 0x0000 0x3 0x0
1149  #define MX7D_PAD_ENET1_COL__EPDC_PWR_CTRL1                        0x0268 0x04D8 0x0000 0x4 0x0
1150  #define MX7D_PAD_ENET1_COL__GPIO7_IO15                            0x0268 0x04D8 0x0000 0x5 0x0
1151  #define MX7D_PAD_ENET1_COL__CCM_EXT_CLK4                          0x0268 0x04D8 0x04F0 0x6 0x2
1152  #define MX7D_PAD_ENET1_COL__CSU_INT_DEB                           0x0268 0x04D8 0x0000 0x7 0x0
1153  
1154  #endif /* __DTS_IMX7D_PINFUNC_H */
1155