1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7 #include <net/mac80211.h>
8 #include <linux/netdevice.h>
9 #include <linux/dmi.h>
10
11 #include "iwl-trans.h"
12 #include "iwl-op-mode.h"
13 #include "fw/img.h"
14 #include "iwl-debug.h"
15 #include "iwl-prph.h"
16 #include "fw/acpi.h"
17 #include "fw/pnvm.h"
18 #include "fw/uefi.h"
19 #include "fw/regulatory.h"
20
21 #include "mvm.h"
22 #include "fw/dbg.h"
23 #include "iwl-phy-db.h"
24 #include "iwl-modparams.h"
25 #include "iwl-nvm-parse.h"
26 #include "time-sync.h"
27
28 #define MVM_UCODE_ALIVE_TIMEOUT (2 * HZ)
29 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
30
31 struct iwl_mvm_alive_data {
32 __le32 sku_id[3];
33 bool valid;
34 };
35
iwl_send_tx_ant_cfg(struct iwl_mvm * mvm,u8 valid_tx_ant)36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
37 {
38 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
39 .valid = cpu_to_le32(valid_tx_ant),
40 };
41
42 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
43 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
44 sizeof(tx_ant_cmd), &tx_ant_cmd);
45 }
46
iwl_send_rss_cfg_cmd(struct iwl_mvm * mvm)47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
48 {
49 int i;
50 struct iwl_rss_config_cmd cmd = {
51 .flags = cpu_to_le32(IWL_RSS_ENABLE),
52 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
53 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
54 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
55 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
56 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
57 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
58 };
59
60 if (mvm->trans->info.num_rxqs == 1)
61 return 0;
62
63 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
64 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
65 cmd.indirection_table[i] =
66 1 + (i % (mvm->trans->info.num_rxqs - 1));
67 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
68
69 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
70 }
71
iwl_mvm_send_dqa_cmd(struct iwl_mvm * mvm)72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
73 {
74 struct iwl_dqa_enable_cmd dqa_cmd = {
75 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
76 };
77 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
78 int ret;
79
80 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
81 if (ret)
82 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
83 else
84 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
85
86 return ret;
87 }
88
iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
90 struct iwl_rx_cmd_buffer *rxb)
91 {
92 struct iwl_rx_packet *pkt = rxb_addr(rxb);
93 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
94
95 if (mfu_dump_notif->index_num == 0)
96 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
97 le32_to_cpu(mfu_dump_notif->assert_id));
98 }
99
iwl_alive_fn(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)100 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
101 struct iwl_rx_packet *pkt, void *data)
102 {
103 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
104 struct iwl_mvm *mvm =
105 container_of(notif_wait, struct iwl_mvm, notif_wait);
106 struct iwl_mvm_alive_data *alive_data = data;
107 struct iwl_umac_alive *umac;
108 struct iwl_lmac_alive *lmac1;
109 struct iwl_lmac_alive *lmac2 = NULL;
110 u16 status;
111 u32 lmac_error_event_table, umac_error_table;
112 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
113 UCODE_ALIVE_NTFY, 0);
114 u32 i;
115
116
117 if (version >= 6) {
118 struct iwl_alive_ntf_v7 *palive;
119
120 if (pkt_len < sizeof(*palive))
121 return false;
122
123 palive = (void *)pkt->data;
124
125 umac = &palive->umac_data;
126 lmac1 = &palive->lmac_data[0];
127 lmac2 = &palive->lmac_data[1];
128 status = le16_to_cpu(palive->status);
129
130 BUILD_BUG_ON(sizeof(palive->sku_id.data) !=
131 sizeof(alive_data->sku_id));
132 memcpy(alive_data->sku_id, palive->sku_id.data,
133 sizeof(palive->sku_id.data));
134
135 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
136 le32_to_cpu(alive_data->sku_id[0]),
137 le32_to_cpu(alive_data->sku_id[1]),
138 le32_to_cpu(alive_data->sku_id[2]));
139
140 mvm->trans->dbg.imr_data.imr_enable =
141 le32_to_cpu(palive->imr.enabled);
142 mvm->trans->dbg.imr_data.imr_size =
143 le32_to_cpu(palive->imr.size);
144 mvm->trans->dbg.imr_data.imr2sram_remainbyte =
145 mvm->trans->dbg.imr_data.imr_size;
146 mvm->trans->dbg.imr_data.imr_base_addr =
147 palive->imr.base_addr;
148 mvm->trans->dbg.imr_data.imr_curr_addr =
149 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr);
150 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n",
151 mvm->trans->dbg.imr_data.imr_enable,
152 mvm->trans->dbg.imr_data.imr_size,
153 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
154
155 if (!mvm->trans->dbg.imr_data.imr_enable) {
156 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
157 struct iwl_ucode_tlv *reg_tlv;
158 struct iwl_fw_ini_region_tlv *reg;
159
160 reg_tlv = mvm->trans->dbg.active_regions[i];
161 if (!reg_tlv)
162 continue;
163
164 reg = (void *)reg_tlv->data;
165 /*
166 * We have only one DRAM IMR region, so we
167 * can break as soon as we find the first
168 * one.
169 */
170 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
171 mvm->trans->dbg.unsupported_region_msk |= BIT(i);
172 break;
173 }
174 }
175 }
176
177 if (version >= 8) {
178 const struct iwl_alive_ntf *palive_v8 =
179 (void *)pkt->data;
180
181 if (pkt_len < sizeof(*palive_v8))
182 return false;
183
184 IWL_DEBUG_FW(mvm, "platform id: 0x%llx\n",
185 palive_v8->platform_id);
186 }
187 } else if (iwl_rx_packet_payload_len(pkt) ==
188 sizeof(struct iwl_alive_ntf_v3)) {
189 struct iwl_alive_ntf_v3 *palive3;
190
191 if (pkt_len < sizeof(*palive3))
192 return false;
193
194 palive3 = (void *)pkt->data;
195 umac = &palive3->umac_data;
196 lmac1 = &palive3->lmac_data;
197 status = le16_to_cpu(palive3->status);
198 } else {
199 WARN(1, "unsupported alive notification (size %d)\n",
200 iwl_rx_packet_payload_len(pkt));
201 /* get timeout later */
202 return false;
203 }
204
205 lmac_error_event_table =
206 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
207 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
208
209 if (lmac2)
210 mvm->trans->dbg.lmac_error_event_table[1] =
211 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
212
213 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
214 ~FW_ADDR_CACHE_CONTROL;
215
216 if (umac_error_table) {
217 iwl_fw_umac_set_alive_err_table(mvm->trans,
218 umac_error_table);
219 }
220
221 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
222
223 IWL_DEBUG_FW(mvm,
224 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
225 status, lmac1->ver_type, lmac1->ver_subtype);
226
227 if (lmac2)
228 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
229
230 IWL_DEBUG_FW(mvm,
231 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
232 le32_to_cpu(umac->umac_major),
233 le32_to_cpu(umac->umac_minor));
234
235 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
236
237 return true;
238 }
239
iwl_wait_init_complete(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)240 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
241 struct iwl_rx_packet *pkt, void *data)
242 {
243 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
244
245 return true;
246 }
247
iwl_wait_phy_db_entry(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)248 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
249 struct iwl_rx_packet *pkt, void *data)
250 {
251 struct iwl_phy_db *phy_db = data;
252
253 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
254 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
255 return true;
256 }
257
258 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
259
260 return false;
261 }
262
iwl_mvm_print_pd_notification(struct iwl_mvm * mvm)263 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
264 {
265 #define IWL_FW_PRINT_REG_INFO(reg_name) \
266 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name))
267
268 struct iwl_trans *trans = mvm->trans;
269 enum iwl_device_family device_family = trans->mac_cfg->device_family;
270
271 if (device_family < IWL_DEVICE_FAMILY_8000)
272 return;
273
274 if (device_family <= IWL_DEVICE_FAMILY_9000)
275 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION);
276 else
277 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION);
278
279 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE);
280
281 /* print OPT info */
282 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR);
283 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA);
284 }
285
iwl_mvm_load_ucode_wait_alive(struct iwl_mvm * mvm,enum iwl_ucode_type ucode_type)286 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
287 enum iwl_ucode_type ucode_type)
288 {
289 struct iwl_notification_wait alive_wait;
290 struct iwl_mvm_alive_data alive_data = {};
291 int ret;
292 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
293 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
294 bool run_in_rfkill =
295 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
296 u8 count;
297 struct iwl_pc_data *pc_data;
298
299 if (ucode_type == IWL_UCODE_REGULAR &&
300 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
301 !(fw_has_capa(&mvm->fw->ucode_capa,
302 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
303 ucode_type = IWL_UCODE_REGULAR_USNIFFER;
304 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
305 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
306
307 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
308 alive_cmd, ARRAY_SIZE(alive_cmd),
309 iwl_alive_fn, &alive_data);
310
311 /*
312 * We want to load the INIT firmware even in RFKILL
313 * For the unified firmware case, the ucode_type is not
314 * INIT, but we still need to run it.
315 */
316 ret = iwl_trans_start_fw(mvm->trans, mvm->fw, ucode_type,
317 run_in_rfkill);
318 if (ret) {
319 iwl_fw_set_current_image(&mvm->fwrt, old_type);
320 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
321 return ret;
322 }
323
324 /*
325 * Some things may run in the background now, but we
326 * just wait for the ALIVE notification here.
327 */
328 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
329 MVM_UCODE_ALIVE_TIMEOUT);
330
331 if (mvm->trans->mac_cfg->device_family ==
332 IWL_DEVICE_FAMILY_AX210) {
333 /* print these registers regardless of alive fail/success */
334 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n",
335 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION));
336 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n",
337 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION));
338 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n",
339 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG));
340 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n",
341 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9));
342 }
343
344 if (ret) {
345 struct iwl_trans *trans = mvm->trans;
346
347 /* SecBoot info */
348 if (trans->mac_cfg->device_family >=
349 IWL_DEVICE_FAMILY_22000) {
350 IWL_ERR(mvm,
351 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
352 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
353 iwl_read_umac_prph(trans,
354 UMAG_SB_CPU_2_STATUS));
355 } else if (trans->mac_cfg->device_family >=
356 IWL_DEVICE_FAMILY_8000) {
357 IWL_ERR(mvm,
358 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
359 iwl_read_prph(trans, SB_CPU_1_STATUS),
360 iwl_read_prph(trans, SB_CPU_2_STATUS));
361 }
362
363 iwl_mvm_print_pd_notification(mvm);
364
365 /* LMAC/UMAC PC info */
366 if (trans->mac_cfg->device_family >=
367 IWL_DEVICE_FAMILY_22000) {
368 pc_data = trans->dbg.pc_data;
369 for (count = 0; count < trans->dbg.num_pc;
370 count++, pc_data++)
371 IWL_ERR(mvm, "%s: 0x%x\n",
372 pc_data->pc_name,
373 pc_data->pc_address);
374 } else if (trans->mac_cfg->device_family >=
375 IWL_DEVICE_FAMILY_9000) {
376 IWL_ERR(mvm, "UMAC PC: 0x%x\n",
377 iwl_read_umac_prph(trans,
378 UREG_UMAC_CURRENT_PC));
379 IWL_ERR(mvm, "LMAC PC: 0x%x\n",
380 iwl_read_umac_prph(trans,
381 UREG_LMAC1_CURRENT_PC));
382 if (iwl_mvm_is_cdb_supported(mvm))
383 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
384 iwl_read_umac_prph(trans,
385 UREG_LMAC2_CURRENT_PC));
386 }
387
388 if (ret == -ETIMEDOUT && !mvm->fw_product_reset)
389 iwl_fw_dbg_error_collect(&mvm->fwrt,
390 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
391
392 iwl_fw_set_current_image(&mvm->fwrt, old_type);
393 return ret;
394 }
395
396 if (!alive_data.valid) {
397 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
398 iwl_fw_set_current_image(&mvm->fwrt, old_type);
399 return -EIO;
400 }
401
402 /* if reached this point, Alive notification was received */
403 iwl_mei_alive_notif(true);
404
405 iwl_trans_fw_alive(mvm->trans);
406
407 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait,
408 mvm->fw, alive_data.sku_id);
409 if (ret) {
410 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
411 iwl_fw_set_current_image(&mvm->fwrt, old_type);
412 return ret;
413 }
414
415 /*
416 * Note: all the queues are enabled as part of the interface
417 * initialization, but in firmware restart scenarios they
418 * could be stopped, so wake them up. In firmware restart,
419 * mac80211 will have the queues stopped as well until the
420 * reconfiguration completes. During normal startup, they
421 * will be empty.
422 */
423
424 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
425 /*
426 * Set a 'fake' TID for the command queue, since we use the
427 * hweight() of the tid_bitmap as a refcount now. Not that
428 * we ever even consider the command queue as one we might
429 * want to reuse, but be safe nevertheless.
430 */
431 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
432 BIT(IWL_MAX_TID_COUNT + 2);
433
434 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
435 #ifdef CONFIG_IWLWIFI_DEBUGFS
436 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
437 #endif
438
439 /*
440 * For pre-MLD API (MLD API doesn't use the timestamps):
441 * All the BSSes in the BSS table include the GP2 in the system
442 * at the beacon Rx time, this is of course no longer relevant
443 * since we are resetting the firmware.
444 * Purge all the BSS table.
445 */
446 if (!mvm->mld_api_is_used)
447 cfg80211_bss_flush(mvm->hw->wiphy);
448
449 return 0;
450 }
451
iwl_mvm_phy_filter_init(struct iwl_mvm * mvm,struct iwl_phy_specific_cfg * phy_filters)452 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
453 struct iwl_phy_specific_cfg *phy_filters)
454 {
455 #ifdef CONFIG_ACPI
456 *phy_filters = mvm->fwrt.phy_filters;
457 #endif /* CONFIG_ACPI */
458 }
459
iwl_mvm_uats_init(struct iwl_mvm * mvm)460 static void iwl_mvm_uats_init(struct iwl_mvm *mvm)
461 {
462 u8 cmd_ver;
463 int ret;
464 struct iwl_host_cmd cmd = {
465 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
466 MCC_ALLOWED_AP_TYPE_CMD),
467 .flags = 0,
468 .data[0] = &mvm->fwrt.uats_table,
469 .len[0] = sizeof(mvm->fwrt.uats_table),
470 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
471 };
472
473 if (mvm->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_AX210 ||
474 !mvm->trans->cfg->uhb_supported) {
475 IWL_DEBUG_RADIO(mvm, "UATS feature is not supported\n");
476 return;
477 }
478
479 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
480 IWL_FW_CMD_VER_UNKNOWN);
481 if (cmd_ver != 1) {
482 IWL_DEBUG_RADIO(mvm,
483 "MCC_ALLOWED_AP_TYPE_CMD ver %d not supported\n",
484 cmd_ver);
485 return;
486 }
487
488 iwl_uefi_get_uats_table(mvm->trans, &mvm->fwrt);
489
490 if (!mvm->fwrt.uats_valid)
491 return;
492
493 ret = iwl_mvm_send_cmd(mvm, &cmd);
494 if (ret < 0)
495 IWL_ERR(mvm, "failed to send MCC_ALLOWED_AP_TYPE_CMD (%d)\n",
496 ret);
497 else
498 IWL_DEBUG_RADIO(mvm, "MCC_ALLOWED_AP_TYPE_CMD sent to FW\n");
499 }
500
iwl_mvm_sgom_init(struct iwl_mvm * mvm)501 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
502 {
503 u8 cmd_ver;
504 int ret;
505 struct iwl_host_cmd cmd = {
506 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
507 SAR_OFFSET_MAPPING_TABLE_CMD),
508 .flags = 0,
509 .data[0] = &mvm->fwrt.sgom_table,
510 .len[0] = sizeof(mvm->fwrt.sgom_table),
511 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
512 };
513
514 if (!mvm->fwrt.sgom_enabled) {
515 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
516 return 0;
517 }
518
519 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
520 IWL_FW_CMD_VER_UNKNOWN);
521
522 if (cmd_ver != 2) {
523 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
524 cmd_ver);
525 return 0;
526 }
527
528 ret = iwl_mvm_send_cmd(mvm, &cmd);
529 if (ret < 0)
530 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
531
532 return ret;
533 }
534
iwl_send_phy_cfg_cmd(struct iwl_mvm * mvm)535 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
536 {
537 u32 cmd_id = PHY_CONFIGURATION_CMD;
538 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
539 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
540 u8 cmd_ver;
541 size_t cmd_size;
542
543 if (iwl_mvm_has_unified_ucode(mvm) &&
544 !mvm->trans->cfg->tx_with_siso_diversity)
545 return 0;
546
547 if (mvm->trans->cfg->tx_with_siso_diversity) {
548 /*
549 * TODO: currently we don't set the antenna but letting the NIC
550 * to decide which antenna to use. This should come from BIOS.
551 */
552 phy_cfg_cmd.phy_cfg =
553 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
554 }
555
556 /* Set parameters */
557 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
558
559 /* set flags extra PHY configuration flags from the device's cfg */
560 phy_cfg_cmd.phy_cfg |=
561 cpu_to_le32(mvm->trans->mac_cfg->extra_phy_cfg_flags);
562
563 phy_cfg_cmd.calib_control.event_trigger =
564 mvm->fw->default_calib[ucode_type].event_trigger;
565 phy_cfg_cmd.calib_control.flow_trigger =
566 mvm->fw->default_calib[ucode_type].flow_trigger;
567
568 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
569 IWL_FW_CMD_VER_UNKNOWN);
570 if (cmd_ver >= 3)
571 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg);
572
573 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
574 phy_cfg_cmd.phy_cfg);
575 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
576 sizeof(struct iwl_phy_cfg_cmd_v1);
577 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd);
578 }
579
iwl_run_unified_mvm_ucode(struct iwl_mvm * mvm)580 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
581 {
582 struct iwl_notification_wait init_wait;
583 struct iwl_nvm_access_complete_cmd nvm_complete = {};
584 struct iwl_init_extended_cfg_cmd init_cfg = {
585 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
586 };
587 static const u16 init_complete[] = {
588 INIT_COMPLETE_NOTIF,
589 };
590 u32 sb_cfg;
591 int ret;
592
593 if (mvm->trans->cfg->tx_with_siso_diversity)
594 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
595
596 lockdep_assert_held(&mvm->mutex);
597
598 mvm->rfkill_safe_init_done = false;
599
600 if (mvm->trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
601 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG);
602 /* if needed, we'll reset this on our way out later */
603 mvm->fw_product_reset = sb_cfg == SB_CFG_RESIDES_IN_ROM;
604 if (mvm->fw_product_reset && iwl_mei_pldr_req())
605 return -EBUSY;
606 }
607
608 iwl_init_notification_wait(&mvm->notif_wait,
609 &init_wait,
610 init_complete,
611 ARRAY_SIZE(init_complete),
612 iwl_wait_init_complete,
613 NULL);
614
615 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
616
617 /* Will also start the device */
618 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
619 if (ret) {
620 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
621
622 /* if we needed reset then fail here, but notify and remove */
623 if (mvm->fw_product_reset) {
624 iwl_mei_alive_notif(false);
625 iwl_trans_pcie_reset(mvm->trans,
626 IWL_RESET_MODE_RESCAN);
627 }
628
629 goto error;
630 }
631 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
632 NULL);
633
634 /* Send init config command to mark that we are sending NVM access
635 * commands
636 */
637 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
638 INIT_EXTENDED_CFG_CMD),
639 CMD_SEND_IN_RFKILL,
640 sizeof(init_cfg), &init_cfg);
641 if (ret) {
642 IWL_ERR(mvm, "Failed to run init config command: %d\n",
643 ret);
644 goto error;
645 }
646
647 /* Load NVM to NIC if needed */
648 if (mvm->nvm_file_name) {
649 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
650 mvm->nvm_sections);
651 if (ret)
652 goto error;
653 ret = iwl_mvm_load_nvm_to_nic(mvm);
654 if (ret)
655 goto error;
656 }
657
658 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
659 NVM_ACCESS_COMPLETE),
660 CMD_SEND_IN_RFKILL,
661 sizeof(nvm_complete), &nvm_complete);
662 if (ret) {
663 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
664 ret);
665 goto error;
666 }
667
668 ret = iwl_send_phy_cfg_cmd(mvm);
669 if (ret) {
670 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n",
671 ret);
672 goto error;
673 }
674
675 /* We wait for the INIT complete notification */
676 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
677 MVM_UCODE_ALIVE_TIMEOUT);
678 if (ret)
679 return ret;
680
681 /* Read the NVM only at driver load time, no need to do this twice */
682 if (!mvm->nvm_data) {
683 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw,
684 mvm->set_tx_ant, mvm->set_rx_ant);
685 if (IS_ERR(mvm->nvm_data)) {
686 ret = PTR_ERR(mvm->nvm_data);
687 mvm->nvm_data = NULL;
688 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
689 return ret;
690 }
691 }
692
693 mvm->rfkill_safe_init_done = true;
694
695 return 0;
696
697 error:
698 iwl_remove_notification(&mvm->notif_wait, &init_wait);
699 return ret;
700 }
701
iwl_run_init_mvm_ucode(struct iwl_mvm * mvm)702 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
703 {
704 struct iwl_notification_wait calib_wait;
705 static const u16 init_complete[] = {
706 INIT_COMPLETE_NOTIF,
707 CALIB_RES_NOTIF_PHY_DB
708 };
709 int ret;
710
711 if (iwl_mvm_has_unified_ucode(mvm))
712 return iwl_run_unified_mvm_ucode(mvm);
713
714 lockdep_assert_held(&mvm->mutex);
715
716 mvm->rfkill_safe_init_done = false;
717
718 iwl_init_notification_wait(&mvm->notif_wait,
719 &calib_wait,
720 init_complete,
721 ARRAY_SIZE(init_complete),
722 iwl_wait_phy_db_entry,
723 mvm->phy_db);
724
725 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
726
727 /* Will also start the device */
728 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
729 if (ret) {
730 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
731 goto remove_notif;
732 }
733
734 if (mvm->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
735 ret = iwl_mvm_send_bt_init_conf(mvm);
736 if (ret)
737 goto remove_notif;
738 }
739
740 /* Read the NVM only at driver load time, no need to do this twice */
741 if (!mvm->nvm_data) {
742 ret = iwl_nvm_init(mvm);
743 if (ret) {
744 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
745 goto remove_notif;
746 }
747 }
748
749 /* In case we read the NVM from external file, load it to the NIC */
750 if (mvm->nvm_file_name) {
751 ret = iwl_mvm_load_nvm_to_nic(mvm);
752 if (ret)
753 goto remove_notif;
754 }
755
756 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
757 "Too old NVM version (0x%0x, required = 0x%0x)",
758 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
759
760 /*
761 * abort after reading the nvm in case RF Kill is on, we will complete
762 * the init seq later when RF kill will switch to off
763 */
764 if (iwl_mvm_is_radio_hw_killed(mvm)) {
765 IWL_DEBUG_RF_KILL(mvm,
766 "jump over all phy activities due to RF kill\n");
767 goto remove_notif;
768 }
769
770 mvm->rfkill_safe_init_done = true;
771
772 /* Send TX valid antennas before triggering calibrations */
773 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
774 if (ret)
775 goto remove_notif;
776
777 ret = iwl_send_phy_cfg_cmd(mvm);
778 if (ret) {
779 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
780 ret);
781 goto remove_notif;
782 }
783
784 /*
785 * Some things may run in the background now, but we
786 * just wait for the calibration complete notification.
787 */
788 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
789 MVM_UCODE_CALIB_TIMEOUT);
790 if (!ret)
791 goto out;
792
793 if (iwl_mvm_is_radio_hw_killed(mvm)) {
794 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
795 ret = 0;
796 } else {
797 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
798 ret);
799 }
800
801 goto out;
802
803 remove_notif:
804 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
805 out:
806 mvm->rfkill_safe_init_done = false;
807 if (!mvm->nvm_data) {
808 /* we want to debug INIT and we have no NVM - fake */
809 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
810 sizeof(struct ieee80211_channel) +
811 sizeof(struct ieee80211_rate),
812 GFP_KERNEL);
813 if (!mvm->nvm_data)
814 return -ENOMEM;
815 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
816 mvm->nvm_data->bands[0].n_channels = 1;
817 mvm->nvm_data->bands[0].n_bitrates = 1;
818 mvm->nvm_data->bands[0].bitrates =
819 (void *)(mvm->nvm_data->channels + 1);
820 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
821 }
822
823 return ret;
824 }
825
iwl_mvm_config_ltr(struct iwl_mvm * mvm)826 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
827 {
828 struct iwl_ltr_config_cmd cmd = {
829 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
830 };
831
832 if (!iwl_trans_is_ltr_enabled(mvm->trans))
833 return 0;
834
835 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
836 sizeof(cmd), &cmd);
837 }
838
iwl_mvm_sar_select_profile(struct iwl_mvm * mvm,int prof_a,int prof_b)839 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
840 {
841 u32 cmd_id = REDUCE_TX_POWER_CMD;
842 struct iwl_dev_tx_power_cmd_v3_v8 cmd = {
843 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
844 };
845 struct iwl_dev_tx_power_cmd cmd_v9_v10 = {
846 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
847 };
848 __le16 *per_chain;
849 int ret;
850 u16 len = 0;
851 u32 n_subbands;
852 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 3);
853 void *cmd_data = &cmd;
854
855 if (cmd_ver == 10) {
856 len = sizeof(cmd_v9_v10.v10);
857 n_subbands = IWL_NUM_SUB_BANDS_V2;
858 per_chain = &cmd_v9_v10.v10.per_chain[0][0][0];
859 cmd_v9_v10.v10.flags =
860 cpu_to_le32(mvm->fwrt.reduced_power_flags);
861 } else if (cmd_ver == 9) {
862 len = sizeof(cmd_v9_v10.v9);
863 n_subbands = IWL_NUM_SUB_BANDS_V1;
864 per_chain = &cmd_v9_v10.v9.per_chain[0][0];
865 } else if (cmd_ver == 8) {
866 len = sizeof(cmd.v8);
867 n_subbands = IWL_NUM_SUB_BANDS_V2;
868 per_chain = cmd.v8.per_chain[0][0];
869 cmd.v8.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
870 } else if (fw_has_api(&mvm->fw->ucode_capa,
871 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
872 len = sizeof(cmd.v5);
873 n_subbands = IWL_NUM_SUB_BANDS_V1;
874 per_chain = cmd.v5.per_chain[0][0];
875 } else if (fw_has_capa(&mvm->fw->ucode_capa,
876 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
877 len = sizeof(cmd.v4);
878 n_subbands = IWL_NUM_SUB_BANDS_V1;
879 per_chain = cmd.v4.per_chain[0][0];
880 } else {
881 len = sizeof(cmd.v3);
882 n_subbands = IWL_NUM_SUB_BANDS_V1;
883 per_chain = cmd.v3.per_chain[0][0];
884 }
885
886 /* all structs have the same common part, add its length */
887 len += sizeof(cmd.common);
888
889 if (cmd_ver < 9)
890 len += sizeof(cmd.per_band);
891 else
892 cmd_data = &cmd_v9_v10;
893
894 ret = iwl_sar_fill_profile(&mvm->fwrt, per_chain,
895 IWL_NUM_CHAIN_TABLES,
896 n_subbands, prof_a, prof_b);
897
898 /* return on error or if the profile is disabled (positive number) */
899 if (ret)
900 return ret;
901
902 iwl_mei_set_power_limit(per_chain);
903
904 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
905 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, cmd_data);
906 }
907
iwl_mvm_get_sar_geo_profile(struct iwl_mvm * mvm)908 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
909 {
910 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
911 struct iwl_geo_tx_power_profiles_resp *resp;
912 u16 len;
913 int ret;
914 struct iwl_host_cmd cmd = {
915 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
916 .flags = CMD_WANT_SKB,
917 .data = { &geo_tx_cmd },
918 };
919 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
920 IWL_FW_CMD_VER_UNKNOWN);
921
922 /* the ops field is at the same spot for all versions, so set in v1 */
923 geo_tx_cmd.v1.ops =
924 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
925
926 if (cmd_ver == 5)
927 len = sizeof(geo_tx_cmd.v5);
928 else if (cmd_ver == 4)
929 len = sizeof(geo_tx_cmd.v4);
930 else if (cmd_ver == 3)
931 len = sizeof(geo_tx_cmd.v3);
932 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
933 IWL_UCODE_TLV_API_SAR_TABLE_VER))
934 len = sizeof(geo_tx_cmd.v2);
935 else
936 len = sizeof(geo_tx_cmd.v1);
937
938 if (!iwl_sar_geo_support(&mvm->fwrt))
939 return -EOPNOTSUPP;
940
941 cmd.len[0] = len;
942
943 ret = iwl_mvm_send_cmd(mvm, &cmd);
944 if (ret) {
945 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
946 return ret;
947 }
948
949 resp = (void *)cmd.resp_pkt->data;
950 ret = le32_to_cpu(resp->profile_idx);
951
952 if (WARN_ON(ret > BIOS_GEO_MAX_PROFILE_NUM))
953 ret = -EIO;
954
955 iwl_free_resp(&cmd);
956 return ret;
957 }
958
iwl_mvm_sar_geo_init(struct iwl_mvm * mvm)959 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
960 {
961 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
962 union iwl_geo_tx_power_profiles_cmd cmd;
963 u16 len;
964 u32 n_bands;
965 u32 n_profiles;
966 __le32 sk = cpu_to_le32(0);
967 int ret;
968 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
969 IWL_FW_CMD_VER_UNKNOWN);
970
971 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
972 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
973 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
974 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
975 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
976 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
977 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
978 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
979
980 /* the ops field is at the same spot for all versions, so set in v1 */
981 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
982
983 /* Only set to South Korea if the table revision is 1 */
984 if (mvm->fwrt.geo_rev == 1)
985 sk = cpu_to_le32(1);
986
987 if (cmd_ver == 5) {
988 len = sizeof(cmd.v5);
989 n_bands = ARRAY_SIZE(cmd.v5.table[0]);
990 n_profiles = BIOS_GEO_MAX_PROFILE_NUM;
991 cmd.v5.table_revision = sk;
992 } else if (cmd_ver == 4) {
993 len = sizeof(cmd.v4);
994 n_bands = ARRAY_SIZE(cmd.v4.table[0]);
995 n_profiles = BIOS_GEO_MAX_PROFILE_NUM;
996 cmd.v4.table_revision = sk;
997 } else if (cmd_ver == 3) {
998 len = sizeof(cmd.v3);
999 n_bands = ARRAY_SIZE(cmd.v3.table[0]);
1000 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1001 cmd.v3.table_revision = sk;
1002 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
1003 IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
1004 len = sizeof(cmd.v2);
1005 n_bands = ARRAY_SIZE(cmd.v2.table[0]);
1006 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1007 cmd.v2.table_revision = sk;
1008 } else {
1009 len = sizeof(cmd.v1);
1010 n_bands = ARRAY_SIZE(cmd.v1.table[0]);
1011 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1012 }
1013
1014 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
1015 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
1016 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
1017 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
1018 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
1019 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
1020 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
1021 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
1022 /* the table is at the same position for all versions, so set use v1 */
1023 ret = iwl_sar_geo_fill_table(&mvm->fwrt, &cmd.v1.table[0][0],
1024 n_bands, n_profiles);
1025
1026 /*
1027 * It is a valid scenario to not support SAR, or miss wgds table,
1028 * but in that case there is no need to send the command.
1029 */
1030 if (ret)
1031 return 0;
1032
1033 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
1034 }
1035
iwl_mvm_ppag_send_cmd(struct iwl_mvm * mvm)1036 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1037 {
1038 union iwl_ppag_table_cmd cmd;
1039 int ret, cmd_size;
1040
1041 ret = iwl_fill_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
1042 /* Not supporting PPAG table is a valid scenario */
1043 if (ret < 0)
1044 return 0;
1045
1046 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1047 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1048 PER_PLATFORM_ANT_GAIN_CMD),
1049 0, cmd_size, &cmd);
1050 if (ret < 0)
1051 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1052 ret);
1053
1054 return ret;
1055 }
1056
iwl_mvm_ppag_init(struct iwl_mvm * mvm)1057 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1058 {
1059 /* no need to read the table, done in INIT stage */
1060 if (!(iwl_is_ppag_approved(&mvm->fwrt)))
1061 return 0;
1062
1063 return iwl_mvm_ppag_send_cmd(mvm);
1064 }
1065
iwl_mvm_tas_init(struct iwl_mvm * mvm)1066 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1067 {
1068 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
1069 int fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1070 IWL_FW_CMD_VER_UNKNOWN);
1071 struct iwl_tas_selection_data selection_data = {};
1072 struct iwl_tas_config_cmd_v2_v4 cmd_v2_v4 = {};
1073 struct iwl_tas_config_cmd cmd_v5 = {};
1074 struct iwl_tas_data data = {};
1075 void *cmd_data = &cmd_v2_v4;
1076 int cmd_size;
1077 int ret;
1078
1079 BUILD_BUG_ON(ARRAY_SIZE(data.block_list_array) !=
1080 IWL_WTAS_BLACK_LIST_MAX);
1081 BUILD_BUG_ON(ARRAY_SIZE(cmd_v2_v4.common.block_list_array) !=
1082 IWL_WTAS_BLACK_LIST_MAX);
1083 BUILD_BUG_ON(ARRAY_SIZE(cmd_v5.block_list_array) !=
1084 IWL_WTAS_BLACK_LIST_MAX);
1085
1086 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1087 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1088 return;
1089 }
1090
1091 ret = iwl_bios_get_tas_table(&mvm->fwrt, &data);
1092 if (ret < 0) {
1093 IWL_DEBUG_RADIO(mvm,
1094 "TAS table invalid or unavailable. (%d)\n",
1095 ret);
1096 return;
1097 }
1098
1099 if (ret == 0 && fw_ver < 5)
1100 return;
1101
1102 if (!iwl_is_tas_approved()) {
1103 IWL_DEBUG_RADIO(mvm,
1104 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1105 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
1106 if ((!iwl_add_mcc_to_tas_block_list(data.block_list_array,
1107 &data.block_list_size,
1108 IWL_MCC_US)) ||
1109 (!iwl_add_mcc_to_tas_block_list(data.block_list_array,
1110 &data.block_list_size,
1111 IWL_MCC_CANADA))) {
1112 IWL_DEBUG_RADIO(mvm,
1113 "Unable to add US/Canada to TAS block list, disabling TAS\n");
1114 return;
1115 }
1116 } else {
1117 IWL_DEBUG_RADIO(mvm,
1118 "System vendor '%s' is in the approved list.\n",
1119 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
1120 }
1121
1122 if (fw_ver < 5) {
1123 selection_data = iwl_parse_tas_selection(data.tas_selection,
1124 data.table_revision);
1125 cmd_v2_v4.common.block_list_size =
1126 cpu_to_le32(data.block_list_size);
1127 for (u8 i = 0; i < data.block_list_size; i++)
1128 cmd_v2_v4.common.block_list_array[i] =
1129 cpu_to_le32(data.block_list_array[i]);
1130 }
1131
1132 if (fw_ver == 5) {
1133 cmd_size = sizeof(cmd_v5);
1134 cmd_data = &cmd_v5;
1135 cmd_v5.block_list_size = cpu_to_le16(data.block_list_size);
1136 for (u16 i = 0; i < data.block_list_size; i++)
1137 cmd_v5.block_list_array[i] =
1138 cpu_to_le16(data.block_list_array[i]);
1139 cmd_v5.tas_config_info.hdr.table_source = data.table_source;
1140 cmd_v5.tas_config_info.hdr.table_revision =
1141 data.table_revision;
1142 cmd_v5.tas_config_info.value = cpu_to_le32(data.tas_selection);
1143 } else if (fw_ver == 4) {
1144 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v4);
1145 cmd_v2_v4.v4.override_tas_iec = selection_data.override_tas_iec;
1146 cmd_v2_v4.v4.enable_tas_iec = selection_data.enable_tas_iec;
1147 cmd_v2_v4.v4.usa_tas_uhb_allowed =
1148 selection_data.usa_tas_uhb_allowed;
1149 if (fw_has_capa(&mvm->fw->ucode_capa,
1150 IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT) &&
1151 selection_data.canada_tas_uhb_allowed)
1152 cmd_v2_v4.v4.uhb_allowed_flags = TAS_UHB_ALLOWED_CANADA;
1153 } else if (fw_ver == 3) {
1154 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v3);
1155 cmd_v2_v4.v3.override_tas_iec =
1156 cpu_to_le16(selection_data.override_tas_iec);
1157 cmd_v2_v4.v3.enable_tas_iec =
1158 cpu_to_le16(selection_data.enable_tas_iec);
1159 } else if (fw_ver == 2) {
1160 cmd_size = sizeof(cmd_v2_v4.common);
1161 } else {
1162 return;
1163 }
1164
1165 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, cmd_data);
1166 if (ret < 0)
1167 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1168 }
1169
iwl_mvm_get_lari_config_bitmap(struct iwl_fw_runtime * fwrt)1170 static __le32 iwl_mvm_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt)
1171 {
1172 int ret;
1173 u32 val;
1174 __le32 config_bitmap = 0;
1175
1176 switch (CSR_HW_RFID_TYPE(fwrt->trans->info.hw_rf_id)) {
1177 case IWL_CFG_RF_TYPE_HR1:
1178 case IWL_CFG_RF_TYPE_HR2:
1179 case IWL_CFG_RF_TYPE_JF1:
1180 case IWL_CFG_RF_TYPE_JF2:
1181 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_INDONESIA_5G2,
1182 &val);
1183
1184 if (!ret && val == DSM_VALUE_INDONESIA_ENABLE)
1185 config_bitmap |=
1186 cpu_to_le32(LARI_CONFIG_ENABLE_5G2_IN_INDONESIA_MSK);
1187 break;
1188 default:
1189 break;
1190 }
1191
1192 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_DISABLE_SRD, &val);
1193 if (!ret) {
1194 if (val == DSM_VALUE_SRD_PASSIVE)
1195 config_bitmap |=
1196 cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_PASSIVE_MSK);
1197 else if (val == DSM_VALUE_SRD_DISABLE)
1198 config_bitmap |=
1199 cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_DISABLED_MSK);
1200 }
1201
1202 if (fw_has_capa(&fwrt->fw->ucode_capa,
1203 IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT)) {
1204 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_REGULATORY_CONFIG,
1205 &val);
1206 /*
1207 * China 2022 enable if the BIOS object does not exist or
1208 * if it is enabled in BIOS.
1209 */
1210 if (ret < 0 || val & DSM_MASK_CHINA_22_REG)
1211 config_bitmap |=
1212 cpu_to_le32(LARI_CONFIG_ENABLE_CHINA_22_REG_SUPPORT_MSK);
1213 }
1214
1215 return config_bitmap;
1216 }
1217
iwl_mvm_get_lari_config_cmd_size(u8 cmd_ver)1218 static size_t iwl_mvm_get_lari_config_cmd_size(u8 cmd_ver)
1219 {
1220 size_t cmd_size;
1221
1222 switch (cmd_ver) {
1223 case 12:
1224 cmd_size = offsetof(struct iwl_lari_config_change_cmd,
1225 oem_11bn_allow_bitmap);
1226 break;
1227 case 8:
1228 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v8);
1229 break;
1230 case 6:
1231 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6);
1232 break;
1233 default:
1234 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
1235 break;
1236 }
1237 return cmd_size;
1238 }
1239
iwl_mvm_fill_lari_config(struct iwl_fw_runtime * fwrt,struct iwl_lari_config_change_cmd * cmd,size_t * cmd_size)1240 static int iwl_mvm_fill_lari_config(struct iwl_fw_runtime *fwrt,
1241 struct iwl_lari_config_change_cmd *cmd,
1242 size_t *cmd_size)
1243 {
1244 int ret;
1245 u32 value;
1246 bool has_raw_dsm_capa = fw_has_capa(&fwrt->fw->ucode_capa,
1247 IWL_UCODE_TLV_CAPA_FW_ACCEPTS_RAW_DSM_TABLE);
1248 u8 cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw,
1249 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1250 LARI_CONFIG_CHANGE), 1);
1251
1252 memset(cmd, 0, sizeof(*cmd));
1253 *cmd_size = iwl_mvm_get_lari_config_cmd_size(cmd_ver);
1254
1255 cmd->config_bitmap = iwl_mvm_get_lari_config_bitmap(fwrt);
1256
1257 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_11AX_ENABLEMENT, &value);
1258 if (!ret) {
1259 if (!has_raw_dsm_capa)
1260 value &= DSM_11AX_ALLOW_BITMAP;
1261 cmd->oem_11ax_allow_bitmap = cpu_to_le32(value);
1262 }
1263
1264 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_UNII4_CHAN, &value);
1265 if (!ret) {
1266 if (!has_raw_dsm_capa)
1267 value &= DSM_UNII4_ALLOW_BITMAP;
1268
1269 /* Since version 12, bits 4 and 5 are supported
1270 * regardless of this capability, By pass this masking
1271 * if firmware has capability of accepting raw DSM table.
1272 */
1273 if (!has_raw_dsm_capa && cmd_ver < 12 &&
1274 !fw_has_capa(&fwrt->fw->ucode_capa,
1275 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA))
1276 value &= ~(DSM_VALUE_UNII4_CANADA_OVERRIDE_MSK |
1277 DSM_VALUE_UNII4_CANADA_EN_MSK);
1278
1279 cmd->oem_unii4_allow_bitmap = cpu_to_le32(value);
1280 }
1281
1282 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ACTIVATE_CHANNEL, &value);
1283 if (!ret) {
1284 if (!has_raw_dsm_capa)
1285 value &= CHAN_STATE_ACTIVE_BITMAP_CMD_V12;
1286
1287 if (!has_raw_dsm_capa && cmd_ver < 8)
1288 value &= ~ACTIVATE_5G2_IN_WW_MASK;
1289
1290 /* Since version 12, bits 5 and 6 are supported
1291 * regardless of this capability, By pass this masking
1292 * if firmware has capability of accepting raw DSM table.
1293 */
1294 if (!has_raw_dsm_capa && cmd_ver < 12 &&
1295 !fw_has_capa(&fwrt->fw->ucode_capa,
1296 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA))
1297 value &= CHAN_STATE_ACTIVE_BITMAP_CMD_V8;
1298
1299 cmd->chan_state_active_bitmap = cpu_to_le32(value);
1300 }
1301
1302 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_6E, &value);
1303 if (!ret)
1304 cmd->oem_uhb_allow_bitmap = cpu_to_le32(value);
1305
1306 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_FORCE_DISABLE_CHANNELS, &value);
1307 if (!ret) {
1308 if (!has_raw_dsm_capa)
1309 value &= DSM_FORCE_DISABLE_CHANNELS_ALLOWED_BITMAP;
1310 cmd->force_disable_channels_bitmap = cpu_to_le32(value);
1311 }
1312
1313 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENERGY_DETECTION_THRESHOLD,
1314 &value);
1315 if (!ret) {
1316 if (!has_raw_dsm_capa)
1317 value &= DSM_EDT_ALLOWED_BITMAP;
1318 cmd->edt_bitmap = cpu_to_le32(value);
1319 }
1320
1321 ret = iwl_bios_get_wbem(fwrt, &value);
1322 if (!ret)
1323 cmd->oem_320mhz_allow_bitmap = cpu_to_le32(value);
1324
1325 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_11BE, &value);
1326 if (!ret)
1327 cmd->oem_11be_allow_bitmap = cpu_to_le32(value);
1328
1329 if (cmd->config_bitmap ||
1330 cmd->oem_uhb_allow_bitmap ||
1331 cmd->oem_11ax_allow_bitmap ||
1332 cmd->oem_unii4_allow_bitmap ||
1333 cmd->chan_state_active_bitmap ||
1334 cmd->force_disable_channels_bitmap ||
1335 cmd->edt_bitmap ||
1336 cmd->oem_320mhz_allow_bitmap ||
1337 cmd->oem_11be_allow_bitmap) {
1338 IWL_DEBUG_RADIO(fwrt,
1339 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
1340 le32_to_cpu(cmd->config_bitmap),
1341 le32_to_cpu(cmd->oem_11ax_allow_bitmap));
1342 IWL_DEBUG_RADIO(fwrt,
1343 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
1344 le32_to_cpu(cmd->oem_unii4_allow_bitmap),
1345 le32_to_cpu(cmd->chan_state_active_bitmap),
1346 cmd_ver);
1347 IWL_DEBUG_RADIO(fwrt,
1348 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n",
1349 le32_to_cpu(cmd->oem_uhb_allow_bitmap),
1350 le32_to_cpu(cmd->force_disable_channels_bitmap));
1351 IWL_DEBUG_RADIO(fwrt,
1352 "sending LARI_CONFIG_CHANGE, edt_bitmap=0x%x, oem_320mhz_allow_bitmap=0x%x\n",
1353 le32_to_cpu(cmd->edt_bitmap),
1354 le32_to_cpu(cmd->oem_320mhz_allow_bitmap));
1355 IWL_DEBUG_RADIO(fwrt,
1356 "sending LARI_CONFIG_CHANGE, oem_11be_allow_bitmap=0x%x\n",
1357 le32_to_cpu(cmd->oem_11be_allow_bitmap));
1358 } else {
1359 return 1;
1360 }
1361
1362 return 0;
1363 }
1364
iwl_mvm_lari_cfg(struct iwl_mvm * mvm)1365 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1366 {
1367 struct iwl_lari_config_change_cmd cmd;
1368 size_t cmd_size;
1369 int ret;
1370
1371 ret = iwl_mvm_fill_lari_config(&mvm->fwrt, &cmd, &cmd_size);
1372 if (!ret) {
1373 ret = iwl_mvm_send_cmd_pdu(mvm,
1374 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1375 LARI_CONFIG_CHANGE),
1376 0, cmd_size, &cmd);
1377 if (ret < 0)
1378 IWL_DEBUG_RADIO(mvm,
1379 "Failed to send LARI_CONFIG_CHANGE (%d)\n",
1380 ret);
1381 }
1382 }
1383
iwl_mvm_get_bios_tables(struct iwl_mvm * mvm)1384 void iwl_mvm_get_bios_tables(struct iwl_mvm *mvm)
1385 {
1386 int ret;
1387
1388 iwl_acpi_get_guid_lock_status(&mvm->fwrt);
1389
1390 /* read PPAG table */
1391 ret = iwl_bios_get_ppag_table(&mvm->fwrt);
1392 if (ret < 0) {
1393 IWL_DEBUG_RADIO(mvm,
1394 "PPAG BIOS table invalid or unavailable. (%d)\n",
1395 ret);
1396 }
1397
1398 /* read SAR tables */
1399 ret = iwl_bios_get_wrds_table(&mvm->fwrt);
1400 if (ret < 0) {
1401 IWL_DEBUG_RADIO(mvm,
1402 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1403 ret);
1404 /*
1405 * If not available, don't fail and don't bother with EWRD and
1406 * WGDS */
1407
1408 if (!iwl_bios_get_wgds_table(&mvm->fwrt)) {
1409 /*
1410 * If basic SAR is not available, we check for WGDS,
1411 * which should *not* be available either. If it is
1412 * available, issue an error, because we can't use SAR
1413 * Geo without basic SAR.
1414 */
1415 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1416 }
1417
1418 } else {
1419 ret = iwl_bios_get_ewrd_table(&mvm->fwrt);
1420 /* if EWRD is not available, we can still use
1421 * WRDS, so don't fail */
1422 if (ret < 0)
1423 IWL_DEBUG_RADIO(mvm,
1424 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1425 ret);
1426
1427 /* read geo SAR table */
1428 if (iwl_sar_geo_support(&mvm->fwrt)) {
1429 ret = iwl_bios_get_wgds_table(&mvm->fwrt);
1430 if (ret < 0)
1431 IWL_DEBUG_RADIO(mvm,
1432 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
1433 ret);
1434 /* we don't fail if the table is not available */
1435 }
1436 }
1437
1438 iwl_acpi_get_phy_filters(&mvm->fwrt);
1439
1440 if (iwl_bios_get_eckv(&mvm->fwrt, &mvm->ext_clock_valid))
1441 IWL_DEBUG_RADIO(mvm, "ECKV table doesn't exist in BIOS\n");
1442 }
1443
iwl_mvm_disconnect_iterator(void * data,u8 * mac,struct ieee80211_vif * vif)1444 static void iwl_mvm_disconnect_iterator(void *data, u8 *mac,
1445 struct ieee80211_vif *vif)
1446 {
1447 if (vif->type == NL80211_IFTYPE_STATION)
1448 ieee80211_hw_restart_disconnect(vif);
1449 }
1450
iwl_mvm_send_recovery_cmd(struct iwl_mvm * mvm,u32 flags)1451 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1452 {
1453 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1454 u32 status = 0;
1455 int ret;
1456
1457 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1458 .flags = cpu_to_le32(flags),
1459 .buf_size = 0,
1460 };
1461 struct iwl_host_cmd host_cmd = {
1462 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1463 .data = {&recovery_cmd, },
1464 .len = {sizeof(recovery_cmd), },
1465 };
1466
1467 /* no error log was defined in TLV */
1468 if (!error_log_size)
1469 return;
1470
1471 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1472 /* no buf was allocated while HW reset */
1473 if (!mvm->error_recovery_buf)
1474 return;
1475
1476 host_cmd.data[1] = mvm->error_recovery_buf;
1477 host_cmd.len[1] = error_log_size;
1478 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1479 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1480 }
1481
1482 ret = iwl_mvm_send_cmd_status(mvm, &host_cmd, &status);
1483 kfree(mvm->error_recovery_buf);
1484 mvm->error_recovery_buf = NULL;
1485
1486 if (ret) {
1487 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1488 return;
1489 }
1490
1491 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1492 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1493 if (status) {
1494 IWL_ERR(mvm,
1495 "Failed to send recovery cmd blob was invalid %d\n",
1496 status);
1497
1498 ieee80211_iterate_interfaces(mvm->hw, 0,
1499 iwl_mvm_disconnect_iterator,
1500 mvm);
1501 }
1502 }
1503 }
1504
iwl_mvm_sar_init(struct iwl_mvm * mvm)1505 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1506 {
1507 return iwl_mvm_sar_select_profile(mvm, 1, 1);
1508 }
1509
iwl_mvm_load_rt_fw(struct iwl_mvm * mvm)1510 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1511 {
1512 int ret;
1513
1514 if (iwl_mvm_has_unified_ucode(mvm))
1515 return iwl_run_unified_mvm_ucode(mvm);
1516
1517 ret = iwl_run_init_mvm_ucode(mvm);
1518
1519 if (ret) {
1520 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1521 return ret;
1522 }
1523
1524 iwl_fw_dbg_stop_sync(&mvm->fwrt);
1525 iwl_trans_stop_device(mvm->trans);
1526 ret = iwl_trans_start_hw(mvm->trans);
1527 if (ret)
1528 return ret;
1529
1530 mvm->rfkill_safe_init_done = false;
1531 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1532 if (ret)
1533 return ret;
1534
1535 mvm->rfkill_safe_init_done = true;
1536
1537 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1538 NULL);
1539
1540 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1541 }
1542
iwl_mvm_up(struct iwl_mvm * mvm)1543 int iwl_mvm_up(struct iwl_mvm *mvm)
1544 {
1545 int ret, i;
1546 struct ieee80211_supported_band *sband = NULL;
1547
1548 lockdep_assert_wiphy(mvm->hw->wiphy);
1549 lockdep_assert_held(&mvm->mutex);
1550
1551 ret = iwl_trans_start_hw(mvm->trans);
1552 if (ret)
1553 return ret;
1554
1555 ret = iwl_mvm_load_rt_fw(mvm);
1556 if (ret) {
1557 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1558 if (ret != -ERFKILL && !mvm->fw_product_reset)
1559 iwl_fw_dbg_error_collect(&mvm->fwrt,
1560 FW_DBG_TRIGGER_DRIVER);
1561 goto error;
1562 }
1563
1564 /* FW loaded successfully */
1565 mvm->fw_product_reset = false;
1566
1567 iwl_fw_disable_dbg_asserts(&mvm->fwrt);
1568 iwl_get_shared_mem_conf(&mvm->fwrt);
1569
1570 ret = iwl_mvm_sf_update(mvm, NULL, false);
1571 if (ret)
1572 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1573
1574 if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1575 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1576 /* if we have a destination, assume EARLY START */
1577 if (mvm->fw->dbg.dest_tlv)
1578 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1579 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1580 }
1581
1582 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1583 if (ret)
1584 goto error;
1585
1586 if (!iwl_mvm_has_unified_ucode(mvm)) {
1587 /* Send phy db control command and then phy db calibration */
1588 ret = iwl_send_phy_db_data(mvm->phy_db);
1589 if (ret)
1590 goto error;
1591 ret = iwl_send_phy_cfg_cmd(mvm);
1592 if (ret)
1593 goto error;
1594 }
1595
1596 ret = iwl_mvm_send_bt_init_conf(mvm);
1597 if (ret)
1598 goto error;
1599
1600 if (fw_has_capa(&mvm->fw->ucode_capa,
1601 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1602 ret = iwl_set_soc_latency(&mvm->fwrt);
1603 if (ret)
1604 goto error;
1605 }
1606
1607 iwl_mvm_lari_cfg(mvm);
1608
1609 /* Init RSS configuration */
1610 ret = iwl_configure_rxq(&mvm->fwrt);
1611 if (ret)
1612 goto error;
1613
1614 if (iwl_mvm_has_new_rx_api(mvm)) {
1615 ret = iwl_send_rss_cfg_cmd(mvm);
1616 if (ret) {
1617 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1618 ret);
1619 goto error;
1620 }
1621 }
1622
1623 /* init the fw <-> mac80211 STA mapping */
1624 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1625 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1626 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1627 }
1628
1629 mvm->tdls_cs.peer.sta_id = IWL_INVALID_STA;
1630
1631 /* reset quota debouncing buffer - 0xff will yield invalid data */
1632 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1633
1634 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1635 ret = iwl_mvm_send_dqa_cmd(mvm);
1636 if (ret)
1637 goto error;
1638 }
1639
1640 /*
1641 * Add auxiliary station for scanning.
1642 * Newer versions of this command implies that the fw uses
1643 * internal aux station for all aux activities that don't
1644 * requires a dedicated data queue.
1645 */
1646 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1647 /*
1648 * In old version the aux station uses mac id like other
1649 * station and not lmac id
1650 */
1651 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1652 if (ret)
1653 goto error;
1654 }
1655
1656 /* Add all the PHY contexts */
1657 i = 0;
1658 while (!sband && i < NUM_NL80211_BANDS)
1659 sband = mvm->hw->wiphy->bands[i++];
1660
1661 if (WARN_ON_ONCE(!sband)) {
1662 ret = -ENODEV;
1663 goto error;
1664 }
1665
1666 if (iwl_mvm_is_tt_in_fw(mvm)) {
1667 /* in order to give the responsibility of ct-kill and
1668 * TX backoff to FW we need to send empty temperature reporting
1669 * cmd during init time
1670 */
1671 iwl_mvm_send_temp_report_ths_cmd(mvm);
1672 } else {
1673 /* Initialize tx backoffs to the minimal possible */
1674 iwl_mvm_tt_tx_backoff(mvm, 0);
1675 }
1676
1677 #ifdef CONFIG_THERMAL
1678 /* TODO: read the budget from BIOS / Platform NVM */
1679
1680 /*
1681 * In case there is no budget from BIOS / Platform NVM the default
1682 * budget should be 2000mW (cooling state 0).
1683 */
1684 if (iwl_mvm_is_ctdp_supported(mvm)) {
1685 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1686 mvm->cooling_dev.cur_state);
1687 if (ret)
1688 goto error;
1689 }
1690 #endif
1691
1692 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1693 WARN_ON(iwl_mvm_config_ltr(mvm));
1694
1695 ret = iwl_mvm_power_update_device(mvm);
1696 if (ret)
1697 goto error;
1698
1699 /*
1700 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1701 * anyway, so don't init MCC.
1702 */
1703 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1704 ret = iwl_mvm_init_mcc(mvm);
1705 if (ret)
1706 goto error;
1707 }
1708
1709 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1710 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1711 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1712 ret = iwl_mvm_config_scan(mvm);
1713 if (ret)
1714 goto error;
1715 }
1716
1717 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
1718 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1719
1720 if (mvm->time_sync.active)
1721 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr,
1722 IWL_TIME_SYNC_PROTOCOL_TM |
1723 IWL_TIME_SYNC_PROTOCOL_FTM);
1724 }
1725
1726 if (!mvm->ptp_data.ptp_clock)
1727 iwl_mvm_ptp_init(mvm);
1728
1729 ret = iwl_mvm_ppag_init(mvm);
1730 if (ret)
1731 goto error;
1732
1733 ret = iwl_mvm_sar_init(mvm);
1734 if (ret == 0)
1735 ret = iwl_mvm_sar_geo_init(mvm);
1736 if (ret < 0)
1737 goto error;
1738
1739 ret = iwl_mvm_sgom_init(mvm);
1740 if (ret)
1741 goto error;
1742
1743 iwl_mvm_tas_init(mvm);
1744 iwl_mvm_leds_sync(mvm);
1745 iwl_mvm_uats_init(mvm);
1746
1747 if (iwl_rfi_supported(mvm)) {
1748 if (iwl_rfi_is_enabled_in_bios(&mvm->fwrt))
1749 iwl_rfi_send_config_cmd(mvm, NULL);
1750 }
1751
1752 iwl_mvm_mei_device_state(mvm, true);
1753
1754 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1755 return 0;
1756 error:
1757 iwl_mvm_stop_device(mvm);
1758 return ret;
1759 }
1760
iwl_mvm_load_d3_fw(struct iwl_mvm * mvm)1761 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1762 {
1763 int ret, i;
1764
1765 lockdep_assert_wiphy(mvm->hw->wiphy);
1766 lockdep_assert_held(&mvm->mutex);
1767
1768 ret = iwl_trans_start_hw(mvm->trans);
1769 if (ret)
1770 return ret;
1771
1772 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1773 if (ret) {
1774 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1775 goto error;
1776 }
1777
1778 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1779 if (ret)
1780 goto error;
1781
1782 /* Send phy db control command and then phy db calibration*/
1783 ret = iwl_send_phy_db_data(mvm->phy_db);
1784 if (ret)
1785 goto error;
1786
1787 ret = iwl_send_phy_cfg_cmd(mvm);
1788 if (ret)
1789 goto error;
1790
1791 /* init the fw <-> mac80211 STA mapping */
1792 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1793 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1794 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1795 }
1796
1797 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1798 /*
1799 * Add auxiliary station for scanning.
1800 * Newer versions of this command implies that the fw uses
1801 * internal aux station for all aux activities that don't
1802 * requires a dedicated data queue.
1803 * In old version the aux station uses mac id like other
1804 * station and not lmac id
1805 */
1806 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1807 if (ret)
1808 goto error;
1809 }
1810
1811 return 0;
1812 error:
1813 iwl_mvm_stop_device(mvm);
1814 return ret;
1815 }
1816
iwl_mvm_rx_mfuart_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)1817 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1818 struct iwl_rx_cmd_buffer *rxb)
1819 {
1820 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1821 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1822
1823 IWL_DEBUG_INFO(mvm,
1824 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1825 le32_to_cpu(mfuart_notif->installed_ver),
1826 le32_to_cpu(mfuart_notif->external_ver),
1827 le32_to_cpu(mfuart_notif->status),
1828 le32_to_cpu(mfuart_notif->duration));
1829
1830 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1831 IWL_DEBUG_INFO(mvm,
1832 "MFUART: image size: 0x%08x\n",
1833 le32_to_cpu(mfuart_notif->image_size));
1834 }
1835