1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #ifndef __MT7915_H
5 #define __MT7915_H
6
7 #include <linux/interrupt.h>
8 #include <linux/ktime.h>
9 #if defined(__FreeBSD__)
10 #include <linux/uuid.h>
11 #endif
12 #include "../mt76_connac.h"
13 #include "regs.h"
14
15 #define MT7915_MAX_INTERFACES 19
16 #define MT7915_WTBL_SIZE 288
17 #define MT7916_WTBL_SIZE 544
18 #define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1)
19 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \
20 MT7915_MAX_INTERFACES)
21
22 #define MT7915_WATCHDOG_TIME (HZ / 10)
23 #define MT7915_RESET_TIMEOUT (30 * HZ)
24
25 #define MT7915_TX_RING_SIZE 2048
26 #define MT7915_TX_MCU_RING_SIZE 256
27 #define MT7915_TX_FWDL_RING_SIZE 128
28
29 #define MT7915_RX_RING_SIZE 1536
30 #define MT7915_RX_MCU_RING_SIZE 512
31
32 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin"
33 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin"
34 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin"
35
36 #define MT7916_FIRMWARE_WA "mediatek/mt7916_wa.bin"
37 #define MT7916_FIRMWARE_WM "mediatek/mt7916_wm.bin"
38 #define MT7916_ROM_PATCH "mediatek/mt7916_rom_patch.bin"
39
40 #define MT7981_FIRMWARE_WA "mediatek/mt7981_wa.bin"
41 #define MT7981_FIRMWARE_WM "mediatek/mt7981_wm.bin"
42 #define MT7981_ROM_PATCH "mediatek/mt7981_rom_patch.bin"
43
44 #define MT7986_FIRMWARE_WA "mediatek/mt7986_wa.bin"
45 #define MT7986_FIRMWARE_WM "mediatek/mt7986_wm.bin"
46 #define MT7986_FIRMWARE_WM_MT7975 "mediatek/mt7986_wm_mt7975.bin"
47 #define MT7986_ROM_PATCH "mediatek/mt7986_rom_patch.bin"
48 #define MT7986_ROM_PATCH_MT7975 "mediatek/mt7986_rom_patch_mt7975.bin"
49
50 #define MT7915_EEPROM_DEFAULT "mediatek/mt7915_eeprom.bin"
51 #define MT7915_EEPROM_DEFAULT_DBDC "mediatek/mt7915_eeprom_dbdc.bin"
52 #define MT7916_EEPROM_DEFAULT "mediatek/mt7916_eeprom.bin"
53
54 #define MT7981_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7981_eeprom_mt7976_dbdc.bin"
55
56 #define MT7986_EEPROM_MT7975_DEFAULT "mediatek/mt7986_eeprom_mt7975.bin"
57 #define MT7986_EEPROM_MT7975_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7975_dual.bin"
58 #define MT7986_EEPROM_MT7976_DEFAULT "mediatek/mt7986_eeprom_mt7976.bin"
59 #define MT7986_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7986_eeprom_mt7976_dbdc.bin"
60 #define MT7986_EEPROM_MT7976_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7976_dual.bin"
61
62 #define MT7915_EEPROM_SIZE 3584
63 #define MT7916_EEPROM_SIZE 4096
64
65 #define MT7915_EEPROM_BLOCK_SIZE 16
66 #define MT7915_HW_TOKEN_SIZE 4096
67 #define MT7915_TOKEN_SIZE 8192
68
69 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
70 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
71
72 #define MT7915_THERMAL_THROTTLE_MAX 100
73 #define MT7915_CDEV_THROTTLE_MAX 99
74
75 #define MT7915_SKU_RATE_NUM 161
76
77 #define MT7915_MAX_TWT_AGRT 16
78 #define MT7915_MAX_STA_TWT_AGRT 8
79 #define MT7915_MIN_TWT_DUR 64
80 #define MT7915_MAX_QUEUE (MT_RXQ_BAND2 + __MT_MCUQ_MAX + 2)
81
82 #define MT7915_WED_RX_TOKEN_SIZE 12288
83
84 #define MT7915_CRIT_TEMP_IDX 0
85 #define MT7915_MAX_TEMP_IDX 1
86 #define MT7915_CRIT_TEMP 110
87 #define MT7915_MAX_TEMP 120
88
89 struct mt7915_vif;
90 struct mt7915_sta;
91 struct mt7915_dfs_pulse;
92 struct mt7915_dfs_pattern;
93
94 enum mt7915_txq_id {
95 MT7915_TXQ_FWDL = 16,
96 MT7915_TXQ_MCU_WM,
97 MT7915_TXQ_BAND0,
98 MT7915_TXQ_BAND1,
99 MT7915_TXQ_MCU_WA,
100 };
101
102 enum mt7915_rxq_id {
103 MT7915_RXQ_BAND0 = 0,
104 MT7915_RXQ_BAND1,
105 MT7915_RXQ_MCU_WM = 0,
106 MT7915_RXQ_MCU_WA,
107 MT7915_RXQ_MCU_WA_EXT,
108 };
109
110 enum mt7916_rxq_id {
111 MT7916_RXQ_MCU_WM = 0,
112 MT7916_RXQ_MCU_WA,
113 MT7916_RXQ_MCU_WA_MAIN,
114 MT7916_RXQ_MCU_WA_EXT,
115 MT7916_RXQ_BAND0,
116 MT7916_RXQ_BAND1,
117 };
118
119 struct mt7915_twt_flow {
120 struct list_head list;
121 u64 start_tsf;
122 u64 tsf;
123 u32 duration;
124 u16 wcid;
125 __le16 mantissa;
126 u8 exp;
127 u8 table_id;
128 u8 id;
129 u8 protection:1;
130 u8 flowtype:1;
131 u8 trigger:1;
132 u8 sched:1;
133 };
134
135 DECLARE_EWMA(avg_signal, 10, 8)
136
137 struct mt7915_sta {
138 struct mt76_wcid wcid; /* must be first */
139
140 struct mt7915_vif *vif;
141
142 struct list_head rc_list;
143 u32 airtime_ac[8];
144
145 int ack_signal;
146 struct ewma_avg_signal avg_ack_signal;
147
148 unsigned long changed;
149 unsigned long jiffies;
150 struct mt76_connac_sta_key_conf bip;
151
152 struct {
153 u8 flowid_mask;
154 struct mt7915_twt_flow flow[MT7915_MAX_STA_TWT_AGRT];
155 } twt;
156 };
157
158 struct mt7915_vif_cap {
159 bool ht_ldpc:1;
160 bool vht_ldpc:1;
161 bool he_ldpc:1;
162 bool vht_su_ebfer:1;
163 bool vht_su_ebfee:1;
164 bool vht_mu_ebfer:1;
165 bool vht_mu_ebfee:1;
166 bool he_su_ebfer:1;
167 bool he_su_ebfee:1;
168 bool he_mu_ebfer:1;
169 };
170
171 struct mt7915_vif {
172 struct mt76_vif_link mt76; /* must be first */
173
174 struct mt7915_vif_cap cap;
175 struct mt7915_sta sta;
176 struct mt7915_phy *phy;
177
178 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
179 struct cfg80211_bitrate_mask bitrate_mask;
180 };
181
182 /* crash-dump */
183 struct mt7915_crash_data {
184 guid_t guid;
185 struct timespec64 timestamp;
186
187 u8 *memdump_buf;
188 size_t memdump_buf_len;
189 };
190
191 struct mt7915_hif {
192 struct list_head list;
193
194 struct device *dev;
195 void __iomem *regs;
196 int irq;
197 u32 index;
198 };
199
200 struct mt7915_phy {
201 struct mt76_phy *mt76;
202 struct mt7915_dev *dev;
203
204 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
205
206 struct ieee80211_vif *monitor_vif;
207
208 struct thermal_cooling_device *cdev;
209 u8 cdev_state;
210 u8 throttle_state;
211 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */
212
213 u32 rxfilter;
214 u64 omac_mask;
215
216 u16 noise;
217
218 s16 coverage_class;
219 u8 slottime;
220
221 u32 trb_ts;
222
223 u32 rx_ampdu_ts;
224 u32 ampdu_ref;
225
226 struct mt76_mib_stats mib;
227 struct mt76_channel_state state_ts;
228
229 #ifdef CONFIG_NL80211_TESTMODE
230 struct {
231 u32 *reg_backup;
232
233 s32 last_freq_offset;
234 u8 last_rcpi[4];
235 s8 last_ib_rssi[4];
236 s8 last_wb_rssi[4];
237 u8 last_snr;
238
239 u8 spe_idx;
240 } test;
241 #endif
242 };
243
244 struct mt7915_dev {
245 union { /* must be first */
246 struct mt76_dev mt76;
247 struct mt76_phy mphy;
248 };
249
250 struct mt7915_hif *hif2;
251 struct mt7915_reg_desc reg;
252 u8 q_id[MT7915_MAX_QUEUE];
253 u32 q_int_mask[MT7915_MAX_QUEUE];
254 u32 wfdma_mask;
255
256 const struct mt76_bus_ops *bus_ops;
257 struct mt7915_phy phy;
258
259 /* monitor rx chain configured channel */
260 struct cfg80211_chan_def rdd2_chandef;
261 struct mt7915_phy *rdd2_phy;
262
263 u16 chainmask;
264 u16 chainshift;
265 u32 hif_idx;
266
267 struct work_struct init_work;
268 struct work_struct rc_work;
269 struct work_struct dump_work;
270 struct work_struct reset_work;
271 wait_queue_head_t reset_wait;
272
273 struct {
274 u32 state;
275 u32 wa_reset_count;
276 u32 wm_reset_count;
277 bool hw_full_reset:1;
278 bool hw_init_done:1;
279 bool restart:1;
280 } recovery;
281
282 /* protects coredump data */
283 struct mutex dump_mutex;
284 #ifdef CONFIG_DEV_COREDUMP
285 struct {
286 struct mt7915_crash_data *crash_data;
287 } coredump;
288 #endif
289
290 struct list_head sta_rc_list;
291 struct list_head twt_list;
292 spinlock_t reg_lock;
293
294 u32 hw_pattern;
295
296 bool dbdc_support;
297 bool flash_mode;
298 bool muru_debug;
299 bool ibf;
300
301 u8 monitor_mask;
302
303 struct dentry *debugfs_dir;
304 struct rchan *relay_fwlog;
305
306 void *cal;
307 u32 cur_prek_offset;
308 u8 dpd_chan_num_2g;
309 u8 dpd_chan_num_5g;
310 u8 dpd_chan_num_6g;
311
312 struct {
313 u8 debug_wm;
314 u8 debug_wa;
315 u8 debug_bin;
316 } fw;
317
318 struct {
319 u16 table_mask;
320 u8 n_agrt;
321 } twt;
322
323 struct reset_control *rstc;
324 void __iomem *dcm;
325 void __iomem *sku;
326 };
327
328 enum {
329 WFDMA0 = 0x0,
330 WFDMA1,
331 WFDMA_EXT,
332 __MT_WFDMA_MAX,
333 };
334
335 enum rdd_idx {
336 MT_RDD_IDX_BAND0, /* RDD idx for band idx 0 (single-band) */
337 MT_RDD_IDX_BAND1, /* RDD idx for band idx 1 */
338 MT_RDD_IDX_BACKGROUND, /* RDD idx for background chain */
339 };
340
341 enum mt7915_rdd_cmd {
342 RDD_STOP,
343 RDD_START,
344 RDD_DET_MODE,
345 RDD_RADAR_EMULATE,
346 RDD_START_TXQ = 20,
347 RDD_SET_WF_ANT = 30,
348 RDD_CAC_START = 50,
349 RDD_CAC_END,
350 RDD_NORMAL_START,
351 RDD_DISABLE_DFS_CAL,
352 RDD_PULSE_DBG,
353 RDD_READ_PULSE,
354 RDD_RESUME_BF,
355 RDD_IRQ_OFF,
356 };
357
358 static inline int
mt7915_get_rdd_idx(struct mt7915_phy * phy,bool is_background)359 mt7915_get_rdd_idx(struct mt7915_phy *phy, bool is_background)
360 {
361 if (!phy->mt76->cap.has_5ghz)
362 return -1;
363
364 if (is_background)
365 return MT_RDD_IDX_BACKGROUND;
366
367 return phy->mt76->band_idx;
368 }
369
370 static inline struct mt7915_phy *
mt7915_hw_phy(struct ieee80211_hw * hw)371 mt7915_hw_phy(struct ieee80211_hw *hw)
372 {
373 struct mt76_phy *phy = hw->priv;
374
375 return phy->priv;
376 }
377
378 static inline struct mt7915_dev *
mt7915_hw_dev(struct ieee80211_hw * hw)379 mt7915_hw_dev(struct ieee80211_hw *hw)
380 {
381 struct mt76_phy *phy = hw->priv;
382
383 return container_of(phy->dev, struct mt7915_dev, mt76);
384 }
385
386 static inline struct mt7915_phy *
mt7915_ext_phy(struct mt7915_dev * dev)387 mt7915_ext_phy(struct mt7915_dev *dev)
388 {
389 struct mt76_phy *phy = dev->mt76.phys[MT_BAND1];
390
391 if (!phy)
392 return NULL;
393
394 return phy->priv;
395 }
396
mt7915_check_adie(struct mt7915_dev * dev,bool sku)397 static inline u32 mt7915_check_adie(struct mt7915_dev *dev, bool sku)
398 {
399 u32 mask = sku ? MT_CONNINFRA_SKU_MASK : MT_ADIE_TYPE_MASK;
400 if (!is_mt798x(&dev->mt76))
401 return 0;
402
403 return mt76_rr(dev, MT_CONNINFRA_SKU_DEC_ADDR) & mask;
404 }
405
406 extern const struct ieee80211_ops mt7915_ops;
407 extern const struct mt76_testmode_ops mt7915_testmode_ops;
408 extern struct pci_driver mt7915_pci_driver;
409 extern struct pci_driver mt7915_hif_driver;
410 extern struct platform_driver mt798x_wmac_driver;
411
412 #ifdef CONFIG_MT798X_WMAC
413 int mt7986_wmac_enable(struct mt7915_dev *dev);
414 void mt7986_wmac_disable(struct mt7915_dev *dev);
415 #else
mt7986_wmac_enable(struct mt7915_dev * dev)416 static inline int mt7986_wmac_enable(struct mt7915_dev *dev)
417 {
418 return 0;
419 }
420
mt7986_wmac_disable(struct mt7915_dev * dev)421 static inline void mt7986_wmac_disable(struct mt7915_dev *dev)
422 {
423 }
424 #endif
425 struct mt7915_dev *mt7915_mmio_probe(struct device *pdev,
426 void __iomem *mem_base, u32 device_id);
427 void mt7915_wfsys_reset(struct mt7915_dev *dev);
428 irqreturn_t mt7915_irq_handler(int irq, void *dev_instance);
429 u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif);
430 u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id);
431
432 int mt7915_register_device(struct mt7915_dev *dev);
433 void mt7915_unregister_device(struct mt7915_dev *dev);
434 int mt7915_eeprom_init(struct mt7915_dev *dev);
435 void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev,
436 struct mt7915_phy *phy);
437 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev,
438 struct ieee80211_channel *chan,
439 u8 chain_idx);
440 s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band);
441 bool mt7915_eeprom_has_background_radar(struct mt7915_dev *dev);
442 int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2);
443 void mt7915_dma_prefetch(struct mt7915_dev *dev);
444 void mt7915_dma_cleanup(struct mt7915_dev *dev);
445 int mt7915_dma_reset(struct mt7915_dev *dev, bool force);
446 int mt7915_dma_start(struct mt7915_dev *dev, bool reset, bool wed_reset);
447 int mt7915_txbf_init(struct mt7915_dev *dev);
448 void mt7915_init_txpower(struct mt7915_phy *phy);
449 void mt7915_reset(struct mt7915_dev *dev);
450 int mt7915_run(struct ieee80211_hw *hw);
451 int mt7915_mcu_init(struct mt7915_dev *dev);
452 int mt7915_mcu_init_firmware(struct mt7915_dev *dev);
453 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
454 struct mt7915_vif *mvif,
455 struct mt7915_twt_flow *flow,
456 int cmd);
457 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,
458 struct ieee80211_vif *vif, bool enable);
459 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
460 struct ieee80211_vif *vif, int enable);
461 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
462 struct ieee80211_sta *sta, int conn_state, bool newly);
463 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
464 struct ieee80211_ampdu_params *params,
465 bool add);
466 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
467 struct ieee80211_ampdu_params *params,
468 bool add);
469 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
470 struct cfg80211_he_bss_color *he_bss_color);
471 int mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif,
472 u32 changed);
473 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
474 int enable, u32 changed);
475 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif,
476 struct ieee80211_he_obss_pd *he_obss_pd);
477 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
478 struct ieee80211_sta *sta, bool changed);
479 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
480 struct ieee80211_sta *sta);
481 int mt7915_set_channel(struct mt76_phy *mphy);
482 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd);
483 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif);
484 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *req);
485 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
486 struct ieee80211_vif *vif,
487 struct ieee80211_sta *sta,
488 void *data, u32 field);
489 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev);
490 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf);
491 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num);
492 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable,
493 bool hdr_trans);
494 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,
495 u8 en);
496 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band);
497 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable);
498 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy);
499 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len);
500 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower);
501 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy,
502 struct ieee80211_vif *vif,
503 struct ieee80211_sta *sta, s8 txpower);
504 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action);
505 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val);
506 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
507 const struct mt7915_dfs_pulse *pulse);
508 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
509 const struct mt7915_dfs_pattern *pattern);
510 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val);
511 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev);
512 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy);
513 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch);
514 int mt7915_mcu_get_temperature(struct mt7915_phy *phy);
515 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state);
516 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy);
517 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
518 struct ieee80211_sta *sta, struct rate_info *rate);
519 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
520 struct cfg80211_chan_def *chandef);
521 int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wcid);
522 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set);
523 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
524 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl);
525 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);
526 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb);
527 void mt7915_mcu_exit(struct mt7915_dev *dev);
528
mt7915_wtbl_size(struct mt7915_dev * dev)529 static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev)
530 {
531 return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE;
532 }
533
mt7915_eeprom_size(struct mt7915_dev * dev)534 static inline u16 mt7915_eeprom_size(struct mt7915_dev *dev)
535 {
536 return is_mt7915(&dev->mt76) ? MT7915_EEPROM_SIZE : MT7916_EEPROM_SIZE;
537 }
538
539 void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg,
540 u32 clear, u32 set);
541
mt7915_irq_enable(struct mt7915_dev * dev,u32 mask)542 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask)
543 {
544 if (dev->hif2)
545 mt7915_dual_hif_set_irq_mask(dev, false, 0, mask);
546 else
547 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
548
549 tasklet_schedule(&dev->mt76.irq_tasklet);
550 }
551
mt7915_irq_disable(struct mt7915_dev * dev,u32 mask)552 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask)
553 {
554 if (dev->hif2)
555 mt7915_dual_hif_set_irq_mask(dev, true, mask, 0);
556 else
557 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
558 }
559
560 void mt7915_memcpy_fromio(struct mt7915_dev *dev, void *buf, u32 offset,
561 size_t len);
562
563 void mt7915_mac_init(struct mt7915_dev *dev);
564 u32 mt7915_mac_wtbl_lmac_addr(struct mt7915_dev *dev, u16 wcid, u8 dw);
565 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask);
566 void mt7915_mac_reset_counters(struct mt7915_phy *phy);
567 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy);
568 void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy);
569 void mt7915_mac_enable_rtscts(struct mt7915_dev *dev,
570 struct ieee80211_vif *vif, bool enable);
571 void mt7915_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
572 struct sk_buff *skb, struct mt76_wcid *wcid, int pid,
573 struct ieee80211_key_conf *key,
574 enum mt76_txq_id qid, u32 changed);
575 void mt7915_mac_set_timing(struct mt7915_phy *phy);
576 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
577 struct ieee80211_sta *sta);
578 int mt7915_mac_sta_event(struct mt76_dev *mdev, struct ieee80211_vif *vif,
579 struct ieee80211_sta *sta, enum mt76_sta_event ev);
580 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
581 struct ieee80211_sta *sta);
582 void mt7915_mac_work(struct work_struct *work);
583 void mt7915_mac_reset_work(struct work_struct *work);
584 void mt7915_mac_dump_work(struct work_struct *work);
585 void mt7915_mac_sta_rc_work(struct work_struct *work);
586 void mt7915_mac_update_stats(struct mt7915_phy *phy);
587 void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev,
588 struct mt7915_sta *msta,
589 u8 flowid);
590 void mt7915_mac_add_twt_setup(struct ieee80211_hw *hw,
591 struct ieee80211_sta *sta,
592 struct ieee80211_twt_setup *twt);
593 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
594 enum mt76_txq_id qid, struct mt76_wcid *wcid,
595 struct ieee80211_sta *sta,
596 struct mt76_tx_info *tx_info);
597 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
598 struct sk_buff *skb, u32 *info);
599 bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len);
600 void mt7915_stats_work(struct work_struct *work);
601 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force);
602 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy);
603 void mt7915_set_stream_he_caps(struct mt7915_phy *phy);
604 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy);
605 void mt7915_update_channel(struct mt76_phy *mphy);
606 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enable);
607 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy);
608 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev);
609 int mt7915_init_debugfs(struct mt7915_phy *phy);
610 void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len);
611 bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len);
612 #ifdef CONFIG_MAC80211_DEBUGFS
613 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
614 struct ieee80211_sta *sta, struct dentry *dir);
615 #endif
616 int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr,
617 bool pci, int *irq);
618
619 #endif
620