| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 46 Register llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass()
58 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
110 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
163 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands() local
202 MachineRegisterInfo &MRI) { in canReplaceReg()
223 const MachineRegisterInfo &MRI) { in isTriviallyDead()
296 const MachineRegisterInfo &MRI) { in getIConstantVRegVal()
307 llvm::getIConstantVRegSExtVal(Register VReg, const MachineRegisterInfo &MRI) { in getIConstantVRegSExtVal()
329 getConstantVRegValWithLookThrough(Register VReg, const MachineRegisterInfo &MRI, in getConstantVRegValWithLookThrough()
427 Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs) { in getIConstantVRegValWithLookThrough()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 157 bool matchREV(MachineInstr &MI, MachineRegisterInfo &MRI, in matchREV()
193 bool matchTRN(MachineInstr &MI, MachineRegisterInfo &MRI, in matchTRN()
214 bool matchUZP(MachineInstr &MI, MachineRegisterInfo &MRI, in matchUZP()
230 bool matchZip(MachineInstr &MI, MachineRegisterInfo &MRI, in matchZip()
248 MachineRegisterInfo &MRI, in matchDupFromInsertVectorElt()
288 MachineRegisterInfo &MRI, in matchDupFromBuildVector()
303 bool matchDup(MachineInstr &MI, MachineRegisterInfo &MRI, in matchDup()
349 bool matchEXT(MachineInstr &MI, MachineRegisterInfo &MRI, in matchEXT()
405 bool matchNonConstInsert(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchNonConstInsert()
413 void applyNonConstInsert(MachineInstr &MI, MachineRegisterInfo &MRI, in applyNonConstInsert()
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| H A D | AArch64GlobalISelUtils.cpp | 22 const MachineRegisterInfo &MRI) { in getAArch64VectorSplat()
36 const MachineRegisterInfo &MRI) { in getAArch64VectorSplatScalar()
45 const MachineRegisterInfo &MRI) { in isCMN()
67 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in tryEmitBZero() local
101 MachineRegisterInfo &MRI) { in extractPtrauthBlendDiscriminators()
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| H A D | AArch64PostLegalizerCombiner.cpp | 67 MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtractVecEltPairwiseAdd()
110 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyExtractVecEltPairwiseAdd()
125 bool isSignExtended(Register R, MachineRegisterInfo &MRI) { in isSignExtended()
131 bool isZeroExtended(Register R, MachineRegisterInfo &MRI) { in isZeroExtended()
137 MachineInstr &MI, MachineRegisterInfo &MRI, in matchAArch64MulConstCombine()
250 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyAArch64MulConstCombine()
259 bool matchFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchFoldMergeToZext()
267 void applyFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI, in applyFoldMergeToZext()
280 bool matchMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchMutateAnyExtToZExt()
297 void applyMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI, in applyMutateAnyExtToZExt()
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| H A D | AArch64InstructionSelector.cpp | 744 auto &MRI = MF.getRegInfo(); in getImmedFromMO() local
769 const MachineRegisterInfo &MRI, in unsupportedBinOp()
922 static bool copySubReg(MachineInstr &I, MachineRegisterInfo &MRI, in copySubReg()
949 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, in getRegClassesForCopy()
977 static bool selectDebugInstr(MachineInstr &I, MachineRegisterInfo &MRI, in selectDebugInstr()
1007 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, in selectCopy()
1177 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitSelect() local
1457 MachineRegisterInfo &MRI) { in getTestBitReg()
1593 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitTestBit() local
1666 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitCBZ() local
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| H A D | AArch64PreLegalizerCombiner.cpp | 50 bool matchFConstantToConstant(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchFConstantToConstant()
76 bool matchICmpRedundantTrunc(MachineInstr &MI, MachineRegisterInfo &MRI, in matchICmpRedundantTrunc()
105 void applyICmpRedundantTrunc(MachineInstr &MI, MachineRegisterInfo &MRI, in applyICmpRedundantTrunc()
126 bool matchFoldGlobalOffset(MachineInstr &MI, MachineRegisterInfo &MRI, in matchFoldGlobalOffset()
193 void applyFoldGlobalOffset(MachineInstr &MI, MachineRegisterInfo &MRI, in applyFoldGlobalOffset()
235 bool matchExtAddvToUdotAddv(MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtAddvToUdotAddv()
290 void applyExtAddvToUdotAddv(MachineInstr &MI, MachineRegisterInfo &MRI, in applyExtAddvToUdotAddv()
415 bool matchExtUaddvToUaddlv(MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtUaddvToUaddlv()
447 void applyExtUaddvToUaddlv(MachineInstr &MI, MachineRegisterInfo &MRI, in applyExtUaddvToUaddlv()
561 bool matchPushAddSubExt(MachineInstr &MI, MachineRegisterInfo &MRI, in matchPushAddSubExt()
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| H A D | AArch64RegisterBankInfo.cpp | 303 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrAlternativeMappings() local
408 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingImpl() local
437 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getSameKindOfOperandsMapping() local
476 static bool isFPIntrinsic(const MachineRegisterInfo &MRI, in isFPIntrinsic()
504 const MachineInstr &MI, const MachineRegisterInfo &MRI, in isPHIWithFPContraints()
518 const MachineRegisterInfo &MRI, in hasFPConstraints()
556 const MachineRegisterInfo &MRI, in onlyUsesFP()
573 const MachineRegisterInfo &MRI, in onlyDefinesFP()
662 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchOptWInstrs.cpp | 100 const MachineRegisterInfo &MRI, unsigned OrigBits) { in hasAllNBitUsers()
317 const MachineRegisterInfo &MRI) { in hasAllWUsers()
324 const MachineRegisterInfo &MRI, unsigned OpNo) { in isSignExtendingOpW()
478 const MachineRegisterInfo &MRI, in isSignExtendedW()
686 MachineRegisterInfo &MRI) { in removeSExtWInstrs()
738 MachineRegisterInfo &MRI) { in convertToDSuffixes()
764 MachineRegisterInfo &MRI) { in convertToWSuffixes()
817 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 360 MachineRegisterInfo &MRI = MF.getRegInfo(); in select() local
535 const MachineRegisterInfo &MRI, in X86SelectAddress()
561 MachineRegisterInfo &MRI, in selectLoadStoreOp()
644 MachineRegisterInfo &MRI, in selectFrameIndexOrGep()
672 MachineRegisterInfo &MRI, in selectGlobalValue()
718 MachineRegisterInfo &MRI, in selectConstant()
775 MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg, in selectTurnIntoCOPY()
790 MachineRegisterInfo &MRI, in selectTruncOrPtrToInt()
856 MachineRegisterInfo &MRI, in selectZext()
921 MachineRegisterInfo &MRI, in selectAnyext()
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| H A D | X86RegisterBankInfo.cpp | 75 static bool isFPIntrinsic(const MachineRegisterInfo &MRI, in isFPIntrinsic()
96 const MachineRegisterInfo &MRI, in hasFPConstraints()
134 const MachineRegisterInfo &MRI, in onlyUsesFP()
153 const MachineRegisterInfo &MRI, in onlyDefinesFP()
223 const MachineInstr &MI, const MachineRegisterInfo &MRI, const bool isFP, in getInstrPartialMappingIdxs()
262 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getSameOperandsMapping() local
280 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
426 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrAlternativeMappings() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVOptWInstrs.cpp | 121 const MachineRegisterInfo &MRI, unsigned OrigBits) { in hasAllNBitUsers()
345 const MachineRegisterInfo &MRI) { in hasAllWUsers()
352 const MachineRegisterInfo &MRI, unsigned OpNo) { in isSignExtendingOpW()
397 const MachineRegisterInfo &MRI, in isSignExtendedW()
633 MachineRegisterInfo &MRI) { in removeSExtWInstrs()
685 MachineRegisterInfo &MRI) { in stripWSuffixes()
712 MachineRegisterInfo &MRI) { in appendWSuffixes()
765 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackendDarwin.h | 19 const MCRegisterInfo &MRI; variable
24 const MCRegisterInfo &MRI) in ARMAsmBackendDarwin()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenCommonISel.cpp | 210 static MachineOperand *getSalvageOpsForCopy(const MachineRegisterInfo &MRI, in getSalvageOpsForCopy()
217 static MachineOperand *getSalvageOpsForTrunc(const MachineRegisterInfo &MRI, in getSalvageOpsForTrunc()
236 static MachineOperand *salvageDebugInfoImpl(const MachineRegisterInfo &MRI, in salvageDebugInfoImpl()
249 void llvm::salvageDebugInfoForDbgValue(const MachineRegisterInfo &MRI, in salvageDebugInfoForDbgValue()
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| H A D | LivePhysRegs.cpp | 141 bool LivePhysRegs::available(const MachineRegisterInfo &MRI, in available()
176 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addCalleeSavedRegs() local
251 const MachineRegisterInfo &MRI = MF.getRegInfo(); in computeLiveIns() local
262 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addLiveIns() local
278 const MachineRegisterInfo &MRI = MF.getRegInfo(); in recomputeLivenessFlags() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | ModRef.h | 39 [[nodiscard]] inline bool isNoModRef(const ModRefInfo MRI) { in isNoModRef()
42 [[nodiscard]] inline bool isModOrRefSet(const ModRefInfo MRI) { in isModOrRefSet()
45 [[nodiscard]] inline bool isModAndRefSet(const ModRefInfo MRI) { in isModAndRefSet()
48 [[nodiscard]] inline bool isModSet(const ModRefInfo MRI) { in isModSet()
51 [[nodiscard]] inline bool isRefSet(const ModRefInfo MRI) { in isRefSet()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 128 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI, in checkADDrr()
176 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI, in checkShift()
190 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI, in processCandidate()
225 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MRI, in processDstReg()
286 void BPFMISimplifyPatchable::processInst(MachineRegisterInfo *MRI, in processInst()
306 MachineRegisterInfo *MRI = &MF->getRegInfo(); in removeLD() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCCallLowering.h | 42 MachineRegisterInfo &MRI) in PPCIncomingValueHandler() argument
66 FormalArgHandler(MachineIRBuilder & MIRBuilder,MachineRegisterInfo & MRI) FormalArgHandler() argument
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| H A D | PPCRegisterBankInfo.cpp | 83 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
252 const MachineRegisterInfo &MRI, in hasFPConstraints()
295 const MachineRegisterInfo &MRI, in onlyUsesFP()
314 const MachineRegisterInfo &MRI, in onlyDefinesFP()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CSEInfo.h | 75 MachineRegisterInfo *MRI = nullptr; variable
171 const MachineRegisterInfo &MRI; variable
174 GISelInstProfileBuilder(FoldingSetNodeID &ID, const MachineRegisterInfo &MRI) in GISelInstProfileBuilder() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterBankInfo.cpp | 161 Register Reg, const MachineRegisterInfo &MRI) { in addDefUses()
176 Register Reg, const MachineRegisterInfo &MRI) { in addUseDef()
187 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesOutgoing() local
201 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesIncoming() local
214 const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo(); in AmbiguousRegDefUseContainer() local
348 const MachineRegisterInfo &MRI = MF.getRegInfo(); in setTypesAccordingToPhysicalRegister() local
414 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
720 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingImpl() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVPreLegalizer.cpp | 46 MachineRegisterInfo &MRI = MF.getRegInfo(); in addConstantsToTrack() local
130 MachineRegisterInfo &MRI = MF.getRegInfo(); in foldConstantsIntoIntrinsics() local
155 MachineRegisterInfo *MRI) { in findAssignTypeInstr()
226 MachineRegisterInfo &MRI, in propagateSPIRVType()
299 static void widenScalarLLTNextPow2(Register Reg, MachineRegisterInfo &MRI) { in widenScalarLLTNextPow2()
312 createNewIdReg(SPIRVType *SpvType, Register SrcReg, MachineRegisterInfo &MRI, in createNewIdReg()
373 MachineRegisterInfo &MRI) { in insertAssignInstr()
404 MachineRegisterInfo &MRI, SPIRVGlobalRegistry *GR) { in processInstr()
433 MachineRegisterInfo &MRI = MF.getRegInfo(); in generateAssignInstrs() local
576 MachineRegisterInfo &MRI = MF.getRegInfo(); in processInstrsWithTypeFolding() local
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| H A D | SPIRVISelLowering.cpp | 107 inline Register getTypeReg(MachineRegisterInfo *MRI, Register OpReg) { in getTypeReg()
114 static void doInsertBitcast(const SPIRVSubtarget &STI, MachineRegisterInfo *MRI, in doInsertBitcast()
151 MachineRegisterInfo *MRI, SPIRVGlobalRegistry &GR, in validatePtrTypes()
185 MachineRegisterInfo *MRI, in validateGroupWaitEventsPtr()
207 MachineRegisterInfo *MRI, in validateGroupAsyncCopyPtr()
313 void validateAccessChain(const SPIRVSubtarget &STI, MachineRegisterInfo *MRI, in validateAccessChain()
331 MachineRegisterInfo *MRI = &MF.getRegInfo(); in finalizeLowering() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXPeephole.cpp | 84 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate() local
112 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal() local
157 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 39 const MachineRegisterInfo &MRI) { in getRegKind()
53 const MachineRegisterInfo &MRI) { in inc()
246 const MachineRegisterInfo &MRI) { in getDefRegMask()
260 const MachineRegisterInfo &MRI) { in collectVirtualRegUses()
296 const MachineRegisterInfo &MRI) { in getLiveLaneMask()
301 const MachineRegisterInfo &MRI) { in getLiveLaneMask()
317 const MachineRegisterInfo &MRI) { in getLiveRegs()
574 const MachineRegisterInfo &MRI) { in print()
603 getRegLiveThroughMask(const MachineRegisterInfo &MRI, const LiveIntervals &LIS, in getRegLiveThroughMask()
629 const MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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