1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2009 Yahoo! Inc.
5 * Copyright (c) 2011-2015 LSI Corp.
6 * Copyright (c) 2013-2015 Avago Technologies
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
31 */
32
33 #ifndef _MPSVAR_H
34 #define _MPSVAR_H
35
36 #include <sys/lock.h>
37 #include <sys/mutex.h>
38
39 #define MPS_DRIVER_VERSION "21.02.00.00-fbsd"
40
41 #define MPS_DB_MAX_WAIT 2500
42
43 #define MPS_REQ_FRAMES 2048
44 #define MPS_PRI_REQ_FRAMES 128
45 #define MPS_EVT_REPLY_FRAMES 32
46 #define MPS_REPLY_FRAMES MPS_REQ_FRAMES
47 #define MPS_CHAIN_FRAMES 16384
48 #define MPS_MAXIO_PAGES (-1)
49 #define MPS_SENSE_LEN SSD_FULL_SIZE
50 #define MPS_MSI_MAX 1
51 #define MPS_MSIX_MAX 16
52 #define MPS_SGE64_SIZE 12
53 #define MPS_SGE32_SIZE 8
54 #define MPS_SGC_SIZE 12
55
56 #define CAN_SLEEP 1
57 #define NO_SLEEP 0
58
59 #define MPS_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */
60 #define MPS_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */
61 #define MPS_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */
62
63 #define MPS_SCSI_RI_INVALID_FRAME (0x00000002)
64
65 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */
66
67 #include <sys/endian.h>
68
69 /*
70 * host mapping related macro definitions
71 */
72 #define MPS_MAPTABLE_BAD_IDX 0xFFFFFFFF
73 #define MPS_DPM_BAD_IDX 0xFFFF
74 #define MPS_ENCTABLE_BAD_IDX 0xFF
75 #define MPS_MAX_MISSING_COUNT 0x0F
76 #define MPS_DEV_RESERVED 0x20000000
77 #define MPS_MAP_IN_USE 0x10000000
78 #define MPS_MAP_BAD_ID 0xFFFFFFFF
79
80 /*
81 * WarpDrive controller
82 */
83 #define MPS_CHIP_WD_DEVICE_ID 0x007E
84 #define MPS_WD_LSI_OEM 0x80
85 #define MPS_WD_HIDE_EXPOSE_MASK 0x03
86 #define MPS_WD_HIDE_ALWAYS 0x00
87 #define MPS_WD_EXPOSE_ALWAYS 0x01
88 #define MPS_WD_HIDE_IF_VOLUME 0x02
89 #define MPS_WD_RETRY 0x01
90 #define MPS_MAN_PAGE10_SIZE 0x5C /* Hardcode for now */
91 #define MPS_MAX_DISKS_IN_VOL 10
92
93 /*
94 * WarpDrive Event Logging
95 */
96 #define MPI2_WD_LOG_ENTRY 0x8002
97 #define MPI2_WD_SSD_THROTTLING 0x0041
98 #define MPI2_WD_DRIVE_LIFE_WARN 0x0043
99 #define MPI2_WD_DRIVE_LIFE_DEAD 0x0044
100 #define MPI2_WD_RAIL_MON_FAIL 0x004D
101
102 typedef uint8_t u8;
103 typedef uint16_t u16;
104 typedef uint32_t u32;
105 typedef uint64_t u64;
106
107 /**
108 * struct dev_mapping_table - device mapping information
109 * @physical_id: SAS address for drives or WWID for RAID volumes
110 * @device_info: bitfield provides detailed info about the device
111 * @phy_bits: bitfields indicating controller phys
112 * @dpm_entry_num: index of this device in device persistent map table
113 * @dev_handle: device handle for the device pointed by this entry
114 * @id: target id
115 * @missing_count: number of times the device not detected by driver
116 * @hide_flag: Hide this physical disk/not (foreign configuration)
117 * @init_complete: Whether the start of the day checks completed or not
118 */
119 struct dev_mapping_table {
120 u64 physical_id;
121 u32 device_info;
122 u32 phy_bits;
123 u16 dpm_entry_num;
124 u16 dev_handle;
125 u16 reserved1;
126 u16 id;
127 u8 missing_count;
128 u8 init_complete;
129 u8 TLR_bits;
130 u8 reserved2;
131 };
132
133 /**
134 * struct enc_mapping_table - mapping information about an enclosure
135 * @enclosure_id: Logical ID of this enclosure
136 * @start_index: index to the entry in dev_mapping_table
137 * @phy_bits: bitfields indicating controller phys
138 * @dpm_entry_num: index of this enclosure in device persistent map table
139 * @enc_handle: device handle for the enclosure pointed by this entry
140 * @num_slots: number of slots in the enclosure
141 * @start_slot: Starting slot id
142 * @missing_count: number of times the device not detected by driver
143 * @removal_flag: used to mark the device for removal
144 * @skip_search: used as a flag to include/exclude enclosure for search
145 * @init_complete: Whether the start of the day checks completed or not
146 */
147 struct enc_mapping_table {
148 u64 enclosure_id;
149 u32 start_index;
150 u32 phy_bits;
151 u16 dpm_entry_num;
152 u16 enc_handle;
153 u16 num_slots;
154 u16 start_slot;
155 u8 missing_count;
156 u8 removal_flag;
157 u8 skip_search;
158 u8 init_complete;
159 };
160
161 /**
162 * struct map_removal_table - entries to be removed from mapping table
163 * @dpm_entry_num: index of this device in device persistent map table
164 * @dev_handle: device handle for the device pointed by this entry
165 */
166 struct map_removal_table{
167 u16 dpm_entry_num;
168 u16 dev_handle;
169 };
170
171 typedef struct mps_fw_diagnostic_buffer {
172 size_t size;
173 uint8_t extended_type;
174 uint8_t buffer_type;
175 uint8_t force_release;
176 uint32_t product_specific[23];
177 uint8_t immediate;
178 uint8_t enabled;
179 uint8_t valid_data;
180 uint8_t owned_by_firmware;
181 uint32_t unique_id;
182 } mps_fw_diagnostic_buffer_t;
183
184 struct mps_softc;
185 struct mps_command;
186 struct mpssas_softc;
187 union ccb;
188 struct mpssas_target;
189 struct mps_column_map;
190
191 MALLOC_DECLARE(M_MPT2);
192
193 typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t,
194 MPI2_EVENT_NOTIFICATION_REPLY *reply);
195 typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm);
196
197 struct mps_chain {
198 TAILQ_ENTRY(mps_chain) chain_link;
199 MPI2_SGE_IO_UNION *chain;
200 uint64_t chain_busaddr;
201 };
202
203 /*
204 * This needs to be at least 2 to support SMP passthrough.
205 */
206 #define MPS_IOVEC_COUNT 2
207
208 struct mps_command {
209 TAILQ_ENTRY(mps_command) cm_link;
210 TAILQ_ENTRY(mps_command) cm_recovery;
211 struct mps_softc *cm_sc;
212 union ccb *cm_ccb;
213 void *cm_data;
214 u_int cm_length;
215 u_int cm_out_len;
216 struct uio cm_uio;
217 struct iovec cm_iovec[MPS_IOVEC_COUNT];
218 u_int cm_max_segs;
219 u_int cm_sglsize;
220 MPI2_SGE_IO_UNION *cm_sge;
221 uint8_t *cm_req;
222 uint8_t *cm_reply;
223 uint32_t cm_reply_data;
224 mps_command_callback_t *cm_complete;
225 void *cm_complete_data;
226 struct mpssas_target *cm_targ;
227 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc;
228 u_int cm_lun;
229 u_int cm_flags;
230 #define MPS_CM_FLAGS_POLLED (1 << 0)
231 #define MPS_CM_FLAGS_COMPLETE (1 << 1)
232 #define MPS_CM_FLAGS_SGE_SIMPLE (1 << 2)
233 #define MPS_CM_FLAGS_DATAOUT (1 << 3)
234 #define MPS_CM_FLAGS_DATAIN (1 << 4)
235 #define MPS_CM_FLAGS_WAKEUP (1 << 5)
236 #define MPS_CM_FLAGS_DD_IO (1 << 6)
237 #define MPS_CM_FLAGS_USE_UIO (1 << 7)
238 #define MPS_CM_FLAGS_SMP_PASS (1 << 8)
239 #define MPS_CM_FLAGS_CHAIN_FAILED (1 << 9)
240 #define MPS_CM_FLAGS_ERROR_MASK MPS_CM_FLAGS_CHAIN_FAILED
241 #define MPS_CM_FLAGS_USE_CCB (1 << 10)
242 #define MPS_CM_FLAGS_SATA_ID_TIMEOUT (1 << 11)
243 #define MPS_CM_FLAGS_ON_RECOVERY (1 << 12)
244 #define MPS_CM_FLAGS_TIMEDOUT (1 << 13)
245 u_int cm_state;
246 #define MPS_CM_STATE_FREE 0
247 #define MPS_CM_STATE_BUSY 1
248 #define MPS_CM_STATE_INQUEUE 2
249 bus_dmamap_t cm_dmamap;
250 struct scsi_sense_data *cm_sense;
251 TAILQ_HEAD(, mps_chain) cm_chain_list;
252 uint32_t cm_req_busaddr;
253 uint32_t cm_sense_busaddr;
254 struct callout cm_callout;
255 mps_command_callback_t *cm_timeout_handler;
256 };
257
258 struct mps_column_map {
259 uint16_t dev_handle;
260 uint8_t phys_disk_num;
261 };
262
263 struct mps_event_handle {
264 TAILQ_ENTRY(mps_event_handle) eh_list;
265 mps_evt_callback_t *callback;
266 void *data;
267 u32 mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
268 };
269
270 struct mps_busdma_context {
271 int completed;
272 int abandoned;
273 int error;
274 bus_addr_t *addr;
275 struct mps_softc *softc;
276 bus_dmamap_t buffer_dmamap;
277 bus_dma_tag_t buffer_dmat;
278 };
279
280 struct mps_queue {
281 struct mps_softc *sc;
282 int qnum;
283 MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
284 int replypostindex;
285 #ifdef notyet
286 ck_ring_buffer_t *ringmem;
287 ck_ring_buffer_t *chainmem;
288 ck_ring_t req_ring;
289 ck_ring_t chain_ring;
290 #endif
291 bus_dma_tag_t buffer_dmat;
292 int io_cmds_highwater;
293 int chain_free_lowwater;
294 int chain_alloc_fail;
295 struct resource *irq;
296 void *intrhand;
297 int irq_rid;
298 };
299
300 struct mps_softc {
301 device_t mps_dev;
302 struct cdev *mps_cdev;
303 u_int mps_flags;
304 #define MPS_FLAGS_INTX (1 << 0)
305 #define MPS_FLAGS_MSI (1 << 1)
306 #define MPS_FLAGS_BUSY (1 << 2)
307 #define MPS_FLAGS_SHUTDOWN (1 << 3)
308 #define MPS_FLAGS_DIAGRESET (1 << 4)
309 #define MPS_FLAGS_ATTACH_DONE (1 << 5)
310 #define MPS_FLAGS_WD_AVAILABLE (1 << 6)
311 #define MPS_FLAGS_REALLOCATED (1 << 7)
312 u_int mps_debug;
313 u_int msi_msgs;
314 u_int reqframesz;
315 u_int replyframesz;
316 int tm_cmds_active;
317 int io_cmds_active;
318 int io_cmds_highwater;
319 int chain_free;
320 int max_chains;
321 int max_io_pages;
322 u_int maxio;
323 int chain_free_lowwater;
324 u_int enable_ssu;
325 int spinup_wait_time;
326 int use_phynum;
327 int dump_reqs_alltypes;
328 uint64_t chain_alloc_fail;
329 struct sysctl_ctx_list sysctl_ctx;
330 struct sysctl_oid *sysctl_tree;
331 char fw_version[16];
332 char msg_version[8];
333 struct mps_command *commands;
334 struct mps_chain *chains;
335 struct callout periodic;
336 struct callout device_check_callout;
337 struct mps_queue *queues;
338
339 struct mpssas_softc *sassc;
340 TAILQ_HEAD(, mps_command) req_list;
341 TAILQ_HEAD(, mps_command) high_priority_req_list;
342 TAILQ_HEAD(, mps_chain) chain_list;
343 TAILQ_HEAD(, mps_command) tm_list;
344 int replypostindex;
345 int replyfreeindex;
346
347 struct resource *mps_regs_resource;
348 bus_space_handle_t mps_bhandle;
349 bus_space_tag_t mps_btag;
350 int mps_regs_rid;
351
352 bus_dma_tag_t mps_parent_dmat;
353 bus_dma_tag_t buffer_dmat;
354
355 MPI2_IOC_FACTS_REPLY *facts;
356 int num_reqs;
357 int num_prireqs;
358 int num_replies;
359 int num_chains;
360 int fqdepth; /* Free queue */
361 int pqdepth; /* Post queue */
362
363 u32 event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
364 TAILQ_HEAD(, mps_event_handle) event_list;
365 struct mps_event_handle *mps_log_eh;
366
367 struct mtx mps_mtx;
368 struct intr_config_hook mps_ich;
369
370 uint8_t *req_frames;
371 bus_addr_t req_busaddr;
372 bus_dma_tag_t req_dmat;
373 bus_dmamap_t req_map;
374
375 uint8_t *reply_frames;
376 bus_addr_t reply_busaddr;
377 bus_dma_tag_t reply_dmat;
378 bus_dmamap_t reply_map;
379
380 struct scsi_sense_data *sense_frames;
381 bus_addr_t sense_busaddr;
382 bus_dma_tag_t sense_dmat;
383 bus_dmamap_t sense_map;
384
385 uint8_t *chain_frames;
386 bus_dma_tag_t chain_dmat;
387 bus_dmamap_t chain_map;
388
389 MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
390 bus_addr_t post_busaddr;
391 uint32_t *free_queue;
392 bus_addr_t free_busaddr;
393 bus_dma_tag_t queues_dmat;
394 bus_dmamap_t queues_map;
395
396 uint8_t *fw_diag_buffer;
397 bus_addr_t fw_diag_busaddr;
398 bus_dma_tag_t fw_diag_dmat;
399 bus_dmamap_t fw_diag_map;
400
401 uint8_t ir_firmware;
402
403 /* static config pages */
404 Mpi2IOCPage8_t ioc_pg8;
405
406 /* host mapping support */
407 struct dev_mapping_table *mapping_table;
408 struct enc_mapping_table *enclosure_table;
409 struct map_removal_table *removal_table;
410 uint8_t *dpm_entry_used;
411 uint8_t *dpm_flush_entry;
412 Mpi2DriverMappingPage0_t *dpm_pg0;
413 uint16_t max_devices;
414 uint16_t max_enclosures;
415 uint16_t max_expanders;
416 uint8_t max_volumes;
417 uint8_t num_enc_table_entries;
418 uint8_t num_rsvd_entries;
419 uint16_t max_dpm_entries;
420 uint8_t is_dpm_enable;
421 uint8_t track_mapping_events;
422 uint32_t pending_map_events;
423
424 /* FW diag Buffer List */
425 mps_fw_diagnostic_buffer_t
426 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
427
428 /* Event Recording IOCTL support */
429 uint32_t events_to_record[4];
430 mps_event_entry_t recorded_events[MPS_EVENT_QUEUE_SIZE];
431 uint8_t event_index;
432 uint32_t event_number;
433
434 /* EEDP and TLR support */
435 uint8_t eedp_enabled;
436 uint8_t control_TLR;
437
438 /* Shutdown Event Handler */
439 eventhandler_tag shutdown_eh;
440
441 /* To track topo events during reset */
442 #define MPS_DIAG_RESET_TIMEOUT 300000
443 uint8_t wait_for_port_enable;
444 uint8_t port_enable_complete;
445 uint8_t msleep_fake_chan;
446
447 /* WD controller */
448 uint8_t WD_available;
449 uint8_t WD_valid_config;
450 uint8_t WD_hide_expose;
451
452 /* Direct Drive for WarpDrive */
453 uint8_t DD_num_phys_disks;
454 uint16_t DD_dev_handle;
455 uint32_t DD_stripe_size;
456 uint32_t DD_stripe_exponent;
457 uint32_t DD_block_size;
458 uint16_t DD_block_exponent;
459 uint64_t DD_max_lba;
460 struct mps_column_map DD_column_map[MPS_MAX_DISKS_IN_VOL];
461
462 /* StartStopUnit command handling at shutdown */
463 uint32_t SSU_refcount;
464 uint8_t SSU_started;
465
466 /* Configuration tunables */
467 u_int disable_msix;
468 u_int disable_msi;
469 u_int max_msix;
470 u_int max_reqframes;
471 u_int max_prireqframes;
472 u_int max_replyframes;
473 u_int max_evtframes;
474 char exclude_ids[80];
475
476 struct timeval lastfail;
477 };
478
479 struct mps_config_params {
480 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr;
481 u_int action;
482 u_int page_address; /* Attributes, not a phys address */
483 u_int status;
484 void *buffer;
485 u_int length;
486 int timeout;
487 void (*callback)(struct mps_softc *, struct mps_config_params *);
488 void *cbdata;
489 };
490
491 struct scsi_read_capacity_eedp
492 {
493 uint8_t addr[8];
494 uint8_t length[4];
495 uint8_t protect;
496 };
497
498 static __inline uint32_t
mps_regread(struct mps_softc * sc,uint32_t offset)499 mps_regread(struct mps_softc *sc, uint32_t offset)
500 {
501 return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset));
502 }
503
504 static __inline void
mps_regwrite(struct mps_softc * sc,uint32_t offset,uint32_t val)505 mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)
506 {
507 bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);
508 }
509
510 /* free_queue must have Little Endian address
511 * TODO- cm_reply_data is unwanted. We can remove it.
512 * */
513 static __inline void
mps_free_reply(struct mps_softc * sc,uint32_t busaddr)514 mps_free_reply(struct mps_softc *sc, uint32_t busaddr)
515 {
516 if (++sc->replyfreeindex >= sc->fqdepth)
517 sc->replyfreeindex = 0;
518 sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
519 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
520 }
521
522 static __inline struct mps_chain *
mps_alloc_chain(struct mps_softc * sc)523 mps_alloc_chain(struct mps_softc *sc)
524 {
525 struct mps_chain *chain;
526
527 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
528 TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
529 sc->chain_free--;
530 if (sc->chain_free < sc->chain_free_lowwater)
531 sc->chain_free_lowwater = sc->chain_free;
532 } else
533 sc->chain_alloc_fail++;
534 return (chain);
535 }
536
537 static __inline void
mps_free_chain(struct mps_softc * sc,struct mps_chain * chain)538 mps_free_chain(struct mps_softc *sc, struct mps_chain *chain)
539 {
540 sc->chain_free++;
541 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
542 }
543
544 static __inline void
mps_free_command(struct mps_softc * sc,struct mps_command * cm)545 mps_free_command(struct mps_softc *sc, struct mps_command *cm)
546 {
547 struct mps_chain *chain, *chain_temp;
548
549 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY,
550 ("state not busy: %u\n", cm->cm_state));
551
552 if (cm->cm_reply != NULL)
553 mps_free_reply(sc, cm->cm_reply_data);
554 cm->cm_reply = NULL;
555 cm->cm_flags = 0;
556 cm->cm_complete = NULL;
557 cm->cm_complete_data = NULL;
558 cm->cm_ccb = NULL;
559 cm->cm_targ = NULL;
560 cm->cm_max_segs = 0;
561 cm->cm_lun = 0;
562 cm->cm_state = MPS_CM_STATE_FREE;
563 cm->cm_data = NULL;
564 cm->cm_length = 0;
565 cm->cm_out_len = 0;
566 cm->cm_sglsize = 0;
567 cm->cm_sge = NULL;
568
569 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
570 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
571 mps_free_chain(sc, chain);
572 }
573 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
574 }
575
576 static __inline struct mps_command *
mps_alloc_command(struct mps_softc * sc)577 mps_alloc_command(struct mps_softc *sc)
578 {
579 struct mps_command *cm;
580
581 cm = TAILQ_FIRST(&sc->req_list);
582 if (cm == NULL)
583 return (NULL);
584
585 KASSERT(cm->cm_state == MPS_CM_STATE_FREE,
586 ("mps: Allocating busy command: %u\n", cm->cm_state));
587
588 TAILQ_REMOVE(&sc->req_list, cm, cm_link);
589 cm->cm_state = MPS_CM_STATE_BUSY;
590 cm->cm_timeout_handler = NULL;
591 return (cm);
592 }
593
594 static __inline void
mps_free_high_priority_command(struct mps_softc * sc,struct mps_command * cm)595 mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm)
596 {
597 struct mps_chain *chain, *chain_temp;
598
599 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY,
600 ("state not busy: %u\n", cm->cm_state));
601
602 if (cm->cm_reply != NULL)
603 mps_free_reply(sc, cm->cm_reply_data);
604 cm->cm_reply = NULL;
605 cm->cm_flags = 0;
606 cm->cm_complete = NULL;
607 cm->cm_complete_data = NULL;
608 cm->cm_ccb = NULL;
609 cm->cm_targ = NULL;
610 cm->cm_lun = 0;
611 cm->cm_state = MPS_CM_STATE_FREE;
612 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
613 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
614 mps_free_chain(sc, chain);
615 }
616 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
617 }
618
619 static __inline struct mps_command *
mps_alloc_high_priority_command(struct mps_softc * sc)620 mps_alloc_high_priority_command(struct mps_softc *sc)
621 {
622 struct mps_command *cm;
623
624 cm = TAILQ_FIRST(&sc->high_priority_req_list);
625 if (cm == NULL)
626 return (NULL);
627
628 KASSERT(cm->cm_state == MPS_CM_STATE_FREE,
629 ("mps: Allocating high priority busy command: %u\n", cm->cm_state));
630
631 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
632 cm->cm_state = MPS_CM_STATE_BUSY;
633 cm->cm_timeout_handler = NULL;
634 cm->cm_desc.HighPriority.RequestFlags =
635 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
636 return (cm);
637 }
638
639 static __inline void
mps_lock(struct mps_softc * sc)640 mps_lock(struct mps_softc *sc)
641 {
642 mtx_lock(&sc->mps_mtx);
643 }
644
645 static __inline void
mps_unlock(struct mps_softc * sc)646 mps_unlock(struct mps_softc *sc)
647 {
648 mtx_unlock(&sc->mps_mtx);
649 }
650
651 #define MPS_INFO (1 << 0) /* Basic info */
652 #define MPS_FAULT (1 << 1) /* Hardware faults */
653 #define MPS_EVENT (1 << 2) /* Event data from the controller */
654 #define MPS_LOG (1 << 3) /* Log data from the controller */
655 #define MPS_RECOVERY (1 << 4) /* Command error recovery tracing */
656 #define MPS_ERROR (1 << 5) /* Parameter errors, programming bugs */
657 #define MPS_INIT (1 << 6) /* Things related to system init */
658 #define MPS_XINFO (1 << 7) /* More detailed/noisy info */
659 #define MPS_USER (1 << 8) /* Trace user-generated commands */
660 #define MPS_MAPPING (1 << 9) /* Trace device mappings */
661 #define MPS_TRACE (1 << 10) /* Function-by-function trace */
662
663 #define MPS_SSU_DISABLE_SSD_DISABLE_HDD 0
664 #define MPS_SSU_ENABLE_SSD_DISABLE_HDD 1
665 #define MPS_SSU_DISABLE_SSD_ENABLE_HDD 2
666 #define MPS_SSU_ENABLE_SSD_ENABLE_HDD 3
667
668 #define mps_printf(sc, args...) \
669 device_printf((sc)->mps_dev, ##args)
670
671 #define mps_print_field(sc, msg, args...) \
672 printf("\t" msg, ##args)
673
674 #define mps_vprintf(sc, args...) \
675 do { \
676 if (bootverbose) \
677 mps_printf(sc, ##args); \
678 } while (0)
679
680 #define mps_dprint(sc, level, msg, args...) \
681 do { \
682 if ((sc)->mps_debug & (level)) \
683 device_printf((sc)->mps_dev, msg, ##args); \
684 } while (0)
685
686 #define MPS_PRINTFIELD_START(sc, tag...) \
687 mps_printf((sc), ##tag); \
688 mps_print_field((sc), ":\n")
689 #define MPS_PRINTFIELD_END(sc, tag) \
690 mps_printf((sc), tag "\n")
691 #define MPS_PRINTFIELD(sc, facts, attr, fmt) \
692 mps_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
693
694 #define MPS_FUNCTRACE(sc) \
695 mps_dprint((sc), MPS_TRACE, "%s\n", __func__)
696
697 #define CAN_SLEEP 1
698 #define NO_SLEEP 0
699
700 static __inline void
mps_from_u64(uint64_t data,U64 * mps)701 mps_from_u64(uint64_t data, U64 *mps)
702 {
703 (mps)->High = htole32((uint32_t)((data) >> 32));
704 (mps)->Low = htole32((uint32_t)((data) & 0xffffffff));
705 }
706
707 static __inline uint64_t
mps_to_u64(U64 * data)708 mps_to_u64(U64 *data)
709 {
710
711 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
712 }
713
714 static __inline void
mps_mask_intr(struct mps_softc * sc)715 mps_mask_intr(struct mps_softc *sc)
716 {
717 uint32_t mask;
718
719 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
720 mask |= MPI2_HIM_REPLY_INT_MASK;
721 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
722 }
723
724 static __inline void
mps_unmask_intr(struct mps_softc * sc)725 mps_unmask_intr(struct mps_softc *sc)
726 {
727 uint32_t mask;
728
729 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
730 mask &= ~MPI2_HIM_REPLY_INT_MASK;
731 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
732 }
733
734 int mps_pci_setup_interrupts(struct mps_softc *sc);
735 void mps_pci_free_interrupts(struct mps_softc *sc);
736 int mps_pci_restore(struct mps_softc *sc);
737
738 void mps_get_tunables(struct mps_softc *sc);
739 int mps_attach(struct mps_softc *sc);
740 int mps_free(struct mps_softc *sc);
741 void mps_intr(void *);
742 void mps_intr_msi(void *);
743 void mps_intr_locked(void *);
744 int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *,
745 void *, struct mps_event_handle **);
746 int mps_restart(struct mps_softc *);
747 int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *);
748 void mps_deregister_events(struct mps_softc *, struct mps_event_handle *);
749 int mps_push_sge(struct mps_command *, void *, size_t, int);
750 int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int);
751 int mps_attach_sas(struct mps_softc *sc);
752 int mps_detach_sas(struct mps_softc *sc);
753 int mps_read_config_page(struct mps_softc *, struct mps_config_params *);
754 int mps_write_config_page(struct mps_softc *, struct mps_config_params *);
755 void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int );
756 void mps_memaddr_wait_cb(void *, bus_dma_segment_t *, int , int );
757 void mpi_init_sge(struct mps_command *cm, void *req, void *sge);
758 int mps_attach_user(struct mps_softc *);
759 void mps_detach_user(struct mps_softc *);
760 void mpssas_record_event(struct mps_softc *sc,
761 MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
762
763 int mps_map_command(struct mps_softc *sc, struct mps_command *cm);
764 int mps_wait_command(struct mps_softc *sc, struct mps_command **cm, int timeout,
765 int sleep_flag);
766
767 int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t
768 *mpi_reply, Mpi2BiosPage3_t *config_page);
769 int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t
770 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
771 int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *,
772 Mpi2IOCPage8_t *);
773 int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply);
774 int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
775 Mpi2SasDevicePage0_t *, u32 , u16 );
776 int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
777 Mpi2DriverMappingPage0_t *, u16 );
778 int mps_config_get_raid_volume_pg1(struct mps_softc *sc,
779 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
780 u16 handle);
781 int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle,
782 u64 *wwid);
783 int mps_config_get_raid_pd_pg0(struct mps_softc *sc,
784 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
785 u32 page_address);
786 void mpssas_ir_shutdown(struct mps_softc *sc, int howto);
787
788 int mps_reinit(struct mps_softc *sc);
789 void mpssas_handle_reinit(struct mps_softc *sc);
790
791 void mps_base_static_config_pages(struct mps_softc *sc);
792 void mps_wd_config_pages(struct mps_softc *sc);
793
794 int mps_mapping_initialize(struct mps_softc *);
795 void mps_mapping_topology_change_event(struct mps_softc *,
796 Mpi2EventDataSasTopologyChangeList_t *);
797 void mps_mapping_free_memory(struct mps_softc *sc);
798 int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
799 Mpi2DriverMappingPage0_t *, u16 );
800 void mps_mapping_exit(struct mps_softc *);
801 void mps_mapping_check_devices(void *);
802 int mps_mapping_allocate_memory(struct mps_softc *sc);
803 unsigned int mps_mapping_get_tid(struct mps_softc *, uint64_t , u16);
804 unsigned int mps_mapping_get_tid_from_handle(struct mps_softc *sc,
805 u16 handle);
806 unsigned int mps_mapping_get_raid_tid(struct mps_softc *sc, u64 wwid,
807 u16 volHandle);
808 unsigned int mps_mapping_get_raid_tid_from_handle(struct mps_softc *sc,
809 u16 volHandle);
810 void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *,
811 Mpi2EventDataSasEnclDevStatusChange_t *event_data);
812 void mps_mapping_ir_config_change_event(struct mps_softc *sc,
813 Mpi2EventDataIrConfigChangeList_t *event_data);
814 int mps_mapping_dump(SYSCTL_HANDLER_ARGS);
815 int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS);
816
817 void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data,
818 MPI2_EVENT_NOTIFICATION_REPLY *event);
819 void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle);
820 void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle);
821 int mpssas_startup(struct mps_softc *sc);
822 struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t);
823 void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets);
824 struct mps_command * mpssas_alloc_tm(struct mps_softc *sc);
825 void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm);
826 void mpssas_release_simq_reinit(struct mpssas_softc *sassc);
827 int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm,
828 uint8_t type);
829
830 SYSCTL_DECL(_hw_mps);
831
832 /* Compatibility shims for different OS versions */
833 #if defined(CAM_PRIORITY_XPT)
834 #define MPS_PRIORITY_XPT CAM_PRIORITY_XPT
835 #else
836 #define MPS_PRIORITY_XPT 5
837 #endif
838
839 #endif
840