1 /* 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2016-2025, Broadcom Inc. All rights reserved. 5 * Support: <fbsd-storage-driver.pdl@broadcom.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are 9 * met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation and/or other 15 * materials provided with the distribution. 16 * 3. Neither the name of the Broadcom Inc. nor the names of its contributors 17 * may be used to endorse or promote products derived from this software without 18 * specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 * 32 * The views and conclusions contained in the software and documentation are 33 * those of the authors and should not be interpreted as representing 34 * official policies,either expressed or implied, of the FreeBSD Project. 35 * 36 * Mail to: Broadcom Inc 1320 Ridder Park Dr, San Jose, CA 95131 37 * 38 * Broadcom Inc. (Broadcom) MPI3MR Adapter FreeBSD 39 * 40 */ 41 42 #ifndef MPI30_IOC_H 43 #define MPI30_IOC_H 1 44 45 /***************************************************************************** 46 * IOC Messages * 47 ****************************************************************************/ 48 49 /***************************************************************************** 50 * IOCInit Request Message * 51 ****************************************************************************/ 52 typedef struct _MPI3_IOC_INIT_REQUEST 53 { 54 U16 HostTag; /* 0x00 */ 55 U8 IOCUseOnly02; /* 0x02 */ 56 U8 Function; /* 0x03 */ 57 U16 IOCUseOnly04; /* 0x04 */ 58 U8 IOCUseOnly06; /* 0x06 */ 59 U8 MsgFlags; /* 0x07 */ 60 U16 ChangeCount; /* 0x08 */ 61 U16 Reserved0A; /* 0x0A */ 62 MPI3_VERSION_UNION MPIVersion; /* 0x0C */ 63 U64 TimeStamp; /* 0x10 */ 64 U8 Reserved18; /* 0x18 */ 65 U8 WhoInit; /* 0x19 */ 66 U16 Reserved1A; /* 0x1A */ 67 U16 ReplyFreeQueueDepth; /* 0x1C */ 68 U16 Reserved1E; /* 0x1E */ 69 U64 ReplyFreeQueueAddress; /* 0x20 */ 70 U32 Reserved28; /* 0x28 */ 71 U16 SenseBufferFreeQueueDepth; /* 0x2C */ 72 U16 SenseBufferLength; /* 0x2E */ 73 U64 SenseBufferFreeQueueAddress; /* 0x30 */ 74 U64 DriverInformationAddress; /* 0x38 */ 75 } MPI3_IOC_INIT_REQUEST, MPI3_POINTER PTR_MPI3_IOC_INIT_REQUEST, 76 Mpi3IOCInitRequest_t, MPI3_POINTER pMpi3IOCInitRequest_t; 77 78 /**** Defines for the MsgFlags field ****/ 79 #define MPI3_IOCINIT_MSGFLAGS_WRITESAMEDIVERT_SUPPORTED (0x08) 80 #define MPI3_IOCINIT_MSGFLAGS_SCSIIOSTATUSREPLY_SUPPORTED (0x04) 81 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_MASK (0x03) 82 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_SHIFT (0) 83 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_NOT_USED (0x00) 84 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_SEPARATED (0x01) 85 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_INLINE (0x02) 86 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_BOTH (0x03) 87 88 /**** Defines for the WhoInit field ****/ 89 #define MPI3_WHOINIT_NOT_INITIALIZED (0x00) 90 #define MPI3_WHOINIT_ROM_BIOS (0x02) 91 #define MPI3_WHOINIT_HOST_DRIVER (0x03) 92 #define MPI3_WHOINIT_MANUFACTURER (0x04) 93 94 /**** Defines for the DriverInformationAddress field */ 95 typedef struct _MPI3_DRIVER_INFO_LAYOUT 96 { 97 U32 InformationLength; /* 0x00 */ 98 U8 DriverSignature[12]; /* 0x04 */ 99 U8 OsName[16]; /* 0x10 */ 100 U8 OsVersion[12]; /* 0x20 */ 101 U8 DriverName[20]; /* 0x2C */ 102 U8 DriverVersion[32]; /* 0x40 */ 103 U8 DriverReleaseDate[20]; /* 0x60 */ 104 U32 DriverCapabilities; /* 0x74 */ 105 } MPI3_DRIVER_INFO_LAYOUT, MPI3_POINTER PTR_MPI3_DRIVER_INFO_LAYOUT, 106 Mpi3DriverInfoLayout_t, MPI3_POINTER pMpi3DriverInfoLayout_t; 107 108 #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_MASK (0x00000003) 109 #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_SHIFT (0) 110 #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_NO_GUIDANCE (0x00000000) 111 #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_NO_SPECIAL (0x00000001) 112 #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_REPORT_AS_HDD (0x00000002) 113 #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_REPORT_AS_SSD (0x00000003) 114 115 /***************************************************************************** 116 * IOCFacts Request Message * 117 ****************************************************************************/ 118 typedef struct _MPI3_IOC_FACTS_REQUEST 119 { 120 U16 HostTag; /* 0x00 */ 121 U8 IOCUseOnly02; /* 0x02 */ 122 U8 Function; /* 0x03 */ 123 U16 IOCUseOnly04; /* 0x04 */ 124 U8 IOCUseOnly06; /* 0x06 */ 125 U8 MsgFlags; /* 0x07 */ 126 U16 ChangeCount; /* 0x08 */ 127 U16 Reserved0A; /* 0x0A */ 128 U32 Reserved0C; /* 0x0C */ 129 MPI3_SGE_UNION SGL; /* 0x10 */ 130 } MPI3_IOC_FACTS_REQUEST, MPI3_POINTER PTR_MPI3_IOC_FACTS_REQUEST, 131 Mpi3IOCFactsRequest_t, MPI3_POINTER pMpi3IOCFactsRequest_t; 132 133 /***************************************************************************** 134 * IOCFacts Data * 135 ****************************************************************************/ 136 typedef struct _MPI3_IOC_FACTS_DATA 137 { 138 U16 IOCFactsDataLength; /* 0x00 */ 139 U16 Reserved02; /* 0x02 */ 140 MPI3_VERSION_UNION MPIVersion; /* 0x04 */ 141 MPI3_COMP_IMAGE_VERSION FWVersion; /* 0x08 */ 142 U32 IOCCapabilities; /* 0x10 */ 143 U8 IOCNumber; /* 0x14 */ 144 U8 WhoInit; /* 0x15 */ 145 U16 MaxMSIxVectors; /* 0x16 */ 146 U16 MaxOutstandingRequests; /* 0x18 */ 147 U16 ProductID; /* 0x1A */ 148 U16 IOCRequestFrameSize; /* 0x1C */ 149 U16 ReplyFrameSize; /* 0x1E */ 150 U16 IOCExceptions; /* 0x20 */ 151 U16 MaxPersistentID; /* 0x22 */ 152 U8 SGEModifierMask; /* 0x24 */ 153 U8 SGEModifierValue; /* 0x25 */ 154 U8 SGEModifierShift; /* 0x26 */ 155 U8 ProtocolFlags; /* 0x27 */ 156 U16 MaxSASInitiators; /* 0x28 */ 157 U16 MaxDataLength; /* 0x2A */ 158 U16 MaxSASExpanders; /* 0x2C */ 159 U16 MaxEnclosures; /* 0x2E */ 160 U16 MinDevHandle; /* 0x30 */ 161 U16 MaxDevHandle; /* 0x32 */ 162 U16 MaxPCIeSwitches; /* 0x34 */ 163 U16 MaxNVMe; /* 0x36 */ 164 U16 Reserved38; /* 0x38 */ 165 U16 MaxVDs; /* 0x3A */ 166 U16 MaxHostPDs; /* 0x3C */ 167 U16 MaxAdvHostPDs; /* 0x3E */ 168 U16 MaxRAIDPDs; /* 0x40 */ 169 U16 MaxPostedCmdBuffers; /* 0x42 */ 170 U32 Flags; /* 0x44 */ 171 U16 MaxOperationalRequestQueues; /* 0x48 */ 172 U16 MaxOperationalReplyQueues; /* 0x4A */ 173 U16 ShutdownTimeout; /* 0x4C */ 174 U16 Reserved4E; /* 0x4E */ 175 U32 DiagTraceSize; /* 0x50 */ 176 U32 DiagFwSize; /* 0x54 */ 177 U32 DiagDriverSize; /* 0x58 */ 178 U8 MaxHostPDNsCount; /* 0x5C */ 179 U8 MaxAdvHostPDNsCount; /* 0x5D */ 180 U8 MaxRAIDPDNsCount; /* 0x5E */ 181 U8 MaxDevicesPerThrottleGroup; /* 0x5F */ 182 U16 IOThrottleDataLength; /* 0x60 */ 183 U16 MaxIOThrottleGroup; /* 0x62 */ 184 U16 IOThrottleLow; /* 0x64 */ 185 U16 IOThrottleHigh; /* 0x66 */ 186 U32 DiagFdlSize; /* 0x68 */ 187 U32 DiagTtySize; /* 0x6C */ 188 } MPI3_IOC_FACTS_DATA, MPI3_POINTER PTR_MPI3_IOC_FACTS_DATA, 189 Mpi3IOCFactsData_t, MPI3_POINTER pMpi3IOCFactsData_t; 190 191 /**** Defines for the IOCCapabilities field ****/ 192 #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_MASK (0x80000000) 193 #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_SHIFT (31) 194 #define MPI3_IOCFACTS_CAPABILITY_SUPERVISOR_IOC (0x00000000) 195 #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_IOC (0x80000000) 196 #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_MASK (0x00000600) 197 #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_SHIFT (9) 198 #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_FIXED_THRESHOLD (0x00000000) 199 #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_OUTSTANDING_IO (0x00000200) 200 #define MPI3_IOCFACTS_CAPABILITY_COMPLETE_RESET_SUPPORTED (0x00000100) 201 #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_TRACE_SUPPORTED (0x00000080) 202 #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_FW_SUPPORTED (0x00000040) 203 #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_DRIVER_SUPPORTED (0x00000020) 204 #define MPI3_IOCFACTS_CAPABILITY_ADVANCED_HOST_PD_SUPPORTED (0x00000010) 205 #define MPI3_IOCFACTS_CAPABILITY_RAID_SUPPORTED (0x00000008) 206 #define MPI3_IOCFACTS_CAPABILITY_MULTIPATH_SUPPORTED (0x00000002) 207 #define MPI3_IOCFACTS_CAPABILITY_COALESCE_CTRL_SUPPORTED (0x00000001) 208 209 /**** WhoInit values are defined under IOCInit Request Message definition ****/ 210 211 /**** Defines for the ProductID field ****/ 212 #define MPI3_IOCFACTS_PID_TYPE_MASK (0xF000) 213 #define MPI3_IOCFACTS_PID_TYPE_SHIFT (12) 214 #define MPI3_IOCFACTS_PID_PRODUCT_MASK (0x0F00) 215 #define MPI3_IOCFACTS_PID_PRODUCT_SHIFT (8) 216 #define MPI3_IOCFACTS_PID_FAMILY_MASK (0x00FF) 217 #define MPI3_IOCFACTS_PID_FAMILY_SHIFT (0) 218 219 /**** Defines for the IOCExceptions field ****/ 220 #define MPI3_IOCFACTS_EXCEPT_SECURITY_REKEY (0x2000) 221 #define MPI3_IOCFACTS_EXCEPT_SAS_DISABLED (0x1000) 222 #define MPI3_IOCFACTS_EXCEPT_SAFE_MODE (0x0800) 223 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_MASK (0x0700) 224 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_SHIFT (8) 225 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_NONE (0x0000) 226 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_MGMT (0x0100) 227 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_MGMT (0x0200) 228 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_MGMT (0x0300) 229 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_OOB (0x0400) 230 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_OOB (0x0500) 231 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_OOB (0x0600) 232 #define MPI3_IOCFACTS_EXCEPT_PCIE_DISABLED (0x0080) 233 #define MPI3_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE (0x0040) 234 #define MPI3_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL (0x0020) 235 #define MPI3_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0010) 236 #define MPI3_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0008) 237 #define MPI3_IOCFACTS_EXCEPT_BLOCKING_BOOT_EVENT (0x0004) 238 #define MPI3_IOCFACTS_EXCEPT_SECURITY_SELFTEST_FAILURE (0x0002) 239 #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_MASK (0x0001) 240 #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_SHIFT (0) 241 #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_PRIMARY (0x0000) 242 #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_SECONDARY (0x0001) 243 244 /**** Defines for the ProtocolFlags field ****/ 245 #define MPI3_IOCFACTS_PROTOCOL_SAS (0x0010) 246 #define MPI3_IOCFACTS_PROTOCOL_SATA (0x0008) 247 #define MPI3_IOCFACTS_PROTOCOL_NVME (0x0004) 248 #define MPI3_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002) 249 #define MPI3_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001) 250 251 /**** Defines for the MaxDataLength field ****/ 252 #define MPI3_IOCFACTS_MAX_DATA_LENGTH_NOT_REPORTED (0x0000) 253 254 /**** Defines for the Flags field ****/ 255 #define MPI3_IOCFACTS_FLAGS_SIGNED_NVDATA_REQUIRED (0x00010000) 256 #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK (0x0000FF00) 257 #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT (8) 258 #define MPI3_IOCFACTS_FLAGS_MAX_REQ_PER_REPLY_QUEUE_LIMIT (0x00000040) 259 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_MASK (0x00000030) 260 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_SHIFT (4) 261 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_NOT_STARTED (0x00000000) 262 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_IN_PROGRESS (0x00000010) 263 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_COMPLETE (0x00000020) 264 #define MPI3_IOCFACTS_FLAGS_PERSONALITY_MASK (0x0000000F) 265 #define MPI3_IOCFACTS_FLAGS_PERSONALITY_SHIFT (0) 266 #define MPI3_IOCFACTS_FLAGS_PERSONALITY_EHBA (0x00000000) 267 #define MPI3_IOCFACTS_FLAGS_PERSONALITY_RAID_DDR (0x00000002) 268 269 /**** Defines for the IOThrottleDataLength field ****/ 270 #define MPI3_IOCFACTS_IO_THROTTLE_DATA_LENGTH_NOT_REQUIRED (0x0000) 271 272 /**** Defines for the MaxIOThrottleGroup field ****/ 273 #define MPI3_IOCFACTS_MAX_IO_THROTTLE_GROUP_NOT_REQUIRED (0x0000) 274 275 /**** Defines for the DiagFdlSize field ****/ 276 #define MPI3_IOCFACTS_DIAGFDLSIZE_NOT_SUPPORTED (0x00000000) 277 278 /**** Defines for the DiagTtySize field ****/ 279 #define MPI3_IOCFACTS_DIAGTTYSIZE_NOT_SUPPORTED (0x00000000) 280 281 /***************************************************************************** 282 * Management Passthrough Request Message * 283 ****************************************************************************/ 284 typedef struct _MPI3_MGMT_PASSTHROUGH_REQUEST 285 { 286 U16 HostTag; /* 0x00 */ 287 U8 IOCUseOnly02; /* 0x02 */ 288 U8 Function; /* 0x03 */ 289 U16 IOCUseOnly04; /* 0x04 */ 290 U8 IOCUseOnly06; /* 0x06 */ 291 U8 MsgFlags; /* 0x07 */ 292 U16 ChangeCount; /* 0x08 */ 293 U16 Reserved0A; /* 0x0A */ 294 U32 Reserved0C[5]; /* 0x0C */ 295 MPI3_SGE_UNION CommandSGL; /* 0x20 */ 296 MPI3_SGE_UNION ResponseSGL; /* 0x30 */ 297 } MPI3_MGMT_PASSTHROUGH_REQUEST, MPI3_POINTER PTR_MPI3_MGMT_PASSTHROUGH_REQUEST, 298 Mpi3MgmtPassthroughRequest_t, MPI3_POINTER pMpi3MgmtPassthroughRequest_t; 299 300 /***************************************************************************** 301 * CreateRequestQueue Request Message * 302 ****************************************************************************/ 303 typedef struct _MPI3_CREATE_REQUEST_QUEUE_REQUEST 304 { 305 U16 HostTag; /* 0x00 */ 306 U8 IOCUseOnly02; /* 0x02 */ 307 U8 Function; /* 0x03 */ 308 U16 IOCUseOnly04; /* 0x04 */ 309 U8 IOCUseOnly06; /* 0x06 */ 310 U8 MsgFlags; /* 0x07 */ 311 U16 ChangeCount; /* 0x08 */ 312 U8 Flags; /* 0x0A */ 313 U8 Burst; /* 0x0B */ 314 U16 Size; /* 0x0C */ 315 U16 QueueID; /* 0x0E */ 316 U16 ReplyQueueID; /* 0x10 */ 317 U16 Reserved12; /* 0x12 */ 318 U32 Reserved14; /* 0x14 */ 319 U64 BaseAddress; /* 0x18 */ 320 } MPI3_CREATE_REQUEST_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_CREATE_REQUEST_QUEUE_REQUEST, 321 Mpi3CreateRequestQueueRequest_t, MPI3_POINTER pMpi3CreateRequestQueueRequest_t; 322 323 /**** Defines for the Flags field ****/ 324 #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_MASK (0x80) 325 #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SHIFT (7) 326 #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SEGMENTED (0x80) 327 #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS (0x00) 328 329 /**** Defines for the Size field ****/ 330 #define MPI3_CREATE_REQUEST_QUEUE_SIZE_MINIMUM (2) 331 332 /***************************************************************************** 333 * DeleteRequestQueue Request Message * 334 ****************************************************************************/ 335 typedef struct _MPI3_DELETE_REQUEST_QUEUE_REQUEST 336 { 337 U16 HostTag; /* 0x00 */ 338 U8 IOCUseOnly02; /* 0x02 */ 339 U8 Function; /* 0x03 */ 340 U16 IOCUseOnly04; /* 0x04 */ 341 U8 IOCUseOnly06; /* 0x06 */ 342 U8 MsgFlags; /* 0x07 */ 343 U16 ChangeCount; /* 0x08 */ 344 U16 QueueID; /* 0x0A */ 345 } MPI3_DELETE_REQUEST_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_DELETE_REQUEST_QUEUE_REQUEST, 346 Mpi3DeleteRequestQueueRequest_t, MPI3_POINTER pMpi3DeleteRequestQueueRequest_t; 347 348 349 /***************************************************************************** 350 * CreateReplyQueue Request Message * 351 ****************************************************************************/ 352 typedef struct _MPI3_CREATE_REPLY_QUEUE_REQUEST 353 { 354 U16 HostTag; /* 0x00 */ 355 U8 IOCUseOnly02; /* 0x02 */ 356 U8 Function; /* 0x03 */ 357 U16 IOCUseOnly04; /* 0x04 */ 358 U8 IOCUseOnly06; /* 0x06 */ 359 U8 MsgFlags; /* 0x07 */ 360 U16 ChangeCount; /* 0x08 */ 361 U8 Flags; /* 0x0A */ 362 U8 Reserved0B; /* 0x0B */ 363 U16 Size; /* 0x0C */ 364 U16 QueueID; /* 0x0E */ 365 U16 MSIxIndex; /* 0x10 */ 366 U16 Reserved12; /* 0x12 */ 367 U32 Reserved14; /* 0x14 */ 368 U64 BaseAddress; /* 0x18 */ 369 } MPI3_CREATE_REPLY_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_CREATE_REPLY_QUEUE_REQUEST, 370 Mpi3CreateReplyQueueRequest_t, MPI3_POINTER pMpi3CreateReplyQueueRequest_t; 371 372 /**** Defines for the Flags field ****/ 373 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_MASK (0x80) 374 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_SHIFT (7) 375 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_SEGMENTED (0x80) 376 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS (0x00) 377 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_COALESCE_DISABLE (0x02) 378 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_MASK (0x01) 379 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_SHIFT (0) 380 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_DISABLE (0x00) 381 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_ENABLE (0x01) 382 383 /**** Defines for the Size field ****/ 384 #define MPI3_CREATE_REPLY_QUEUE_SIZE_MINIMUM (2) 385 386 /***************************************************************************** 387 * DeleteReplyQueue Request Message * 388 ****************************************************************************/ 389 typedef struct _MPI3_DELETE_REPLY_QUEUE_REQUEST 390 { 391 U16 HostTag; /* 0x00 */ 392 U8 IOCUseOnly02; /* 0x02 */ 393 U8 Function; /* 0x03 */ 394 U16 IOCUseOnly04; /* 0x04 */ 395 U8 IOCUseOnly06; /* 0x06 */ 396 U8 MsgFlags; /* 0x07 */ 397 U16 ChangeCount; /* 0x08 */ 398 U16 QueueID; /* 0x0A */ 399 } MPI3_DELETE_REPLY_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_DELETE_REPLY_QUEUE_REQUEST, 400 Mpi3DeleteReplyQueueRequest_t, MPI3_POINTER pMpi3DeleteReplyQueueRequest_t; 401 402 403 /***************************************************************************** 404 * PortEnable Request Message * 405 ****************************************************************************/ 406 typedef struct _MPI3_PORT_ENABLE_REQUEST 407 { 408 U16 HostTag; /* 0x00 */ 409 U8 IOCUseOnly02; /* 0x02 */ 410 U8 Function; /* 0x03 */ 411 U16 IOCUseOnly04; /* 0x04 */ 412 U8 IOCUseOnly06; /* 0x06 */ 413 U8 MsgFlags; /* 0x07 */ 414 U16 ChangeCount; /* 0x08 */ 415 U16 Reserved0A; /* 0x0A */ 416 } MPI3_PORT_ENABLE_REQUEST, MPI3_POINTER PTR_MPI3_PORT_ENABLE_REQUEST, 417 Mpi3PortEnableRequest_t, MPI3_POINTER pMpi3PortEnableRequest_t; 418 419 420 /***************************************************************************** 421 * IOC Events and Event Management * 422 ****************************************************************************/ 423 #define MPI3_EVENT_LOG_DATA (0x01) 424 #define MPI3_EVENT_CHANGE (0x02) 425 #define MPI3_EVENT_GPIO_INTERRUPT (0x04) 426 #define MPI3_EVENT_CABLE_MGMT (0x06) 427 #define MPI3_EVENT_DEVICE_ADDED (0x07) 428 #define MPI3_EVENT_DEVICE_INFO_CHANGED (0x08) 429 #define MPI3_EVENT_PREPARE_FOR_RESET (0x09) 430 #define MPI3_EVENT_COMP_IMAGE_ACT_START (0x0A) 431 #define MPI3_EVENT_ENCL_DEVICE_ADDED (0x0B) 432 #define MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE (0x0C) 433 #define MPI3_EVENT_DEVICE_STATUS_CHANGE (0x0D) 434 #define MPI3_EVENT_ENERGY_PACK_CHANGE (0x0E) 435 #define MPI3_EVENT_SAS_DISCOVERY (0x11) 436 #define MPI3_EVENT_SAS_BROADCAST_PRIMITIVE (0x12) 437 #define MPI3_EVENT_SAS_NOTIFY_PRIMITIVE (0x13) 438 #define MPI3_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x14) 439 #define MPI3_EVENT_SAS_INIT_TABLE_OVERFLOW (0x15) 440 #define MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST (0x16) 441 #define MPI3_EVENT_SAS_PHY_COUNTER (0x18) 442 #define MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR (0x19) 443 #define MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST (0x20) 444 #define MPI3_EVENT_PCIE_ENUMERATION (0x22) 445 #define MPI3_EVENT_PCIE_ERROR_THRESHOLD (0x23) 446 #define MPI3_EVENT_HARD_RESET_RECEIVED (0x40) 447 #define MPI3_EVENT_DIAGNOSTIC_BUFFER_STATUS_CHANGE (0x50) 448 #define MPI3_EVENT_MIN_PRODUCT_SPECIFIC (0x60) 449 #define MPI3_EVENT_MAX_PRODUCT_SPECIFIC (0x7F) 450 451 452 /***************************************************************************** 453 * Event Notification Request Message * 454 ****************************************************************************/ 455 #define MPI3_EVENT_NOTIFY_EVENTMASK_WORDS (4) 456 457 typedef struct _MPI3_EVENT_NOTIFICATION_REQUEST 458 { 459 U16 HostTag; /* 0x00 */ 460 U8 IOCUseOnly02; /* 0x02 */ 461 U8 Function; /* 0x03 */ 462 U16 IOCUseOnly04; /* 0x04 */ 463 U8 IOCUseOnly06; /* 0x06 */ 464 U8 MsgFlags; /* 0x07 */ 465 U16 ChangeCount; /* 0x08 */ 466 U16 Reserved0A; /* 0x0A */ 467 U16 SASBroadcastPrimitiveMasks; /* 0x0C */ 468 U16 SASNotifyPrimitiveMasks; /* 0x0E */ 469 U32 EventMasks[MPI3_EVENT_NOTIFY_EVENTMASK_WORDS]; /* 0x10 */ 470 } MPI3_EVENT_NOTIFICATION_REQUEST, MPI3_POINTER PTR_MPI3_EVENT_NOTIFICATION_REQUEST, 471 Mpi3EventNotificationRequest_t, MPI3_POINTER pMpi3EventNotificationRequest_t; 472 473 /**** Defines for the SASBroadcastPrimitiveMasks field - use MPI3_EVENT_BROADCAST_PRIMITIVE_ values ****/ 474 475 /**** Defines for the SASNotifyPrimitiveMasks field - use MPI3_EVENT_NOTIFY_PRIMITIVE_ values ****/ 476 477 /**** Defines for the EventMasks field - use MPI3_EVENT_ values ****/ 478 479 /***************************************************************************** 480 * Event Notification Reply Message * 481 ****************************************************************************/ 482 typedef struct _MPI3_EVENT_NOTIFICATION_REPLY 483 { 484 U16 HostTag; /* 0x00 */ 485 U8 IOCUseOnly02; /* 0x02 */ 486 U8 Function; /* 0x03 */ 487 U16 IOCUseOnly04; /* 0x04 */ 488 U8 IOCUseOnly06; /* 0x06 */ 489 U8 MsgFlags; /* 0x07 */ 490 U16 IOCUseOnly08; /* 0x08 */ 491 U16 IOCStatus; /* 0x0A */ 492 U32 IOCLogInfo; /* 0x0C */ 493 U8 EventDataLength; /* 0x10 */ 494 U8 Event; /* 0x11 */ 495 U16 IOCChangeCount; /* 0x12 */ 496 U32 EventContext; /* 0x14 */ 497 U32 EventData[1]; /* 0x18 */ 498 } MPI3_EVENT_NOTIFICATION_REPLY, MPI3_POINTER PTR_MPI3_EVENT_NOTIFICATION_REPLY, 499 Mpi3EventNotificationReply_t, MPI3_POINTER pMpi3EventNotificationReply_t; 500 501 /**** Defines for the MsgFlags field ****/ 502 #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_MASK (0x01) 503 #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_SHIFT (0) 504 #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_REQUIRED (0x01) 505 #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_NOT_REQUIRED (0x00) 506 #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_MASK (0x02) 507 #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_SHIFT (1) 508 #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_ORIGINAL (0x00) 509 #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_REPLAY (0x02) 510 511 /**** Defines for the Event field - use MPI3_EVENT_ values ****/ 512 513 514 /***************************************************************************** 515 * GPIO Interrupt Event * 516 ****************************************************************************/ 517 typedef struct _MPI3_EVENT_DATA_GPIO_INTERRUPT 518 { 519 U8 GPIONum; /* 0x00 */ 520 U8 Reserved01[3]; /* 0x01 */ 521 } MPI3_EVENT_DATA_GPIO_INTERRUPT, MPI3_POINTER PTR_MPI3_EVENT_DATA_GPIO_INTERRUPT, 522 Mpi3EventDataGpioInterrupt_t, MPI3_POINTER pMpi3EventDataGpioInterrupt_t; 523 524 525 /***************************************************************************** 526 * Cable Management Event * 527 ****************************************************************************/ 528 typedef struct _MPI3_EVENT_DATA_CABLE_MANAGEMENT 529 { 530 U32 ActiveCablePowerRequirement; /* 0x00 */ 531 U8 Status; /* 0x04 */ 532 U8 ReceptacleID; /* 0x05 */ 533 U16 Reserved06; /* 0x06 */ 534 } MPI3_EVENT_DATA_CABLE_MANAGEMENT, MPI3_POINTER PTR_MPI3_EVENT_DATA_CABLE_MANAGEMENT, 535 Mpi3EventDataCableManagement_t, MPI3_POINTER pMpi3EventDataCableManagement_t; 536 537 /**** Defines for the ActiveCablePowerRequirement field ****/ 538 #define MPI3_EVENT_CABLE_MGMT_ACT_CABLE_PWR_INVALID (0xFFFFFFFF) 539 540 /**** Defines for the Status field ****/ 541 #define MPI3_EVENT_CABLE_MGMT_STATUS_INSUFFICIENT_POWER (0x00) 542 #define MPI3_EVENT_CABLE_MGMT_STATUS_PRESENT (0x01) 543 #define MPI3_EVENT_CABLE_MGMT_STATUS_DEGRADED (0x02) 544 545 546 /***************************************************************************** 547 * Event Ack Request Message * 548 ****************************************************************************/ 549 typedef struct _MPI3_EVENT_ACK_REQUEST 550 { 551 U16 HostTag; /* 0x00 */ 552 U8 IOCUseOnly02; /* 0x02 */ 553 U8 Function; /* 0x03 */ 554 U16 IOCUseOnly04; /* 0x04 */ 555 U8 IOCUseOnly06; /* 0x06 */ 556 U8 MsgFlags; /* 0x07 */ 557 U16 ChangeCount; /* 0x08 */ 558 U16 Reserved0A; /* 0x0A */ 559 U8 Event; /* 0x0C */ 560 U8 Reserved0D[3]; /* 0x0D */ 561 U32 EventContext; /* 0x10 */ 562 } MPI3_EVENT_ACK_REQUEST, MPI3_POINTER PTR_MPI3_EVENT_ACK_REQUEST, 563 Mpi3EventAckRequest_t, MPI3_POINTER pMpi3EventAckRequest_t; 564 565 /**** Defines for the Event field - use MPI3_EVENT_ values ****/ 566 567 568 /***************************************************************************** 569 * Prepare for Reset Event * 570 ****************************************************************************/ 571 typedef struct _MPI3_EVENT_DATA_PREPARE_FOR_RESET 572 { 573 U8 ReasonCode; /* 0x00 */ 574 U8 Reserved01; /* 0x01 */ 575 U16 Reserved02; /* 0x02 */ 576 } MPI3_EVENT_DATA_PREPARE_FOR_RESET, MPI3_POINTER PTR_MPI3_EVENT_DATA_PREPARE_FOR_RESET, 577 Mpi3EventDataPrepareForReset_t, MPI3_POINTER pMpi3EventDataPrepareForReset_t; 578 579 /**** Defines for the ReasonCode field ****/ 580 #define MPI3_EVENT_PREPARE_RESET_RC_START (0x01) 581 #define MPI3_EVENT_PREPARE_RESET_RC_ABORT (0x02) 582 583 584 /***************************************************************************** 585 * Component Image Activation Start Event * 586 ****************************************************************************/ 587 typedef struct _MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION 588 { 589 U32 Reserved00; /* 0x00 */ 590 } MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION, MPI3_POINTER PTR_MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION, 591 Mpi3EventDataCompImageActivation_t, MPI3_POINTER pMpi3EventDataCompImageActivation_t; 592 593 /***************************************************************************** 594 * Device Added Event * 595 ****************************************************************************/ 596 /* 597 * The Device Added Event Data is exactly the same as Device Page 0 data 598 * (including the Configuration Page header). So, please use/refer to 599 * MPI3_DEVICE_PAGE0 structure for Device Added Event data. 600 */ 601 602 /**************************************************************************** 603 * Device Info Changed Event * 604 ****************************************************************************/ 605 /* 606 * The Device Info Changed Event Data is exactly the same as Device Page 0 data 607 * (including the Configuration Page header). So, please use/refer to 608 * MPI3_DEVICE_PAGE0 structure for Device Added Event data. 609 */ 610 611 /***************************************************************************** 612 * Device Status Change Event * 613 ****************************************************************************/ 614 typedef struct _MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE 615 { 616 U16 TaskTag; /* 0x00 */ 617 U8 ReasonCode; /* 0x02 */ 618 U8 IOUnitPort; /* 0x03 */ 619 U16 ParentDevHandle; /* 0x04 */ 620 U16 DevHandle; /* 0x06 */ 621 U64 WWID; /* 0x08 */ 622 U8 LUN[8]; /* 0x10 */ 623 } MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE, 624 Mpi3EventDataDeviceStatusChange_t, MPI3_POINTER pMpi3EventDataDeviceStatusChange_t; 625 626 /**** Defines for the ReasonCode field ****/ 627 #define MPI3_EVENT_DEV_STAT_RC_MOVED (0x01) 628 #define MPI3_EVENT_DEV_STAT_RC_HIDDEN (0x02) 629 #define MPI3_EVENT_DEV_STAT_RC_NOT_HIDDEN (0x03) 630 #define MPI3_EVENT_DEV_STAT_RC_ASYNC_NOTIFICATION (0x04) 631 #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_STRT (0x20) 632 #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_CMP (0x21) 633 #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_STRT (0x22) 634 #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_CMP (0x23) 635 #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_STRT (0x24) 636 #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_CMP (0x25) 637 #define MPI3_EVENT_DEV_STAT_RC_PCIE_HOT_RESET_FAILED (0x30) 638 #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_STRT (0x40) 639 #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_CMP (0x41) 640 #define MPI3_EVENT_DEV_STAT_RC_VD_NOT_RESPONDING (0x50) 641 642 /***************************************************************************** 643 * Energy Pack Change Event * 644 ****************************************************************************/ 645 typedef struct _MPI3_EVENT_DATA_ENERGY_PACK_CHANGE 646 { 647 U32 Reserved00; /* 0x00 */ 648 U16 ShutdownTimeout; /* 0x04 */ 649 U16 Reserved06; /* 0x06 */ 650 } MPI3_EVENT_DATA_ENERGY_PACK_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_ENERGY_PACK_CHANGE, 651 Mpi3EventDataEnergyPackChange_t, MPI3_POINTER pMpi3EventDataEnergyPackChange_t; 652 653 /***************************************************************************** 654 * SAS Discovery Event * 655 ****************************************************************************/ 656 typedef struct _MPI3_EVENT_DATA_SAS_DISCOVERY 657 { 658 U8 Flags; /* 0x00 */ 659 U8 ReasonCode; /* 0x01 */ 660 U8 IOUnitPort; /* 0x02 */ 661 U8 Reserved03; /* 0x03 */ 662 U32 DiscoveryStatus; /* 0x04 */ 663 } MPI3_EVENT_DATA_SAS_DISCOVERY, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_DISCOVERY, 664 Mpi3EventDataSasDiscovery_t, MPI3_POINTER pMpi3EventDataSasDiscovery_t; 665 666 /**** Defines for the Flags field ****/ 667 #define MPI3_EVENT_SAS_DISC_FLAGS_DEVICE_CHANGE (0x02) 668 #define MPI3_EVENT_SAS_DISC_FLAGS_IN_PROGRESS (0x01) 669 670 /**** Defines for the ReasonCode field ****/ 671 #define MPI3_EVENT_SAS_DISC_RC_STARTED (0x01) 672 #define MPI3_EVENT_SAS_DISC_RC_COMPLETED (0x02) 673 674 /**** Defines for the DiscoveryStatus field ****/ 675 #define MPI3_SAS_DISC_STATUS_MAX_ENCLOSURES_EXCEED (0x80000000) 676 #define MPI3_SAS_DISC_STATUS_MAX_EXPANDERS_EXCEED (0x40000000) 677 #define MPI3_SAS_DISC_STATUS_MAX_DEVICES_EXCEED (0x20000000) 678 #define MPI3_SAS_DISC_STATUS_MAX_TOPO_PHYS_EXCEED (0x10000000) 679 #define MPI3_SAS_DISC_STATUS_INVALID_CEI (0x00010000) 680 #define MPI3_SAS_DISC_STATUS_FECEI_MISMATCH (0x00008000) 681 #define MPI3_SAS_DISC_STATUS_MULTIPLE_DEVICES_IN_SLOT (0x00004000) 682 #define MPI3_SAS_DISC_STATUS_NECEI_MISMATCH (0x00002000) 683 #define MPI3_SAS_DISC_STATUS_TOO_MANY_SLOTS (0x00001000) 684 #define MPI3_SAS_DISC_STATUS_EXP_MULTI_SUBTRACTIVE (0x00000800) 685 #define MPI3_SAS_DISC_STATUS_MULTI_PORT_DOMAIN (0x00000400) 686 #define MPI3_SAS_DISC_STATUS_TABLE_TO_SUBTRACTIVE_LINK (0x00000200) 687 #define MPI3_SAS_DISC_STATUS_UNSUPPORTED_DEVICE (0x00000100) 688 #define MPI3_SAS_DISC_STATUS_TABLE_LINK (0x00000080) 689 #define MPI3_SAS_DISC_STATUS_SUBTRACTIVE_LINK (0x00000040) 690 #define MPI3_SAS_DISC_STATUS_SMP_CRC_ERROR (0x00000020) 691 #define MPI3_SAS_DISC_STATUS_SMP_FUNCTION_FAILED (0x00000010) 692 #define MPI3_SAS_DISC_STATUS_SMP_TIMEOUT (0x00000008) 693 #define MPI3_SAS_DISC_STATUS_MULTIPLE_PORTS (0x00000004) 694 #define MPI3_SAS_DISC_STATUS_INVALID_SAS_ADDRESS (0x00000002) 695 #define MPI3_SAS_DISC_STATUS_LOOP_DETECTED (0x00000001) 696 697 698 /***************************************************************************** 699 * SAS Broadcast Primitive Event * 700 ****************************************************************************/ 701 typedef struct _MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE 702 { 703 U8 PhyNum; /* 0x00 */ 704 U8 IOUnitPort; /* 0x01 */ 705 U8 PortWidth; /* 0x02 */ 706 U8 Primitive; /* 0x03 */ 707 } MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, 708 Mpi3EventDataSasBroadcastPrimitive_t, MPI3_POINTER pMpi3EventDataSasBroadcastPrimitive_t; 709 710 /**** Defines for the Primitive field ****/ 711 #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE (0x01) 712 #define MPI3_EVENT_BROADCAST_PRIMITIVE_SES (0x02) 713 #define MPI3_EVENT_BROADCAST_PRIMITIVE_EXPANDER (0x03) 714 #define MPI3_EVENT_BROADCAST_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04) 715 #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED3 (0x05) 716 #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED4 (0x06) 717 #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE0_RESERVED (0x07) 718 #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE1_RESERVED (0x08) 719 720 721 /***************************************************************************** 722 * SAS Notify Primitive Event * 723 ****************************************************************************/ 724 typedef struct _MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE 725 { 726 U8 PhyNum; /* 0x00 */ 727 U8 IOUnitPort; /* 0x01 */ 728 U8 Reserved02; /* 0x02 */ 729 U8 Primitive; /* 0x03 */ 730 } MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, 731 Mpi3EventDataSasNotifyPrimitive_t, MPI3_POINTER pMpi3EventDataSasNotifyPrimitive_t; 732 733 /**** Defines for the Primitive field ****/ 734 #define MPI3_EVENT_NOTIFY_PRIMITIVE_ENABLE_SPINUP (0x01) 735 #define MPI3_EVENT_NOTIFY_PRIMITIVE_POWER_LOSS_EXPECTED (0x02) 736 #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED1 (0x03) 737 #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED2 (0x04) 738 739 740 /***************************************************************************** 741 * SAS Topology Change List Event * 742 ****************************************************************************/ 743 #ifndef MPI3_EVENT_SAS_TOPO_PHY_COUNT 744 #define MPI3_EVENT_SAS_TOPO_PHY_COUNT (1) 745 #endif /* MPI3_EVENT_SAS_TOPO_PHY_COUNT */ 746 747 typedef struct _MPI3_EVENT_SAS_TOPO_PHY_ENTRY 748 { 749 U16 AttachedDevHandle; /* 0x00 */ 750 U8 LinkRate; /* 0x02 */ 751 U8 PhyStatus; /* 0x03 */ 752 } MPI3_EVENT_SAS_TOPO_PHY_ENTRY, MPI3_POINTER PTR_MPI3_EVENT_SAS_TOPO_PHY_ENTRY, 753 Mpi3EventSasTopoPhyEntry_t, MPI3_POINTER pMpi3EventSasTopoPhyEntry_t; 754 755 /**** Defines for the LinkRate field ****/ 756 #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_MASK (0xF0) 757 #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_SHIFT (4) 758 #define MPI3_EVENT_SAS_TOPO_LR_PREV_MASK (0x0F) 759 #define MPI3_EVENT_SAS_TOPO_LR_PREV_SHIFT (0) 760 #define MPI3_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE (0x00) 761 #define MPI3_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01) 762 #define MPI3_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02) 763 #define MPI3_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03) 764 #define MPI3_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04) 765 #define MPI3_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05) 766 #define MPI3_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY (0x06) 767 #define MPI3_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A) 768 #define MPI3_EVENT_SAS_TOPO_LR_RATE_12_0 (0x0B) 769 #define MPI3_EVENT_SAS_TOPO_LR_RATE_22_5 (0x0C) 770 771 /**** Defines for the PhyStatus field ****/ 772 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_MASK (0xC0) 773 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_SHIFT (6) 774 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_ACCESSIBLE (0x00) 775 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_NO_EXIST (0x40) 776 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_VACANT (0x80) 777 #define MPI3_EVENT_SAS_TOPO_PHY_RC_MASK (0x0F) 778 #define MPI3_EVENT_SAS_TOPO_PHY_RC_SHIFT (0) 779 #define MPI3_EVENT_SAS_TOPO_PHY_RC_TARG_NOT_RESPONDING (0x02) 780 #define MPI3_EVENT_SAS_TOPO_PHY_RC_PHY_CHANGED (0x03) 781 #define MPI3_EVENT_SAS_TOPO_PHY_RC_NO_CHANGE (0x04) 782 #define MPI3_EVENT_SAS_TOPO_PHY_RC_DELAY_NOT_RESPONDING (0x05) 783 #define MPI3_EVENT_SAS_TOPO_PHY_RC_RESPONDING (0x06) 784 785 786 typedef struct _MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST 787 { 788 U16 EnclosureHandle; /* 0x00 */ 789 U16 ExpanderDevHandle; /* 0x02 */ 790 U8 NumPhys; /* 0x04 */ 791 U8 Reserved05[3]; /* 0x05 */ 792 U8 NumEntries; /* 0x08 */ 793 U8 StartPhyNum; /* 0x09 */ 794 U8 ExpStatus; /* 0x0A */ 795 U8 IOUnitPort; /* 0x0B */ 796 MPI3_EVENT_SAS_TOPO_PHY_ENTRY PhyEntry[MPI3_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C */ 797 } MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, 798 Mpi3EventDataSasTopologyChangeList_t, MPI3_POINTER pMpi3EventDataSasTopologyChangeList_t; 799 800 /**** Defines for the ExpStatus field ****/ 801 #define MPI3_EVENT_SAS_TOPO_ES_NO_EXPANDER (0x00) 802 #define MPI3_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02) 803 #define MPI3_EVENT_SAS_TOPO_ES_RESPONDING (0x03) 804 #define MPI3_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04) 805 806 /***************************************************************************** 807 * SAS PHY Counter Event * 808 ****************************************************************************/ 809 typedef struct _MPI3_EVENT_DATA_SAS_PHY_COUNTER 810 { 811 U64 TimeStamp; /* 0x00 */ 812 U32 Reserved08; /* 0x08 */ 813 U8 PhyEventCode; /* 0x0C */ 814 U8 PhyNum; /* 0x0D */ 815 U16 Reserved0E; /* 0x0E */ 816 U32 PhyEventInfo; /* 0x10 */ 817 U8 CounterType; /* 0x14 */ 818 U8 ThresholdWindow; /* 0x15 */ 819 U8 TimeUnits; /* 0x16 */ 820 U8 Reserved17; /* 0x17 */ 821 U32 EventThreshold; /* 0x18 */ 822 U16 ThresholdFlags; /* 0x1C */ 823 U16 Reserved1E; /* 0x1E */ 824 } MPI3_EVENT_DATA_SAS_PHY_COUNTER, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_PHY_COUNTER, 825 Mpi3EventDataSasPhyCounter_t, MPI3_POINTER pMpi3EventDataSasPhyCounter_t; 826 827 /**** Defines for the PhyEventCode field - use MPI3_SASPHY3_EVENT_CODE_ defines ****/ 828 829 /**** Defines for the CounterType field - use MPI3_SASPHY3_COUNTER_TYPE_ defines ****/ 830 831 /**** Defines for the TimeUnits field - use MPI3_SASPHY3_TIME_UNITS_ defines ****/ 832 833 /**** Defines for the ThresholdFlags field - use MPI3_SASPHY3_TFLAGS_ defines ****/ 834 835 836 /***************************************************************************** 837 * SAS Device Discovery Error Event * 838 ****************************************************************************/ 839 typedef struct _MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR 840 { 841 U16 DevHandle; /* 0x00 */ 842 U8 ReasonCode; /* 0x02 */ 843 U8 IOUnitPort; /* 0x03 */ 844 U32 Reserved04; /* 0x04 */ 845 U64 SASAddress; /* 0x08 */ 846 } MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR, 847 Mpi3EventDataSasDeviceDiscErr_t, MPI3_POINTER pMpi3EventDataSasDeviceDiscErr_t; 848 849 /**** Defines for the ReasonCode field ****/ 850 #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_FAILED (0x01) 851 #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_TIMEOUT (0x02) 852 853 /***************************************************************************** 854 * PCIe Enumeration Event * 855 ****************************************************************************/ 856 typedef struct _MPI3_EVENT_DATA_PCIE_ENUMERATION 857 { 858 U8 Flags; /* 0x00 */ 859 U8 ReasonCode; /* 0x01 */ 860 U8 IOUnitPort; /* 0x02 */ 861 U8 Reserved03; /* 0x03 */ 862 U32 EnumerationStatus; /* 0x04 */ 863 } MPI3_EVENT_DATA_PCIE_ENUMERATION, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_ENUMERATION, 864 Mpi3EventDataPcieEnumeration_t, MPI3_POINTER pMpi3EventDataPcieEnumeration_t; 865 866 /**** Defines for the Flags field ****/ 867 #define MPI3_EVENT_PCIE_ENUM_FLAGS_DEVICE_CHANGE (0x02) 868 #define MPI3_EVENT_PCIE_ENUM_FLAGS_IN_PROGRESS (0x01) 869 870 /**** Defines for the ReasonCode field ****/ 871 #define MPI3_EVENT_PCIE_ENUM_RC_STARTED (0x01) 872 #define MPI3_EVENT_PCIE_ENUM_RC_COMPLETED (0x02) 873 874 /**** Defines for the EnumerationStatus field ****/ 875 #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCH_DEPTH_EXCEED (0x80000000) 876 #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCHES_EXCEED (0x40000000) 877 #define MPI3_EVENT_PCIE_ENUM_ES_MAX_DEVICES_EXCEED (0x20000000) 878 #define MPI3_EVENT_PCIE_ENUM_ES_RESOURCES_EXHAUSTED (0x10000000) 879 880 881 /***************************************************************************** 882 * PCIe Topology Change List Event * 883 ****************************************************************************/ 884 #ifndef MPI3_EVENT_PCIE_TOPO_PORT_COUNT 885 #define MPI3_EVENT_PCIE_TOPO_PORT_COUNT (1) 886 #endif /* MPI3_EVENT_PCIE_TOPO_PORT_COUNT */ 887 888 typedef struct _MPI3_EVENT_PCIE_TOPO_PORT_ENTRY 889 { 890 U16 AttachedDevHandle; /* 0x00 */ 891 U8 PortStatus; /* 0x02 */ 892 U8 Reserved03; /* 0x03 */ 893 U8 CurrentPortInfo; /* 0x04 */ 894 U8 Reserved05; /* 0x05 */ 895 U8 PreviousPortInfo; /* 0x06 */ 896 U8 Reserved07; /* 0x07 */ 897 } MPI3_EVENT_PCIE_TOPO_PORT_ENTRY, MPI3_POINTER PTR_MPI3_EVENT_PCIE_TOPO_PORT_ENTRY, 898 Mpi3EventPcieTopoPortEntry_t, MPI3_POINTER pMpi3EventPcieTopoPortEntry_t; 899 900 /**** Defines for the PortStatus field ****/ 901 #define MPI3_EVENT_PCIE_TOPO_PS_NOT_RESPONDING (0x02) 902 #define MPI3_EVENT_PCIE_TOPO_PS_PORT_CHANGED (0x03) 903 #define MPI3_EVENT_PCIE_TOPO_PS_NO_CHANGE (0x04) 904 #define MPI3_EVENT_PCIE_TOPO_PS_DELAY_NOT_RESPONDING (0x05) 905 #define MPI3_EVENT_PCIE_TOPO_PS_RESPONDING (0x06) 906 907 /**** Defines for the CurrentPortInfo and PreviousPortInfo field ****/ 908 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_MASK (0xF0) 909 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_SHIFT (4) 910 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_UNKNOWN (0x00) 911 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_1 (0x10) 912 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_2 (0x20) 913 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_4 (0x30) 914 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_8 (0x40) 915 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_16 (0x50) 916 917 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_MASK (0x0F) 918 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_SHIFT (0) 919 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_UNKNOWN (0x00) 920 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_DISABLED (0x01) 921 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_2_5 (0x02) 922 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_5_0 (0x03) 923 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_8_0 (0x04) 924 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_16_0 (0x05) 925 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_32_0 (0x06) 926 927 typedef struct _MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST 928 { 929 U16 EnclosureHandle; /* 0x00 */ 930 U16 SwitchDevHandle; /* 0x02 */ 931 U8 NumPorts; /* 0x04 */ 932 U8 Reserved05[3]; /* 0x05 */ 933 U8 NumEntries; /* 0x08 */ 934 U8 StartPortNum; /* 0x09 */ 935 U8 SwitchStatus; /* 0x0A */ 936 U8 IOUnitPort; /* 0x0B */ 937 U32 Reserved0C; /* 0x0C */ 938 MPI3_EVENT_PCIE_TOPO_PORT_ENTRY PortEntry[MPI3_EVENT_PCIE_TOPO_PORT_COUNT]; /* 0x10 */ 939 } MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, 940 Mpi3EventDataPcieTopologyChangeList_t, MPI3_POINTER pMpi3EventDataPcieTopologyChangeList_t; 941 942 /**** Defines for the SwitchStatus field ****/ 943 #define MPI3_EVENT_PCIE_TOPO_SS_NO_PCIE_SWITCH (0x00) 944 #define MPI3_EVENT_PCIE_TOPO_SS_NOT_RESPONDING (0x02) 945 #define MPI3_EVENT_PCIE_TOPO_SS_RESPONDING (0x03) 946 #define MPI3_EVENT_PCIE_TOPO_SS_DELAY_NOT_RESPONDING (0x04) 947 948 /***************************************************************************** 949 * PCIe Error Threshold Event * 950 ****************************************************************************/ 951 952 typedef struct _MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD 953 { 954 U64 Timestamp; /* 0x00 */ 955 U8 ReasonCode; /* 0x08 */ 956 U8 Port; /* 0x09 */ 957 U16 SwitchDevHandle; /* 0x0A */ 958 U8 Error; /* 0x0C */ 959 U8 Action; /* 0x0D */ 960 U16 ThresholdCount; /* 0x0E */ 961 U16 AttachedDevHandle; /* 0x10 */ 962 U16 Reserved12; /* 0x12 */ 963 U32 Reserved14; /* 0x14 */ 964 } MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD, 965 Mpi3EventDataPcieErrorThreshold_t, MPI3_POINTER pMpi3EventDataPcieErrorThreshold_t; 966 967 968 /**** Defines for the ReasonCode field ****/ 969 #define MPI3_EVENT_PCI_ERROR_RC_THRESHOLD_EXCEEDED (0x00) 970 #define MPI3_EVENT_PCI_ERROR_RC_ESCALATION (0x01) 971 972 /**** Defines for the Error field - use MPI3_PCIEIOUNIT3_ERROR_ values ****/ 973 974 /**** Defines for the Action field - use MPI3_PCIEIOUNIT3_ACTION_ values ****/ 975 976 /**************************************************************************** 977 * Enclosure Device Added Event * 978 ****************************************************************************/ 979 /* 980 * The Enclosure Device Added Event Data is exactly the same as Enclosure 981 * Page 0 data (including the Configuration Page header). So, please 982 * use/refer to MPI3_ENCLOSURE_PAGE0 structure for Enclosure Device Added 983 * Event data. 984 */ 985 986 /**************************************************************************** 987 * Enclosure Device Changed Event * 988 ****************************************************************************/ 989 /* 990 * The Enclosure Device Change Event Data is exactly the same as Enclosure 991 * Page 0 data (including the Configuration Page header). So, please 992 * use/refer to MPI3_ENCLOSURE_PAGE0 structure for Enclosure Device Change 993 * Event data. 994 */ 995 996 /***************************************************************************** 997 * SAS Initiator Device Status Change Event * 998 ****************************************************************************/ 999 typedef struct _MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE 1000 { 1001 U8 ReasonCode; /* 0x00 */ 1002 U8 IOUnitPort; /* 0x01 */ 1003 U16 DevHandle; /* 0x02 */ 1004 U32 Reserved04; /* 0x04 */ 1005 U64 SASAddress; /* 0x08 */ 1006 } MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, 1007 Mpi3EventDataSasInitDevStatusChange_t, MPI3_POINTER pMpi3EventDataSasInitDevStatusChange_t; 1008 1009 /**** Defines for the ReasonCode field ****/ 1010 #define MPI3_EVENT_SAS_INIT_RC_ADDED (0x01) 1011 #define MPI3_EVENT_SAS_INIT_RC_NOT_RESPONDING (0x02) 1012 1013 1014 /***************************************************************************** 1015 * SAS Initiator Device Table Overflow Event * 1016 ****************************************************************************/ 1017 typedef struct _MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW 1018 { 1019 U16 MaxInit; /* 0x00 */ 1020 U16 CurrentInit; /* 0x02 */ 1021 U32 Reserved04; /* 0x04 */ 1022 U64 SASAddress; /* 0x08 */ 1023 } MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, 1024 Mpi3EventDataSasInitTableOverflow_t, MPI3_POINTER pMpi3EventDataSasInitTableOverflow_t; 1025 1026 1027 /***************************************************************************** 1028 * Hard Reset Received Event * 1029 ****************************************************************************/ 1030 typedef struct _MPI3_EVENT_DATA_HARD_RESET_RECEIVED 1031 { 1032 U8 Reserved00; /* 0x00 */ 1033 U8 IOUnitPort; /* 0x01 */ 1034 U16 Reserved02; /* 0x02 */ 1035 } MPI3_EVENT_DATA_HARD_RESET_RECEIVED, MPI3_POINTER PTR_MPI3_EVENT_DATA_HARD_RESET_RECEIVED, 1036 Mpi3EventDataHardResetReceived_t, MPI3_POINTER pMpi3EventDataHardResetReceived_t; 1037 1038 1039 /***************************************************************************** 1040 * Diagnostic Tool Events * 1041 *****************************************************************************/ 1042 1043 /***************************************************************************** 1044 * Diagnostic Buffer Status Change Event * 1045 *****************************************************************************/ 1046 typedef struct _MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE 1047 { 1048 U8 Type; /* 0x00 */ 1049 U8 ReasonCode; /* 0x01 */ 1050 U16 Reserved02; /* 0x02 */ 1051 U32 Reserved04; /* 0x04 */ 1052 } MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE, 1053 Mpi3EventDataDiagBufferStatusChange_t, MPI3_POINTER pMpi3EventDataDiagBufferStatusChange_t; 1054 1055 /**** Defines for the Type field - use MPI3_DIAG_BUFFER_TYPE_ values ****/ 1056 1057 /**** Defines for the ReasonCode field ****/ 1058 #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RELEASED (0x01) 1059 #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_PAUSED (0x02) 1060 #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RESUMED (0x03) 1061 1062 /***************************************************************************** 1063 * Persistent Event Logs * 1064 ****************************************************************************/ 1065 1066 /**** Definitions for the Locale field ****/ 1067 #define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT (0x0200) 1068 #define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT (0x0100) 1069 #define MPI3_PEL_LOCALE_FLAGS_PCIE (0x0080) 1070 #define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION (0x0040) 1071 #define MPI3_PEL_LOCALE_FLAGS_CONTROLER (0x0020) 1072 #define MPI3_PEL_LOCALE_FLAGS_SAS (0x0010) 1073 #define MPI3_PEL_LOCALE_FLAGS_EPACK (0x0008) 1074 #define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE (0x0004) 1075 #define MPI3_PEL_LOCALE_FLAGS_PD (0x0002) 1076 #define MPI3_PEL_LOCALE_FLAGS_VD (0x0001) 1077 1078 /**** Definitions for the Class field ****/ 1079 #define MPI3_PEL_CLASS_DEBUG (0x00) 1080 #define MPI3_PEL_CLASS_PROGRESS (0x01) 1081 #define MPI3_PEL_CLASS_INFORMATIONAL (0x02) 1082 #define MPI3_PEL_CLASS_WARNING (0x03) 1083 #define MPI3_PEL_CLASS_CRITICAL (0x04) 1084 #define MPI3_PEL_CLASS_FATAL (0x05) 1085 #define MPI3_PEL_CLASS_FAULT (0x06) 1086 1087 /**** Definitions for the ClearType field ****/ 1088 #define MPI3_PEL_CLEARTYPE_CLEAR (0x00) 1089 1090 /**** Definitions for the WaitTime field ****/ 1091 #define MPI3_PEL_WAITTIME_INFINITE_WAIT (0x00) 1092 1093 /**** Definitions for the Action field ****/ 1094 #define MPI3_PEL_ACTION_GET_SEQNUM (0x01) 1095 #define MPI3_PEL_ACTION_MARK_CLEAR (0x02) 1096 #define MPI3_PEL_ACTION_GET_LOG (0x03) 1097 #define MPI3_PEL_ACTION_GET_COUNT (0x04) 1098 #define MPI3_PEL_ACTION_WAIT (0x05) 1099 #define MPI3_PEL_ACTION_ABORT (0x06) 1100 #define MPI3_PEL_ACTION_GET_PRINT_STRINGS (0x07) 1101 #define MPI3_PEL_ACTION_ACKNOWLEDGE (0x08) 1102 1103 /**** Definitions for the LogStatus field ****/ 1104 #define MPI3_PEL_STATUS_SUCCESS (0x00) 1105 #define MPI3_PEL_STATUS_NOT_FOUND (0x01) 1106 #define MPI3_PEL_STATUS_ABORTED (0x02) 1107 #define MPI3_PEL_STATUS_NOT_READY (0x03) 1108 1109 /**************************************************************************** 1110 * PEL Sequence Numbers * 1111 ****************************************************************************/ 1112 typedef struct _MPI3_PEL_SEQ 1113 { 1114 U32 Newest; /* 0x00 */ 1115 U32 Oldest; /* 0x04 */ 1116 U32 Clear; /* 0x08 */ 1117 U32 Shutdown; /* 0x0C */ 1118 U32 Boot; /* 0x10 */ 1119 U32 LastAcknowledged; /* 0x14 */ 1120 } MPI3_PEL_SEQ, MPI3_POINTER PTR_MPI3_PEL_SEQ, 1121 Mpi3PELSeq_t, MPI3_POINTER pMpi3PELSeq_t; 1122 1123 /**************************************************************************** 1124 * PEL Entry * 1125 ****************************************************************************/ 1126 1127 typedef struct _MPI3_PEL_ENTRY 1128 { 1129 U64 TimeStamp; /* 0x00 */ 1130 U32 SequenceNumber; /* 0x08 */ 1131 U16 LogCode; /* 0x0C */ 1132 U16 ArgType; /* 0x0E */ 1133 U16 Locale; /* 0x10 */ 1134 U8 Class; /* 0x12 */ 1135 U8 Flags; /* 0x13 */ 1136 U8 ExtNum; /* 0x14 */ 1137 U8 NumExts; /* 0x15 */ 1138 U8 ArgDataSize; /* 0x16 */ 1139 U8 FixedFormatStringsSize; /* 0x17 */ 1140 U32 Reserved18[2]; /* 0x18 */ 1141 U32 PELInfo[24]; /* 0x20 - 0x7F */ 1142 } MPI3_PEL_ENTRY, MPI3_POINTER PTR_MPI3_PEL_ENTRY, 1143 Mpi3PELEntry_t, MPI3_POINTER pMpi3PELEntry_t; 1144 1145 1146 /**** Definitions for the Flags field ****/ 1147 1148 #define MPI3_PEL_FLAGS_COMPLETE_RESET_NEEDED (0x02) 1149 #define MPI3_PEL_FLAGS_ACK_NEEDED (0x01) 1150 1151 /**************************************************************************** 1152 * PEL Event List * 1153 ****************************************************************************/ 1154 typedef struct _MPI3_PEL_LIST 1155 { 1156 U32 LogCount; /* 0x00 */ 1157 U32 Reserved04; /* 0x04 */ 1158 MPI3_PEL_ENTRY Entry[1]; /* 0x08 */ /* variable length */ 1159 } MPI3_PEL_LIST, MPI3_POINTER PTR_MPI3_PEL_LIST, 1160 Mpi3PELList_t, MPI3_POINTER pMpi3PELList_t; 1161 1162 /**************************************************************************** 1163 * PEL Count Data * 1164 ****************************************************************************/ 1165 typedef U32 MPI3_PEL_LOG_COUNT, MPI3_POINTER PTR_MPI3_PEL_LOG_COUNT, 1166 Mpi3PELLogCount_t, MPI3_POINTER pMpi3PELLogCount_t; 1167 1168 /**************************************************************************** 1169 * PEL Arg Map * 1170 ****************************************************************************/ 1171 typedef struct _MPI3_PEL_ARG_MAP 1172 { 1173 U8 ArgType; /* 0x00 */ 1174 U8 Length; /* 0x01 */ 1175 U16 StartLocation; /* 0x02 */ 1176 } MPI3_PEL_ARG_MAP, MPI3_POINTER PTR_MPI3_PEL_ARG_MAP, 1177 Mpi3PELArgMap_t, MPI3_POINTER pMpi3PELArgMap_t; 1178 1179 /**** Definitions for the ArgType field ****/ 1180 #define MPI3_PEL_ARG_MAP_ARG_TYPE_APPEND_STRING (0x00) 1181 #define MPI3_PEL_ARG_MAP_ARG_TYPE_INTEGER (0x01) 1182 #define MPI3_PEL_ARG_MAP_ARG_TYPE_STRING (0x02) 1183 #define MPI3_PEL_ARG_MAP_ARG_TYPE_BIT_FIELD (0x03) 1184 1185 1186 /**************************************************************************** 1187 * PEL Print String * 1188 ****************************************************************************/ 1189 typedef struct _MPI3_PEL_PRINT_STRING 1190 { 1191 U16 LogCode; /* 0x00 */ 1192 U16 StringLength; /* 0x02 */ 1193 U8 NumArgMap; /* 0x04 */ 1194 U8 Reserved05[3]; /* 0x05 */ 1195 MPI3_PEL_ARG_MAP ArgMap[1]; /* 0x08 */ /* variable length */ 1196 /* FormatString - offset must be calculated */ /* variable length */ 1197 } MPI3_PEL_PRINT_STRING, MPI3_POINTER PTR_MPI3_PEL_PRINT_STRING, 1198 Mpi3PELPrintString_t, MPI3_POINTER pMpi3PELPrintString_t; 1199 1200 /**************************************************************************** 1201 * PEL Print String List * 1202 ****************************************************************************/ 1203 typedef struct _MPI3_PEL_PRINT_STRING_LIST 1204 { 1205 U32 NumPrintStrings; /* 0x00 */ 1206 U32 ResidualBytesRemain; /* 0x04 */ 1207 U32 Reserved08[2]; /* 0x08 */ 1208 MPI3_PEL_PRINT_STRING PrintString[1]; /* 0x10 */ /* variable length */ 1209 } MPI3_PEL_PRINT_STRING_LIST, MPI3_POINTER PTR_MPI3_PEL_PRINT_STRING_LIST, 1210 Mpi3PELPrintStringList_t, MPI3_POINTER pMpi3PELPrintStringList_t; 1211 1212 1213 /**************************************************************************** 1214 * PEL Request Msg - generic to allow header decoding * 1215 ****************************************************************************/ 1216 #ifndef MPI3_PEL_ACTION_SPECIFIC_MAX 1217 #define MPI3_PEL_ACTION_SPECIFIC_MAX (1) 1218 #endif /* MPI3_PEL_ACTION_SPECIFIC_MAX */ 1219 1220 typedef struct _MPI3_PEL_REQUEST 1221 { 1222 U16 HostTag; /* 0x00 */ 1223 U8 IOCUseOnly02; /* 0x02 */ 1224 U8 Function; /* 0x03 */ 1225 U16 IOCUseOnly04; /* 0x04 */ 1226 U8 IOCUseOnly06; /* 0x06 */ 1227 U8 MsgFlags; /* 0x07 */ 1228 U16 ChangeCount; /* 0x08 */ 1229 U8 Action; /* 0x0A */ 1230 U8 Reserved0B; /* 0x0B */ 1231 U32 ActionSpecific[MPI3_PEL_ACTION_SPECIFIC_MAX]; /* 0x0C */ /* variable length */ 1232 } MPI3_PEL_REQUEST, MPI3_POINTER PTR_MPI3_PEL_REQUEST, 1233 Mpi3PELRequest_t, MPI3_POINTER pMpi3PELRequest_t; 1234 1235 /**************************************************************************** 1236 * PEL ACTION Get Sequence Nembers * 1237 ****************************************************************************/ 1238 typedef struct _MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS 1239 { 1240 U16 HostTag; /* 0x00 */ 1241 U8 IOCUseOnly02; /* 0x02 */ 1242 U8 Function; /* 0x03 */ 1243 U16 IOCUseOnly04; /* 0x04 */ 1244 U8 IOCUseOnly06; /* 0x06 */ 1245 U8 MsgFlags; /* 0x07 */ 1246 U16 ChangeCount; /* 0x08 */ 1247 U8 Action; /* 0x0A */ 1248 U8 Reserved0B; /* 0x0B */ 1249 U32 Reserved0C[5]; /* 0x0C */ 1250 MPI3_SGE_UNION SGL; /* 0x20 */ 1251 } MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS, 1252 Mpi3PELReqActionGetSequenceNumbers_t, MPI3_POINTER pMpi3PELReqActionGetSequenceNumbers_t; 1253 1254 /**************************************************************************** 1255 * PEL ACTION Clear Log * 1256 ****************************************************************************/ 1257 typedef struct _MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER 1258 { 1259 U16 HostTag; /* 0x00 */ 1260 U8 IOCUseOnly02; /* 0x02 */ 1261 U8 Function; /* 0x03 */ 1262 U16 IOCUseOnly04; /* 0x04 */ 1263 U8 IOCUseOnly06; /* 0x06 */ 1264 U8 MsgFlags; /* 0x07 */ 1265 U16 ChangeCount; /* 0x08 */ 1266 U8 Action; /* 0x0A */ 1267 U8 Reserved0B; /* 0x0B */ 1268 U8 ClearType; /* 0x0C */ 1269 U8 Reserved0D[3]; /* 0x0D */ 1270 } MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER, 1271 Mpi3PELReqActionClearLogMMarker_t, MPI3_POINTER pMpi3PELReqActionClearLogMMarker_t; 1272 1273 /**************************************************************************** 1274 * PEL ACTION Get Log * 1275 ****************************************************************************/ 1276 typedef struct _MPI3_PEL_REQ_ACTION_GET_LOG 1277 { 1278 U16 HostTag; /* 0x00 */ 1279 U8 IOCUseOnly02; /* 0x02 */ 1280 U8 Function; /* 0x03 */ 1281 U16 IOCUseOnly04; /* 0x04 */ 1282 U8 IOCUseOnly06; /* 0x06 */ 1283 U8 MsgFlags; /* 0x07 */ 1284 U16 ChangeCount; /* 0x08 */ 1285 U8 Action; /* 0x0A */ 1286 U8 Reserved0B; /* 0x0B */ 1287 U32 StartingSequenceNumber; /* 0x0C */ 1288 U16 Locale; /* 0x10 */ 1289 U8 Class; /* 0x12 */ 1290 U8 Reserved13; /* 0x13 */ 1291 U32 Reserved14[3]; /* 0x14 */ 1292 MPI3_SGE_UNION SGL; /* 0x20 */ 1293 } MPI3_PEL_REQ_ACTION_GET_LOG, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_LOG, 1294 Mpi3PELReqActionGetLog_t, MPI3_POINTER pMpi3PELReqActionGetLog_t; 1295 1296 /**************************************************************************** 1297 * PEL ACTION Get Count * 1298 ****************************************************************************/ 1299 typedef struct _MPI3_PEL_REQ_ACTION_GET_COUNT 1300 { 1301 U16 HostTag; /* 0x00 */ 1302 U8 IOCUseOnly02; /* 0x02 */ 1303 U8 Function; /* 0x03 */ 1304 U16 IOCUseOnly04; /* 0x04 */ 1305 U8 IOCUseOnly06; /* 0x06 */ 1306 U8 MsgFlags; /* 0x07 */ 1307 U16 ChangeCount; /* 0x08 */ 1308 U8 Action; /* 0x0A */ 1309 U8 Reserved0B; /* 0x0B */ 1310 U32 StartingSequenceNumber; /* 0x0C */ 1311 U16 Locale; /* 0x10 */ 1312 U8 Class; /* 0x12 */ 1313 U8 Reserved13; /* 0x13 */ 1314 U32 Reserved14[3]; /* 0x14 */ 1315 MPI3_SGE_UNION SGL; /* 0x20 */ 1316 } MPI3_PEL_REQ_ACTION_GET_COUNT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_COUNT, 1317 Mpi3PELReqActionGetCount_t, MPI3_POINTER pMpi3PELReqActionGetCount_t; 1318 1319 /**************************************************************************** 1320 * PEL ACTION Wait * 1321 ****************************************************************************/ 1322 typedef struct _MPI3_PEL_REQ_ACTION_WAIT 1323 { 1324 U16 HostTag; /* 0x00 */ 1325 U8 IOCUseOnly02; /* 0x02 */ 1326 U8 Function; /* 0x03 */ 1327 U16 IOCUseOnly04; /* 0x04 */ 1328 U8 IOCUseOnly06; /* 0x06 */ 1329 U8 MsgFlags; /* 0x07 */ 1330 U16 ChangeCount; /* 0x08 */ 1331 U8 Action; /* 0x0A */ 1332 U8 Reserved0B; /* 0x0B */ 1333 U32 StartingSequenceNumber; /* 0x0C */ 1334 U16 Locale; /* 0x10 */ 1335 U8 Class; /* 0x12 */ 1336 U8 Reserved13; /* 0x13 */ 1337 U16 WaitTime; /* 0x14 */ 1338 U16 Reserved16; /* 0x16 */ 1339 U32 Reserved18[2]; /* 0x18 */ 1340 } MPI3_PEL_REQ_ACTION_WAIT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_WAIT, 1341 Mpi3PELReqActionWait_t, MPI3_POINTER pMpi3PELReqActionWait_t; 1342 1343 /**************************************************************************** 1344 * PEL ACTION Abort * 1345 ****************************************************************************/ 1346 typedef struct _MPI3_PEL_REQ_ACTION_ABORT 1347 { 1348 U16 HostTag; /* 0x00 */ 1349 U8 IOCUseOnly02; /* 0x02 */ 1350 U8 Function; /* 0x03 */ 1351 U16 IOCUseOnly04; /* 0x04 */ 1352 U8 IOCUseOnly06; /* 0x06 */ 1353 U8 MsgFlags; /* 0x07 */ 1354 U16 ChangeCount; /* 0x08 */ 1355 U8 Action; /* 0x0A */ 1356 U8 Reserved0B; /* 0x0B */ 1357 U32 Reserved0C; /* 0x0C */ 1358 U16 AbortHostTag; /* 0x10 */ 1359 U16 Reserved12; /* 0x12 */ 1360 U32 Reserved14; /* 0x14 */ 1361 } MPI3_PEL_REQ_ACTION_ABORT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_ABORT, 1362 Mpi3PELReqActionAbort_t, MPI3_POINTER pMpi3PELReqActionAbort_t; 1363 1364 /**************************************************************************** 1365 * PEL ACTION Get Print Strings * 1366 ****************************************************************************/ 1367 typedef struct _MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS 1368 { 1369 U16 HostTag; /* 0x00 */ 1370 U8 IOCUseOnly02; /* 0x02 */ 1371 U8 Function; /* 0x03 */ 1372 U16 IOCUseOnly04; /* 0x04 */ 1373 U8 IOCUseOnly06; /* 0x06 */ 1374 U8 MsgFlags; /* 0x07 */ 1375 U16 ChangeCount; /* 0x08 */ 1376 U8 Action; /* 0x0A */ 1377 U8 Reserved0B; /* 0x0B */ 1378 U32 Reserved0C; /* 0x0C */ 1379 U16 StartLogCode; /* 0x10 */ 1380 U16 Reserved12; /* 0x12 */ 1381 U32 Reserved14[3]; /* 0x14 */ 1382 MPI3_SGE_UNION SGL; /* 0x20 */ 1383 } MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS, 1384 Mpi3PELReqActionGetPrintStrings_t, MPI3_POINTER pMpi3PELReqActionGetPrintStrings_t; 1385 1386 /**************************************************************************** 1387 * PEL ACTION Acknowledge * 1388 ****************************************************************************/ 1389 typedef struct _MPI3_PEL_REQ_ACTION_ACKNOWLEDGE 1390 { 1391 U16 HostTag; /* 0x00 */ 1392 U8 IOCUseOnly02; /* 0x02 */ 1393 U8 Function; /* 0x03 */ 1394 U16 IOCUseOnly04; /* 0x04 */ 1395 U8 IOCUseOnly06; /* 0x06 */ 1396 U8 MsgFlags; /* 0x07 */ 1397 U16 ChangeCount; /* 0x08 */ 1398 U8 Action; /* 0x0A */ 1399 U8 Reserved0B; /* 0x0B */ 1400 U32 SequenceNumber; /* 0x0C */ 1401 U32 Reserved10; /* 0x10 */ 1402 } MPI3_PEL_REQ_ACTION_ACKNOWLEDGE, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_ACKNOWLEDGE, 1403 Mpi3PELReqActionAcknowledge_t, MPI3_POINTER pMpi3PELReqActionAcknowledge_t; 1404 1405 /**** Definitions for the MsgFlags field ****/ 1406 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_MASK (0x03) 1407 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_SHIFT (0) 1408 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_NO_GUIDANCE (0x00) 1409 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_CONTINUE_OP (0x01) 1410 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_TRANSITION_TO_FAULT (0x02) 1411 1412 /**************************************************************************** 1413 * PEL Reply * 1414 ****************************************************************************/ 1415 typedef struct _MPI3_PEL_REPLY 1416 { 1417 U16 HostTag; /* 0x00 */ 1418 U8 IOCUseOnly02; /* 0x02 */ 1419 U8 Function; /* 0x03 */ 1420 U16 IOCUseOnly04; /* 0x04 */ 1421 U8 IOCUseOnly06; /* 0x06 */ 1422 U8 MsgFlags; /* 0x07 */ 1423 U16 IOCUseOnly08; /* 0x08 */ 1424 U16 IOCStatus; /* 0x0A */ 1425 U32 IOCLogInfo; /* 0x0C */ 1426 U8 Action; /* 0x10 */ 1427 U8 Reserved11; /* 0x11 */ 1428 U16 Reserved12; /* 0x12 */ 1429 U16 PELogStatus; /* 0x14 */ 1430 U16 Reserved16; /* 0x16 */ 1431 U32 TransferLength; /* 0x18 */ 1432 } MPI3_PEL_REPLY, MPI3_POINTER PTR_MPI3_PEL_REPLY, 1433 Mpi3PELReply_t, MPI3_POINTER pMpi3PELReply_t; 1434 1435 1436 /***************************************************************************** 1437 * Component Image Download * 1438 ****************************************************************************/ 1439 typedef struct _MPI3_CI_DOWNLOAD_REQUEST 1440 { 1441 U16 HostTag; /* 0x00 */ 1442 U8 IOCUseOnly02; /* 0x02 */ 1443 U8 Function; /* 0x03 */ 1444 U16 IOCUseOnly04; /* 0x04 */ 1445 U8 IOCUseOnly06; /* 0x06 */ 1446 U8 MsgFlags; /* 0x07 */ 1447 U16 ChangeCount; /* 0x08 */ 1448 U8 Action; /* 0x0A */ 1449 U8 Reserved0B; /* 0x0B */ 1450 U32 Signature1; /* 0x0C */ 1451 U32 TotalImageSize; /* 0x10 */ 1452 U32 ImageOffset; /* 0x14 */ 1453 U32 SegmentSize; /* 0x18 */ 1454 U32 Reserved1C; /* 0x1C */ 1455 MPI3_SGE_UNION SGL; /* 0x20 */ 1456 } MPI3_CI_DOWNLOAD_REQUEST, MPI3_POINTER PTR_MPI3_CI_DOWNLOAD_REQUEST, 1457 Mpi3CIDownloadRequest_t, MPI3_POINTER pMpi3CIDownloadRequest_t; 1458 1459 /**** Definitions for the MsgFlags field ****/ 1460 #define MPI3_CI_DOWNLOAD_MSGFLAGS_LAST_SEGMENT (0x80) 1461 #define MPI3_CI_DOWNLOAD_MSGFLAGS_FORCE_FMC_ENABLE (0x40) 1462 #define MPI3_CI_DOWNLOAD_MSGFLAGS_SIGNED_NVDATA (0x20) 1463 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MASK (0x03) 1464 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_SHIFT (0) 1465 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_FAST (0x00) 1466 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MEDIUM (0x01) 1467 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_SLOW (0x02) 1468 1469 /**** Definitions for the Action field ****/ 1470 #define MPI3_CI_DOWNLOAD_ACTION_DOWNLOAD (0x01) 1471 #define MPI3_CI_DOWNLOAD_ACTION_ONLINE_ACTIVATION (0x02) 1472 #define MPI3_CI_DOWNLOAD_ACTION_OFFLINE_ACTIVATION (0x03) 1473 #define MPI3_CI_DOWNLOAD_ACTION_GET_STATUS (0x04) 1474 #define MPI3_CI_DOWNLOAD_ACTION_CANCEL_OFFLINE_ACTIVATION (0x05) 1475 1476 typedef struct _MPI3_CI_DOWNLOAD_REPLY 1477 { 1478 U16 HostTag; /* 0x00 */ 1479 U8 IOCUseOnly02; /* 0x02 */ 1480 U8 Function; /* 0x03 */ 1481 U16 IOCUseOnly04; /* 0x04 */ 1482 U8 IOCUseOnly06; /* 0x06 */ 1483 U8 MsgFlags; /* 0x07 */ 1484 U16 IOCUseOnly08; /* 0x08 */ 1485 U16 IOCStatus; /* 0x0A */ 1486 U32 IOCLogInfo; /* 0x0C */ 1487 U8 Flags; /* 0x10 */ 1488 U8 CacheDirty; /* 0x11 */ 1489 U8 PendingCount; /* 0x12 */ 1490 U8 Reserved13; /* 0x13 */ 1491 } MPI3_CI_DOWNLOAD_REPLY, MPI3_POINTER PTR_MPI3_CI_DOWNLOAD_REPLY, 1492 Mpi3CIDownloadReply_t, MPI3_POINTER pMpi3CIDownloadReply_t; 1493 1494 /**** Definitions for the Flags field ****/ 1495 #define MPI3_CI_DOWNLOAD_FLAGS_DOWNLOAD_IN_PROGRESS (0x80) 1496 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_FAILURE (0x40) 1497 #define MPI3_CI_DOWNLOAD_FLAGS_OFFLINE_ACTIVATION_REQUIRED (0x20) 1498 #define MPI3_CI_DOWNLOAD_FLAGS_KEY_UPDATE_PENDING (0x10) 1499 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_MASK (0x0E) 1500 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_SHIFT (1) 1501 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_NOT_NEEDED (0x00) 1502 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_AWAITING (0x02) 1503 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_ONLINE_PENDING (0x04) 1504 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_OFFLINE_PENDING (0x06) 1505 #define MPI3_CI_DOWNLOAD_FLAGS_COMPATIBLE (0x01) 1506 1507 /***************************************************************************** 1508 * Component Image Upload * 1509 ****************************************************************************/ 1510 typedef struct _MPI3_CI_UPLOAD_REQUEST 1511 { 1512 U16 HostTag; /* 0x00 */ 1513 U8 IOCUseOnly02; /* 0x02 */ 1514 U8 Function; /* 0x03 */ 1515 U16 IOCUseOnly04; /* 0x04 */ 1516 U8 IOCUseOnly06; /* 0x06 */ 1517 U8 MsgFlags; /* 0x07 */ 1518 U16 ChangeCount; /* 0x08 */ 1519 U16 Reserved0A; /* 0x0A */ 1520 U32 Signature1; /* 0x0C */ 1521 U32 Reserved10; /* 0x10 */ 1522 U32 ImageOffset; /* 0x14 */ 1523 U32 SegmentSize; /* 0x18 */ 1524 U32 Reserved1C; /* 0x1C */ 1525 MPI3_SGE_UNION SGL; /* 0x20 */ 1526 } MPI3_CI_UPLOAD_REQUEST, MPI3_POINTER PTR_MPI3_CI_UPLOAD_REQUEST, 1527 Mpi3CIUploadRequest_t, MPI3_POINTER pMpi3CIUploadRequest_t; 1528 1529 /**** Defines for the MsgFlags field ****/ 1530 #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_MASK (0x01) 1531 #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_SHIFT (0) 1532 #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_PRIMARY (0x00) 1533 #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_SECONDARY (0x01) 1534 #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_MASK (0x02) 1535 #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_SHIFT (1) 1536 #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_FLASH (0x00) 1537 #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_EXECUTABLE (0x02) 1538 1539 /**** Defines for Signature1 field - use MPI3_IMAGE_HEADER_SIGNATURE1_ defines */ 1540 1541 /***************************************************************************** 1542 * IO Unit Control * 1543 ****************************************************************************/ 1544 1545 /**** Definitions for the Operation field ****/ 1546 #define MPI3_CTRL_OP_FORCE_FULL_DISCOVERY (0x01) 1547 #define MPI3_CTRL_OP_LOOKUP_MAPPING (0x02) 1548 #define MPI3_CTRL_OP_UPDATE_TIMESTAMP (0x04) 1549 #define MPI3_CTRL_OP_GET_TIMESTAMP (0x05) 1550 #define MPI3_CTRL_OP_GET_IOC_CHANGE_COUNT (0x06) 1551 #define MPI3_CTRL_OP_CHANGE_PROFILE (0x07) 1552 #define MPI3_CTRL_OP_REMOVE_DEVICE (0x10) 1553 #define MPI3_CTRL_OP_CLOSE_PERSISTENT_CONNECTION (0x11) 1554 #define MPI3_CTRL_OP_HIDDEN_ACK (0x12) 1555 #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS (0x13) 1556 #define MPI3_CTRL_OP_SEND_SAS_PRIMITIVE (0x20) 1557 #define MPI3_CTRL_OP_SAS_PHY_CONTROL (0x21) 1558 #define MPI3_CTRL_OP_READ_INTERNAL_BUS (0x23) 1559 #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS (0x24) 1560 #define MPI3_CTRL_OP_PCIE_LINK_CONTROL (0x30) 1561 1562 /**** Depending on the Operation selected, the various ParamX fields *****/ 1563 /**** contain defined data values. These indexes help identify those values *****/ 1564 #define MPI3_CTRL_OP_LOOKUP_MAPPING_PARAM8_LOOKUP_METHOD_INDEX (0x00) 1565 #define MPI3_CTRL_OP_UPDATE_TIMESTAMP_PARAM64_TIMESTAMP_INDEX (0x00) 1566 #define MPI3_CTRL_OP_CHANGE_PROFILE_PARAM8_PROFILE_ID_INDEX (0x00) 1567 #define MPI3_CTRL_OP_REMOVE_DEVICE_PARAM16_DEVHANDLE_INDEX (0x00) 1568 #define MPI3_CTRL_OP_CLOSE_PERSIST_CONN_PARAM16_DEVHANDLE_INDEX (0x00) 1569 #define MPI3_CTRL_OP_HIDDEN_ACK_PARAM16_DEVHANDLE_INDEX (0x00) 1570 #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS_PARAM16_DEVHANDLE_INDEX (0x00) 1571 #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PHY_INDEX (0x00) 1572 #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PRIMSEQ_INDEX (0x01) 1573 #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM32_PRIMITIVE_INDEX (0x00) 1574 #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_ACTION_INDEX (0x00) 1575 #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_PHY_INDEX (0x01) 1576 #define MPI3_CTRL_OP_READ_INTERNAL_BUS_PARAM64_ADDRESS_INDEX (0x00) 1577 #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM64_ADDRESS_INDEX (0x00) 1578 #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM32_VALUE_INDEX (0x00) 1579 #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_ACTION_INDEX (0x00) 1580 #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_LINK_INDEX (0x01) 1581 1582 /**** Definitions for the LookupMethod field in LOOKUP_MAPPING reqs ****/ 1583 #define MPI3_CTRL_LOOKUP_METHOD_WWID_ADDRESS (0x01) 1584 #define MPI3_CTRL_LOOKUP_METHOD_ENCLOSURE_SLOT (0x02) 1585 #define MPI3_CTRL_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03) 1586 #define MPI3_CTRL_LOOKUP_METHOD_PERSISTENT_ID (0x04) 1587 1588 /**** Definitions for IoUnitControl Lookup Mapping Method Parameters ****/ 1589 #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM16_DEVH_INDEX (0) 1590 #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM64_WWID_INDEX (0) 1591 #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM16_SLOTNUM_INDEX (0) 1592 #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM64_ENCLOSURELID_INDEX (0) 1593 #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM16_DEVH_INDEX (0) 1594 #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM64_DEVNAME_INDEX (0) 1595 #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_DEVH_INDEX (0) 1596 #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_PERSISTENT_ID_INDEX (1) 1597 1598 /*** Definitions for IoUnitControl Reply fields ****/ 1599 #define MPI3_CTRL_LOOKUP_METHOD_VALUE16_DEVH_INDEX (0) 1600 #define MPI3_CTRL_GET_TIMESTAMP_VALUE64_TIMESTAMP_INDEX (0) 1601 #define MPI3_CTRL_GET_IOC_CHANGE_COUNT_VALUE16_CHANGECOUNT_INDEX (0) 1602 #define MPI3_CTRL_READ_INTERNAL_BUS_VALUE32_VALUE_INDEX (0) 1603 1604 /**** Definitions for the PrimSeq field in SEND_SAS_PRIMITIVE reqs ****/ 1605 #define MPI3_CTRL_PRIMFLAGS_SINGLE (0x01) 1606 #define MPI3_CTRL_PRIMFLAGS_TRIPLE (0x03) 1607 #define MPI3_CTRL_PRIMFLAGS_REDUNDANT (0x06) 1608 1609 /**** Definitions for the Action field in PCIE_LINK_CONTROL and SAS_PHY_CONTROL reqs ****/ 1610 #define MPI3_CTRL_ACTION_NOP (0x00) 1611 #define MPI3_CTRL_ACTION_LINK_RESET (0x01) 1612 #define MPI3_CTRL_ACTION_HARD_RESET (0x02) 1613 #define MPI3_CTRL_ACTION_CLEAR_ERROR_LOG (0x05) 1614 1615 typedef struct _MPI3_IOUNIT_CONTROL_REQUEST 1616 { 1617 U16 HostTag; /* 0x00 */ 1618 U8 IOCUseOnly02; /* 0x02 */ 1619 U8 Function; /* 0x03 */ 1620 U16 IOCUseOnly04; /* 0x04 */ 1621 U8 IOCUseOnly06; /* 0x06 */ 1622 U8 MsgFlags; /* 0x07 */ 1623 U16 ChangeCount; /* 0x08 */ 1624 U8 Reserved0A; /* 0x0A */ 1625 U8 Operation; /* 0x0B */ 1626 U32 Reserved0C; /* 0x0C */ 1627 U64 Param64[2]; /* 0x10 */ 1628 U32 Param32[4]; /* 0x20 */ 1629 U16 Param16[4]; /* 0x30 */ 1630 U8 Param8[8]; /* 0x38 */ 1631 } MPI3_IOUNIT_CONTROL_REQUEST, MPI3_POINTER PTR_MPI3_IOUNIT_CONTROL_REQUEST, 1632 Mpi3IoUnitControlRequest_t, MPI3_POINTER pMpi3IoUnitControlRequest_t; 1633 1634 1635 typedef struct _MPI3_IOUNIT_CONTROL_REPLY 1636 { 1637 U16 HostTag; /* 0x00 */ 1638 U8 IOCUseOnly02; /* 0x02 */ 1639 U8 Function; /* 0x03 */ 1640 U16 IOCUseOnly04; /* 0x04 */ 1641 U8 IOCUseOnly06; /* 0x06 */ 1642 U8 MsgFlags; /* 0x07 */ 1643 U16 IOCUseOnly08; /* 0x08 */ 1644 U16 IOCStatus; /* 0x0A */ 1645 U32 IOCLogInfo; /* 0x0C */ 1646 U64 Value64[2]; /* 0x10 */ 1647 U32 Value32[4]; /* 0x20 */ 1648 U16 Value16[4]; /* 0x30 */ 1649 U8 Value8[8]; /* 0x38 */ 1650 } MPI3_IOUNIT_CONTROL_REPLY, MPI3_POINTER PTR_MPI3_IOUNIT_CONTROL_REPLY, 1651 Mpi3IoUnitControlReply_t, MPI3_POINTER pMpi3IoUnitControlReply_t; 1652 1653 #endif /* MPI30_IOC_H */ 1654 1655 1656