1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 2 /* Copyright (c) 2024 NVIDIA Corporation & Affiliates */ 3 4 #ifndef MLX5HWS_CONTEXT_H_ 5 #define MLX5HWS_CONTEXT_H_ 6 7 enum mlx5hws_context_flags { 8 MLX5HWS_CONTEXT_FLAG_HWS_SUPPORT = 1 << 0, 9 MLX5HWS_CONTEXT_FLAG_PRIVATE_PD = 1 << 1, 10 MLX5HWS_CONTEXT_FLAG_BWC_SUPPORT = 1 << 2, 11 }; 12 13 enum mlx5hws_context_shared_stc_type { 14 MLX5HWS_CONTEXT_SHARED_STC_DECAP_L3 = 0, 15 MLX5HWS_CONTEXT_SHARED_STC_DOUBLE_POP = 1, 16 MLX5HWS_CONTEXT_SHARED_STC_MAX = 2, 17 }; 18 19 struct mlx5hws_context_common_res { 20 struct mlx5hws_action_default_stc *default_stc; 21 struct mlx5hws_action_shared_stc *shared_stc[MLX5HWS_CONTEXT_SHARED_STC_MAX]; 22 struct mlx5hws_cmd_forward_tbl *default_miss; 23 }; 24 25 struct mlx5hws_context_debug_info { 26 struct dentry *steering_debugfs; 27 struct dentry *fdb_debugfs; 28 }; 29 30 struct mlx5hws_context_vports { 31 u16 esw_manager_gvmi; 32 u16 uplink_gvmi; 33 struct xarray vport_gvmi_xa; 34 }; 35 36 struct mlx5hws_context { 37 struct mlx5_core_dev *mdev; 38 struct mlx5hws_cmd_query_caps *caps; 39 u32 pd_num; 40 struct mlx5hws_pool *stc_pool[MLX5HWS_TABLE_TYPE_MAX]; 41 struct mlx5hws_context_common_res common_res[MLX5HWS_TABLE_TYPE_MAX]; 42 struct mlx5hws_pattern_cache *pattern_cache; 43 struct mlx5hws_definer_cache *definer_cache; 44 struct mutex ctrl_lock; /* control lock to protect the whole context */ 45 enum mlx5hws_context_flags flags; 46 struct mlx5hws_send_engine *send_queue; 47 size_t queues; 48 struct mutex *bwc_send_queue_locks; /* protect BWC queues */ 49 struct lock_class_key *bwc_lock_class_keys; 50 struct list_head tbl_list; 51 struct mlx5hws_context_debug_info debug_info; 52 struct xarray peer_ctx_xa; 53 struct mlx5hws_context_vports vports; 54 }; 55 mlx5hws_context_bwc_supported(struct mlx5hws_context * ctx)56static inline bool mlx5hws_context_bwc_supported(struct mlx5hws_context *ctx) 57 { 58 return ctx->flags & MLX5HWS_CONTEXT_FLAG_BWC_SUPPORT; 59 } 60 61 bool mlx5hws_context_cap_dynamic_reparse(struct mlx5hws_context *ctx); 62 63 u8 mlx5hws_context_get_reparse_mode(struct mlx5hws_context *ctx); 64 65 #endif /* MLX5HWS_CONTEXT_H_ */ 66