1 /*- 2 * Copyright (c) 2018-2019 Mellanox Technologies. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #ifndef __MLX5_EN_PORT_BUFFER_H__ 27 #define __MLX5_EN_PORT_BUFFER_H__ 28 29 #include <dev/mlx5/mlx5_en/en.h> 30 #include <dev/mlx5/port.h> 31 32 #define MLX5E_MAX_BUFFER 8 33 #define MLX5E_BUFFER_CELL_SHIFT 7 34 #define MLX5E_DEFAULT_CABLE_LEN 7 /* 7 meters */ 35 36 #define MLX5_BUFFER_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, pcam_reg) && \ 37 MLX5_CAP_PCAM_REG(mdev, pbmc) && \ 38 MLX5_CAP_PCAM_REG(mdev, pptb)) 39 40 enum { 41 MLX5E_PORT_BUFFER_CABLE_LEN = BIT(0), 42 MLX5E_PORT_BUFFER_PFC = BIT(1), 43 MLX5E_PORT_BUFFER_PRIO2BUFFER = BIT(2), 44 MLX5E_PORT_BUFFER_SIZE = BIT(3), 45 }; 46 47 struct mlx5e_bufferx_reg { 48 u8 lossy; 49 u8 epsb; 50 u32 size; 51 u32 xoff; 52 u32 xon; 53 }; 54 55 struct mlx5e_port_buffer { 56 u32 port_buffer_size; 57 u32 spare_buffer_size; 58 struct mlx5e_bufferx_reg buffer[MLX5E_MAX_BUFFER]; 59 }; 60 61 #define IEEE_8021QAZ_MAX_TCS 8 62 63 struct ieee_pfc { 64 __u8 pfc_cap; 65 __u8 pfc_en; 66 __u8 mbc; 67 __u16 delay; 68 __u64 requests[IEEE_8021QAZ_MAX_TCS]; 69 __u64 indications[IEEE_8021QAZ_MAX_TCS]; 70 }; 71 72 int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, 73 u32 change, unsigned int mtu, 74 struct ieee_pfc *pfc, 75 u32 *buffer_size, 76 u8 *prio2buffer); 77 78 int mlx5e_port_query_buffer(struct mlx5e_priv *priv, 79 struct mlx5e_port_buffer *port_buffer); 80 #endif 81