| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCHazardRecognizers.cpp | 29 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore() local
55 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet() local
85 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst()
147 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother() local
175 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction() local
282 const MCInstrDesc &MCID = DAG.TII->get(Opcode); in GetInstrType() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstrBuilder.h | 374 const MCInstrDesc &MCID) { in BuildMI()
383 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
396 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
415 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
427 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
438 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
448 const MCInstrDesc &MCID) { in BuildMI()
460 const MCInstrDesc &MCID) { in BuildMI()
471 const MCInstrDesc &MCID) { in BuildMI()
481 const MCInstrDesc &MCID) { in BuildMI()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrBuilder.h | 63 const MCInstrDesc &MCID = MI->getDesc(); variable
80 const MCInstrDesc &MCID = MI->getDesc(); variable
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ScoreboardHazardRecognizer.cpp | 122 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in getHazardType() local
177 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction() local
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| H A D | TargetInstrInfo.cpp | 48 TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum, in getRegClass()
171 const MCInstrDesc &MCID = MI.getDesc(); in commuteInstructionImpl() local
301 const MCInstrDesc &MCID = MI.getDesc(); in findCommutedOpIndices() local
337 const MCInstrDesc &MCID = MI.getDesc(); in PredicateInstruction() local
1168 const MCInstrDesc &MCID, Register DestReg) { in reassociateOps()
1775 InlineAsm::ConstraintCode MCID = F.getMemoryConstraintID(); in createMIROperandComment() local
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| H A D | BreakFalseDeps.cpp | 192 const MCInstrDesc &MCID = MI->getDesc(); in processDefs() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCA/ |
| H A D | AMDGPUCustomBehaviour.cpp | 249 const MCInstrDesc &MCID = MCII.get(Opcode); in generateWaitCntInfo() local
303 bool AMDGPUCustomBehaviour::isVMEM(const MCInstrDesc &MCID) { in isVMEM()
325 const MCInstrDesc &MCID = MCII.get(Opcode); in isGWS() local
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| /freebsd/contrib/llvm-project/llvm/lib/MCA/ |
| H A D | CodeEmitter.cpp | 18 CodeEmitter::EncodingInfo CodeEmitter::getOrCreateEncodingInfo(unsigned MCID) { in getOrCreateEncodingInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | ValueMapper.cpp | 88 unsigned MCID : 29; member
1119 unsigned MCID) { in scheduleMapGlobalInitializer()
1135 unsigned MCID) { in scheduleMapAppendingVariable()
1151 unsigned MCID) { in scheduleMapAliasOrIFunc()
1165 void Mapper::scheduleRemapFunction(Function &F, unsigned MCID) { in scheduleRemapFunction()
1260 unsigned MCID) { in scheduleMapGlobalInitializer()
1268 unsigned MCID) { in scheduleMapAppendingVariable()
1274 unsigned MCID) { in scheduleMapGlobalAlias()
1279 unsigned MCID) { in scheduleMapGlobalIFunc()
1283 void ValueMapper::scheduleRemapFunction(Function &F, unsigned MCID) { in scheduleRemapFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrBuilder.h | 29 const MCInstrDesc &MCID = MI->getDesc(); in addFrameReference() local
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| H A D | SystemZInstrInfo.cpp | 329 const MCInstrDesc &MCID = MI.getDesc(); in isSimpleMove() local
1025 const MCInstrDesc &MCID = MI->getDesc(); in isSimpleBD12Move() local
1389 const MCInstrDesc &MCID = MI.getDesc(); in foldMemoryOperandImpl() local
1897 const MCInstrDesc &MCID = get(Opcode); in getOpcodeForOffset() local
1941 const MCInstrDesc &MCID = get(Opcode); in hasDisplacementPairInsn() local
2240 const MCInstrDesc &MCID = MI.getDesc(); in verifyInstruction() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MCA/ |
| H A D | CodeEmitter.h | 56 StringRef getEncoding(unsigned MCID) { in getEncoding()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.cpp | 31 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() local
52 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType() local
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| H A D | Thumb2SizeReduction.cpp | 255 static bool HasImplicitCPSRDef(const MCInstrDesc &MCID) { in HasImplicitCPSRDef()
653 const MCInstrDesc &MCID = MI->getDesc(); in ReduceSpecial() local
813 const MCInstrDesc &MCID = MI->getDesc(); in ReduceTo2Addr() local
873 const MCInstrDesc &MCID = MI->getDesc(); in ReduceToNarrow() local
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| H A D | MLxExpansionPass.cpp | 184 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() local
339 const MCInstrDesc &MCID = MI->getDesc(); in ExpandFPMLxInstructions() local
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| H A D | ARMLowOverheadLoops.cpp | 107 const MCInstrDesc &MCID = MI.getDesc(); in getVecSize() local
119 const MCInstrDesc &MCID = MI.getDesc(); in isHorizontalReduction() local
818 const MCInstrDesc &MCID = MI.getDesc(); in retainsPreviousHalfElement() local
827 const MCInstrDesc &MCID = MI.getDesc(); in producesDoubleWidthResult() local
1231 const MCInstrDesc &MCID = MI->getDesc(); in ValidateMVEInst() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | LVLGen.cpp | 41 const MCInstrDesc &MCID = TII->get(Opcode); in getVLIndex() local
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| H A D | VERegisterInfo.cpp | 146 inline MachineInstrBuilder build(const MCInstrDesc &MCID, Register DestReg) { in build()
152 inline MachineInstrBuilder build(const MCInstrDesc &MCID) { in build()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.cpp | 463 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI); in getFixupNoBits() local
616 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI); in getExprOpValue() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ConditionalCompares.cpp | 630 const MCInstrDesc &MCID = TII->get(Opc); in convert() local
687 const MCInstrDesc &MCID = TII->get(Opc); in convert() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGFast.cpp | 250 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in CopyAndMoveSuccessors() local
424 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in getPhysicalRegisterVT() local
524 const MCInstrDesc &MCID = TII->get(Node->getMachineOpcode()); in DelayForLiveRegsBottomUp() local
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| H A D | ScheduleDAGSDNodes.cpp | 216 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in ClusterNeighboringLoads() local
322 const MCInstrDesc &MCID = TII->get(Opc); in ClusterNodes() local
454 const MCInstrDesc &MCID = TII->get(Opc); in AddSchedEdges() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVVectorPeephole.cpp | 215 const MCInstrDesc &MCID = TII->get(Opc); in convertToUnmasked() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXReplaceImageHandles.cpp | 1731 const MCInstrDesc &MCID = MI.getDesc(); processInstr() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.cpp | 123 const MCInstrDesc &MCID = get(Opc); in BuildCondBr() local
777 const MCInstrDesc &MCID = MI.getDesc(); in findCommutedOpIndices() local
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