1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright 2002 by Peter Grehan. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #ifndef _MACIO_MACIOVAR_H_ 31 #define _MACIO_MACIOVAR_H_ 32 33 /* 34 * The addr space size 35 * XXX it would be better if this could be determined by querying the 36 * PCI device, but there isn't an access method for this 37 */ 38 #define MACIO_REG_SIZE 0x7ffff 39 40 /* 41 * Feature Control Registers (FCR) 42 */ 43 #define HEATHROW_FCR 0x38 44 #define KEYLARGO_FCR0 0x38 45 #define KEYLARGO_FCR1 0x3c 46 #define KEYLARGO_FCR2 0x40 47 48 #define FCR_ENET_ENABLE 0x60000000 49 #define FCR_ENET_RESET 0x80000000 50 51 #define FCR1_I2S0_CLK_ENABLE 0x00001000 52 #define FCR1_I2S0_ENABLE 0x00002000 53 54 /* Used only by macio_enable_wireless() for now. */ 55 #define KEYLARGO_GPIO_BASE 0x6a 56 #define KEYLARGO_EXTINT_GPIO_REG_BASE 0x58 57 58 /* 59 * Format of a macio reg property entry. 60 */ 61 struct macio_reg { 62 u_int32_t mr_base; 63 u_int32_t mr_size; 64 }; 65 66 /* 67 * Per macio device structure. 68 */ 69 struct macio_devinfo { 70 int mdi_interrupts[6]; 71 int mdi_ninterrupts; 72 int mdi_base; 73 struct ofw_bus_devinfo mdi_obdinfo; 74 struct resource_list mdi_resources; 75 }; 76 77 extern int macio_enable_wireless(device_t dev, bool enable); 78 79 #endif /* _MACIO_MACIOVAR_H_ */ 80