| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.cpp | 305 void AVRRegisterInfo::splitReg(Register Reg, Register &LoReg, in splitReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 757 Register LoReg = LoOperand.getReg(); in emitCombineIR() local
856 Register LoReg = LoOperand.getReg(); in emitCombineRR() local
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| H A D | HexagonFrameLowering.cpp | 1129 Register LoReg = HRI.getSubReg(Reg, Hexagon::isub_lo); in insertCFIInstructionsAt() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcAsmPrinter.cpp | 394 Register HiReg, LoReg; in PrintAsmOperand() local
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| H A D | SparcISelLowering.cpp | 1321 Register LoReg = VA.getLocReg() + 1; in LowerCall_64() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 798 unsigned LoReg = I->getOperand(1).getReg(), HiReg = I->getOperand(2).getReg(); in expandBuildPairF64() local
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| H A D | MipsSEFrameLowering.cpp | 308 Register LoReg = I->getOperand(1).getReg(); in expandBuildPairF64() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 2062 for (int LoReg = ARM::R7, HiReg = ARM::R11; LoReg >= ARM::R4; --LoReg) { in CMSEPushCalleeSaves() local
2082 int LoReg = JumpReg == ARM::R4 ? ARM::R5 : ARM::R4; in CMSEPushCalleeSaves() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 2234 Register LoReg = MRI->createVirtualRegister(DstRC); in selectG_TRUNC() local
2583 Register LoReg = MRI->createVirtualRegister(RC); in selectG_CONSTANT() local
2638 Register LoReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectG_FNEG() local
2676 Register LoReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectG_FABS() local
2960 Register LoReg = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK() local
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| H A D | SILoadStoreOptimizer.cpp | 187 Register LoReg; member
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 5543 unsigned LoReg, ROpc, MOpc; in Select() local
5622 unsigned LoReg, HiReg; in Select() local
5765 unsigned LoReg, HiReg, ClrReg; in Select() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 18131 Register LoReg = MI.getOperand(0).getReg(); emitReadCounterWidePseudo() local
18170 Register LoReg = MI.getOperand(0).getReg(); emitSplitF64Pseudo() local
18207 Register LoReg = MI.getOperand(1).getReg(); emitBuildPairF64Pseudo() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 13038 Register LoReg = MI.getOperand(0).getReg(); in EmitInstrWithCustomInserter() local
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