1 //===- llvm/CodeGen/Spiller.h - Spiller -------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_CODEGEN_SPILLER_H 10 #define LLVM_CODEGEN_SPILLER_H 11 12 #include "llvm/ADT/ArrayRef.h" 13 #include "llvm/CodeGen/Register.h" 14 15 namespace llvm { 16 17 class LiveRangeEdit; 18 class MachineFunction; 19 class MachineFunctionPass; 20 class VirtRegMap; 21 class VirtRegAuxInfo; 22 class LiveIntervals; 23 class LiveRegMatrix; 24 class LiveStacks; 25 class MachineDominatorTree; 26 class MachineBlockFrequencyInfo; 27 class AllocationOrder; 28 29 /// Spiller interface. 30 /// 31 /// Implementations are utility classes which insert spill or remat code on 32 /// demand. 33 class Spiller { 34 virtual void anchor(); 35 36 public: 37 virtual ~Spiller() = 0; 38 39 /// spill - Spill the LRE.getParent() live interval. 40 virtual void spill(LiveRangeEdit &LRE, AllocationOrder *Order = nullptr) = 0; 41 42 /// Return the registers that were spilled. 43 virtual ArrayRef<Register> getSpilledRegs() = 0; 44 45 /// Return registers that were not spilled, but otherwise replaced 46 /// (e.g. rematerialized). 47 virtual ArrayRef<Register> getReplacedRegs() = 0; 48 postOptimization()49 virtual void postOptimization() {} 50 51 struct RequiredAnalyses { 52 LiveIntervals &LIS; 53 LiveStacks &LSS; 54 MachineDominatorTree &MDT; 55 const MachineBlockFrequencyInfo &MBFI; 56 }; 57 }; 58 59 /// Create and return a spiller that will insert spill code directly instead 60 /// of deferring though VirtRegMap. 61 Spiller *createInlineSpiller(const Spiller::RequiredAnalyses &Analyses, 62 MachineFunction &MF, VirtRegMap &VRM, 63 VirtRegAuxInfo &VRAI, 64 LiveRegMatrix *Matrix = nullptr); 65 66 } // end namespace llvm 67 68 #endif // LLVM_CODEGEN_SPILLER_H 69