xref: /titanic_41/usr/src/uts/common/io/bnxe/577xx/include/lm_defs.h (revision f391a51a4e9639750045473dba1cc2831267c93e)
1 /*******************************************************************************
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  *
21  * Copyright 2014 QLogic Corporation
22  * The contents of this file are subject to the terms of the
23  * QLogic End User License (the "License").
24  * You may not use this file except in compliance with the License.
25  *
26  * You can obtain a copy of the License at
27  * http://www.qlogic.com/Resources/Documents/DriverDownloadHelp/
28  * QLogic_End_User_Software_License.txt
29  * See the License for the specific language governing permissions
30  * and limitations under the License.
31  *
32  ******************************************************************************/
33 
34 #ifndef _LM_DEFS_H
35 #define _LM_DEFS_H
36 
37 #include "bcmtype.h"
38 
39 
40 
41 /*******************************************************************************
42  * Simple constants.
43  ******************************************************************************/
44 
45 #ifndef TRUE
46 #define TRUE    1
47 #endif
48 
49 #ifndef FALSE
50 #define FALSE   0
51 #endif
52 
53 #ifndef NULL
54 #define NULL    ((void *) 0)
55 #endif
56 
57 
58 /* Signatures for integrity checks. */
59 #define LM_DEVICE_SIG           0x6d635242      /* BRcm */
60 #define L2PACKET_RX_SIG         0x7872324c      /* L2rx */
61 #define L2PACKET_TX_SIG         0x7874324c      /* L2tx */
62 #define L4BUFFER_RX_SIG         0x7872344c      /* L4rx */
63 #define L4BUFFER_TX_SIG         0x7874344c      /* L4tx */
64 #define L4BUFFER_SIG            0x66754254      /* TBuf */
65 #define L4GEN_BUFFER_SIG        0x006e6567      /* gen  */
66 #define L4GEN_BUFFER_SIG_END    0x0067656e      /* neg  */
67 
68 #define SIZEOF_SIG              16
69 #define SIG(_p)                 (*((u32_t *) ((u8_t *) (_p) - sizeof(u32_t))))
70 #define END_SIG(_p, _size)      (*((u32_t *) ((u8_t *) (_p) + (_size))))
71 
72 
73 /* This macro rounds the given value to the next word boundary if it
74  * is not already at a word boundary. */
75 #define ALIGN_VALUE_TO_WORD_BOUNDARY(_v) \
76     (((_v) + (sizeof(void *) - 1)) & ~(sizeof(void *) - 1))
77 
78 /* This macro determines the delta to the next alignment which is
79  * either 1, 2, 4, 8, 16, 32, etc. */
80 #define ALIGN_DELTA_TO_BOUNDARY(_p, _a) \
81         (((((u8_t *) (_p) - (u8_t *) 0) + ((_a) - 1)) & ~((_a) - 1)) - \
82               ((u8_t *) (_p) - (u8_t *) 0))
83 
84 /* This macro returns the pointer to the next alignment if the pointer
85  * is not currently on the indicated alignment boundary. */
86 #define ALIGN_PTR_TO_BOUNDARY(_p, _a) \
87         ((u8_t *) (_p) + ALIGN_DELTA_TO_BOUNDARY(_p, _a))
88 
89 
90 
91 /*******************************************************************************
92  * Status codes.
93  ******************************************************************************/
94 
95 typedef enum
96 {
97     LM_STATUS_SUCCESS                 =     0,
98     LM_STATUS_LINK_UNKNOWN            =     0,
99     LM_STATUS_FAILURE                 =     1,
100     LM_STATUS_RESOURCE                =     2,
101     LM_STATUS_ABORTED                 =     3,
102     LM_STATUS_PENDING                 =     4,
103     LM_STATUS_PAUSED                  =     5,
104     LM_STATUS_INVALID_PARAMETER       =     6,
105     LM_STATUS_LINK_ACTIVE             =     7,
106     LM_STATUS_LINK_DOWN               =     8,
107     LM_STATUS_UNKNOWN_ADAPTER         =     9,
108     LM_STATUS_UNKNOWN_PHY             =     10,
109     LM_STATUS_UNKNOWN_MEDIUM          =     11,
110     LM_STATUS_TOO_MANY_FRAGMENTS      =     12,
111     LM_STATUS_BUFFER_TOO_SHORT        =     16,
112     LM_STATUS_UPLOAD_IN_PROGRESS      =     17,
113     LM_STATUS_BUSY                    =     18,
114     LM_STATUS_INVALID_KEY             =     19,
115     LM_STATUS_TIMEOUT                 =     20,
116     LM_STATUS_REQUEST_NOT_ACCEPTED    =     21,
117     LM_STATUS_CONNECTION_CLOSED       =     22,
118     LM_STATUS_BAD_SIGNATURE           =     23,
119     LM_STATUS_CONNECTION_RESET        =     24,
120     LM_STATUS_EXISTING_OBJECT         =     25,
121     LM_STATUS_OBJECT_NOT_FOUND        =     26,
122     LM_STATUS_CONNECTION_RM_DISC      =     27,
123     LM_STATUS_VF_LAMAC_REJECTED       =     28,
124     LM_STATUS_NOT_IMPLEMENTED         =     29,
125     LM_STATUS_UNKNOWN_EVENT_CODE      =     30
126 } lm_status_t;
127 
128 
129 /*******************************************************************************
130  * Receive filter masks.
131  ******************************************************************************/
132 
133 typedef u32_t lm_rx_mask_t;
134 
135 #define LM_RX_MASK_ACCEPT_NONE                  0x0000
136 #define LM_RX_MASK_ACCEPT_UNICAST               0x0001
137 #define LM_RX_MASK_ACCEPT_MULTICAST             0x0002
138 #define LM_RX_MASK_ACCEPT_ALL_MULTICAST         0x0004
139 #define LM_RX_MASK_ACCEPT_BROADCAST             0x0008
140 #define LM_RX_MASK_ACCEPT_ERROR_PACKET          0x0010
141 
142 #define LM_RX_MASK_PROMISCUOUS_MODE             0x10000
143 
144 
145 
146 /*******************************************************************************
147  * Flow control.
148  ******************************************************************************/
149 
150 typedef u32_t lm_flow_control_t;
151 
152 #define LM_FLOW_CONTROL_NONE                    0x00
153 #define LM_FLOW_CONTROL_RECEIVE_PAUSE           0x01
154 #define LM_FLOW_CONTROL_TRANSMIT_PAUSE          0x02
155 
156 /* This value can be or-ed with RECEIVE_PAUSE and TRANSMIT_PAUSE.  If the
157  * auto-negotiation is disabled and the RECEIVE_PAUSE and TRANSMIT_PAUSE
158  * bits are set, then flow control is enabled regardless of link partner's
159  * flow control capability.  Otherwise, if this bit is set, then flow
160  * is negotiated with the link partner.  Values 0x80000000 and 0x80000003 are
161  * equivalent. */
162 #define LM_FLOW_CONTROL_AUTO_PAUSE              0x80000000
163 
164 
165 /*******************************************************************************
166  * EEE control.
167  ******************************************************************************/
168 
169 // values match the registry values for EeeCtrlMode . Default is MED ("Balanced")
170 typedef enum
171 {
172     LM_EEE_CONTROL_HIGH    = 0, // MaxPowerSave
173     LM_EEE_CONTROL_MED     = 1, // Balance
174     LM_EEE_CONTROL_LOW     = 2, // MaxPreformance
175     LM_EEE_CONTROL_NVRAM    = 3, // use NVRAM
176     LM_EEE_CONTROL_NA       = 4  // either N/A or disabled
177 } lm_eee_policy_t;
178 
179 /*******************************************************************************
180  * media type.
181  ******************************************************************************/
182 
183 typedef u32_t lm_medium_t;
184 
185 #define LM_MEDIUM_AUTO_DETECT                   0x0000
186 
187 #define LM_MEDIUM_TYPE_UNKNOWN                  0x0000
188 #define LM_MEDIUM_TYPE_BNC                      0x0001
189 #define LM_MEDIUM_TYPE_UTP                      0x0002
190 #define LM_MEDIUM_TYPE_FIBER                    0x0003
191 #define LM_MEDIUM_TYPE_SERDES                   0x0004
192 #define LM_MEDIUM_TYPE_SERDES_SGMII             0x0005
193 #define LM_MEDIUM_TYPE_XGXS                     0x0006
194 #define LM_MEDIUM_TYPE_XGXS_SGMII               0x0007
195 #define LM_MEDIUM_TYPE_XMAC_LOOPBACK            0x0008
196 #define LM_MEDIUM_TYPE_UMAC_LOOPBACK            0x0009
197 #define LM_MEDIUM_TYPE_EXT_LOOPBACK             0x00f6
198 #define LM_MEDIUM_TYPE_EXT_PHY_LOOPBACK         0x00f7
199 #define LM_MEDIUM_TYPE_SERDES_LOOPBACK          0x00f8
200 #define LM_MEDIUM_TYPE_XGXS_LOOPBACK            0x00f9
201 #define LM_MEDIUM_TYPE_XGXS_10_LOOPBACK         0x00fa
202 #define LM_MEDIUM_TYPE_BMAC_LOOPBACK            0x00fb
203 #define LM_MEDIUM_TYPE_EMAC_LOOPBACK            0x00fc
204 #define LM_MEDIUM_TYPE_PHY_LOOPBACK             0x00fd
205 #define LM_MEDIUM_TYPE_MAC_LOOPBACK             0x00fe
206 #define LM_MEDIUM_TYPE_NULL                     0x00ff
207 #define LM_MEDIUM_TYPE_MASK                     0x00ff
208 #define GET_MEDIUM_TYPE(m)                      ((m) & LM_MEDIUM_TYPE_MASK)
209 #define SET_MEDIUM_TYPE(m, t) \
210     (m) = ((m) & ~LM_MEDIUM_TYPE_MASK) | (t)
211 
212 #define LM_MEDIUM_IS_LOOPBACK(_medium) (((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_BMAC_LOOPBACK) || \
213                                         ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_UMAC_LOOPBACK) || \
214                                         ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_XMAC_LOOPBACK) || \
215                                         ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_EXT_LOOPBACK) || \
216                                         ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_EXT_PHY_LOOPBACK) || \
217                                         ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_SERDES_LOOPBACK) || \
218                                         ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_XGXS_LOOPBACK) || \
219                                         ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_XGXS_10_LOOPBACK) || \
220                                         ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_PHY_LOOPBACK) || \
221                                         ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_MAC_LOOPBACK))
222 
223 #define LM_MEDIUM_SPEED_AUTONEG                 0x0000
224 
225 #define LM_MEDIUM_SPEED_UNKNOWN                 0x0000
226 #define LM_MEDIUM_SPEED_10MBPS                  0x0100
227 #define LM_MEDIUM_SPEED_100MBPS                 0x0200
228 #define LM_MEDIUM_SPEED_1000MBPS                0x0300
229 #define LM_MEDIUM_SPEED_2500MBPS                0x0400
230 #define LM_MEDIUM_SPEED_10GBPS                  0x0600
231 #define LM_MEDIUM_SPEED_12GBPS                  0x0700
232 #define LM_MEDIUM_SPEED_12_5GBPS                0x0800
233 #define LM_MEDIUM_SPEED_13GBPS                  0x0900
234 #define LM_MEDIUM_SPEED_15GBPS                  0x0a00
235 #define LM_MEDIUM_SPEED_16GBPS                  0x0b00
236 #define LM_MEDIUM_SPEED_20GBPS                  0x0c00
237 #define LM_MEDIUM_SPEED_25GBPS                  0x0d00
238 #define LM_MEDIUM_SPEED_40GBPS                  0x0e00
239 #define LM_MEDIUM_SPEED_50GBPS                  0x0f00
240 #define LM_MEDIUM_SPEED_SEQ_START               0x1d00  // 100Mbps
241 #define LM_MEDIUM_SPEED_SEQ_END                 0xE400  // 20Gbps
242 #define LM_MEDIUM_SPEED_AUTONEG_1G_FALLBACK     0xFD00  /* Serdes */
243 #define LM_MEDIUM_SPEED_AUTONEG_2_5G_FALLBACK   0xFE00  /* Serdes */
244 #define LM_MEDIUM_SPEED_HARDWARE_DEFAULT        0xff00  /* Serdes nvram def. */
245 #define LM_MEDIUM_SPEED_MASK                    0xff00
246 #define GET_MEDIUM_SPEED(m)                     ((m) & LM_MEDIUM_SPEED_MASK)
247 #define SET_MEDIUM_SPEED(m, s) \
248     (m) = ((m) & ~LM_MEDIUM_SPEED_MASK) | (s)
249 
250 #define LM_MEDIUM_FULL_DUPLEX                   0x00000
251 #define LM_MEDIUM_HALF_DUPLEX                   0x10000
252 #define GET_MEDIUM_DUPLEX(m)                    ((m) & LM_MEDIUM_HALF_DUPLEX)
253 #define SET_MEDIUM_DUPLEX(m, d) \
254     (m) = ((m) & ~LM_MEDIUM_HALF_DUPLEX) | (d)
255 
256 #define LM_MEDIUM_SELECTIVE_AUTONEG             0x01000000
257 #define GET_MEDIUM_AUTONEG_MODE(m)              ((m) & 0xff000000)
258 
259 typedef struct _lm_link_settings_t
260 {
261     u32_t flag;
262     #define LINK_FLAG_SELECTIVE_AUTONEG_MASK                    0x0f
263     #define LINK_FLAG_SELECTIVE_AUTONEG_ONE_SPEED               0x01
264     #define LINK_FLAG_SELECTIVE_AUTONEG_ENABLE_SLOWER_SPEEDS    0x02
265     #define LINK_FLAG_WIRE_SPEED                                0x10
266 
267     lm_medium_t req_medium;
268     lm_flow_control_t flow_ctrl;
269 
270     u32_t _reserved;
271 } lm_link_settings_t;
272 
273 
274 
275 /*******************************************************************************
276  * Power state.
277  ******************************************************************************/
278 
279 typedef enum
280 {
281     LM_POWER_STATE_D0 = 0,
282     LM_POWER_STATE_D1 = 1,
283     LM_POWER_STATE_D2 = 2,
284     LM_POWER_STATE_D3 = 3
285 } lm_power_state_t;
286 
287 
288 
289 /*******************************************************************************
290  * offloading.
291  ******************************************************************************/
292 
293 typedef u32_t lm_offload_t;
294 
295 #define LM_OFFLOAD_NONE                         0x00000000
296 #define LM_OFFLOAD_TX_IP_CKSUM                  0x00000001
297 #define LM_OFFLOAD_RX_IP_CKSUM                  0x00000002
298 #define LM_OFFLOAD_TX_TCP_CKSUM                 0x00000004
299 #define LM_OFFLOAD_RX_TCP_CKSUM                 0x00000008
300 #define LM_OFFLOAD_TX_UDP_CKSUM                 0x00000010
301 #define LM_OFFLOAD_RX_UDP_CKSUM                 0x00000020
302 #define LM_OFFLOAD_IPV4_TCP_LSO                 0x00000040
303 #define LM_OFFLOAD_IPV6_TCP_LSO                 0x00000080
304 #define LM_OFFLOAD_CHIMNEY                      0x00000100
305 #define LM_OFFLOAD_IPV6_CHIMNEY                 0x00000200
306 #define LM_OFFLOAD_TX_TCP6_CKSUM                0x00001000
307 #define LM_OFFLOAD_RX_TCP6_CKSUM                0x00002000
308 #define LM_OFFLOAD_TX_UDP6_CKSUM                0x00004000
309 #define LM_OFFLOAD_RX_UDP6_CKSUM                0x00008000
310 #define LM_OFFLOAD_RSC_IPV4                     0x00010000
311 #define LM_OFFLOAD_RSC_IPV6                     0x00020000
312 #define LM_OFFLOAD_ENCAP_PACKET                 0x00040000
313 
314 
315 
316 /*******************************************************************************
317  * RSS Hash Types
318  ******************************************************************************/
319 
320 typedef u32_t lm_rss_hash_t;
321 
322 #define LM_RSS_HASH_IPV4                       0x00000100
323 #define LM_RSS_HASH_TCP_IPV4                   0x00000200
324 #define LM_RSS_HASH_IPV6                       0x00000400
325 #define LM_RSS_HASH_IPV6_EX                    0x00000800
326 #define LM_RSS_HASH_TCP_IPV6                   0x00001000
327 #define LM_RSS_HASH_TCP_IPV6_EX                0x00002000
328 
329 
330 
331 /*******************************************************************************
332  * Chip reset reasons.
333  ******************************************************************************/
334 
335 typedef enum
336 {
337     LM_REASON_NONE                       =  0,
338     LM_REASON_DRIVER_RESET               =  1,
339     LM_REASON_DRIVER_UNLOAD              =  2,
340     LM_REASON_DRIVER_SHUTDOWN            =  3,
341     LM_REASON_WOL_SUSPEND                =  4,
342     LM_REASON_NO_WOL_SUSPEND             =  5,
343     LM_REASON_DIAG                       =  6,
344     LM_REASON_DRIVER_UNLOAD_POWER_DOWN   =  7,   /* Power down phy/serdes */
345     LM_REASON_ERROR_RECOVERY             =  8
346 } lm_reason_t;
347 
348 
349 
350 /*******************************************************************************
351  * Wake up mode.
352  ******************************************************************************/
353 
354 typedef u32_t lm_wake_up_mode_t;
355 
356 #define LM_WAKE_UP_MODE_NONE                    0
357 #define LM_WAKE_UP_MODE_MAGIC_PACKET            1
358 #define LM_WAKE_UP_MODE_NWUF                    2
359 #define LM_WAKE_UP_MODE_LINK_CHANGE             4
360 
361 
362 
363 /*******************************************************************************
364  * Event code.
365  ******************************************************************************/
366 typedef enum
367 {
368     LM_EVENT_CODE_LINK_CHANGE               = 0,
369     LM_EVENT_CODE_PAUSE_OFFLOAD             = 1,
370     LM_EVENT_CODE_RESUME_OFFLOAD            = 2,
371     LM_EVENT_CODE_STOP_CHIP_ACCESS          = 3, /* For Error Recovery Flow */
372     LM_EVENT_CODE_RESTART_CHIP_ACCESS       = 4,  /* For Error Recovery Flow */
373     LM_EVENT_CODE_UPLOAD_ALL                = 5,
374     LM_EVENT_CODE_DCBX_OPERA_CHANGE         = 6,
375     LM_EVENT_CODE_DCBX_REMOTE_CHANGE        = 7,
376     LM_EVENT_CODE_INVALIDATE_VF_BLOCK       = 8,
377 } lm_event_code_t;
378 
379 
380 
381 
382 
383 /*******************************************************************************
384  * Transmit control flags.
385  ******************************************************************************/
386 
387 typedef u32_t lm_tx_flag_t;
388 
389 #define LM_TX_FLAG_INSERT_VLAN_TAG              0x01
390 #define LM_TX_FLAG_COMPUTE_IP_CKSUM             0x02
391 #define LM_TX_FLAG_COMPUTE_TCP_UDP_CKSUM        0x04
392 #define LM_TX_FLAG_TCP_LSO_FRAME                0x08
393 #define LM_TX_FLAG_TCP_LSO_SNAP_FRAME           0x10
394 #define LM_TX_FLAG_COAL_NOW                     0x20
395 #define LM_TX_FLAG_DONT_COMPUTE_CRC             0x40
396 #define LM_TX_FLAG_SKIP_MBQ_WRITE               0x80
397 #define LM_TX_FLAG_IPV6_PACKET                  0x100
398 #define LM_TX_FLAG_VLAN_TAG_EXISTS              0x200
399 /**
400  * If this flag is set, the firmware will ignore global
401  * configuration (except Outer VLAN)and will handle inner Vlan
402  * only according to driver instructions on the bd:
403  * 1. LM_TX_FLAG_VLAN_TAG_EXISTS.
404  * 2. LM_TX_FLAG_INSERT_VLAN_TAG.
405  * Note that if set the firmware will not handle default vlan /
406  * NIV tag / DCB.
407 */
408 #define LM_TX_FLAG_FORCE_VLAN_MODE              0x400
409 /* Encapsulated packet offload flags. */
410 #define LM_TX_FLAG_IS_ENCAP_PACKET              0x800
411 #define LM_TX_FLAG_ENCAP_PACKET_IS_INNER_IPV6   0x1000
412 
413 typedef struct _lm_pkt_tx_info_t
414 {
415     lm_tx_flag_t flags;
416 
417     u16_t vlan_tag;
418     u16_t lso_mss;
419     u16_t lso_ip_hdr_len;
420     u16_t lso_tcp_hdr_len;
421     u32_t lso_payload_len;
422 
423     /* Everest only fields. */
424     u32_t lso_tcp_send_seq;
425     u16_t lso_ipid;
426     u16_t tcp_pseudo_csum;
427     u8_t  lso_tcp_flags;
428     u8_t  tcp_nonce_sum_bit;
429     u16_t fw_ip_csum;
430 
431     u8_t dst_mac_addr[8];
432     s8_t cs_any_offset;
433     u8_t src_mac_addr[8];
434     u8_t _unused1;
435     u8_t eth_type[4];
436 
437     /* Encapsulated packet offsets.  These fields are only valid when
438      * LM_TX_FLAG_IS_ENCAP_PACKET is set. */
439     u8_t  encap_packet_inner_frame_offset;
440     u8_t  encap_packet_inner_ip_relative_offset;
441     u16_t encap_packet_inner_tcp_relative_offset;
442 } lm_pkt_tx_info_t;
443 
444 
445 
446 /*******************************************************************************
447  * Receive control flags.
448  ******************************************************************************/
449 
450 typedef u32_t lm_rx_flag_t;
451 
452 #define LM_RX_FLAG_VALID_VLAN_TAG               0x01
453 #define LM_RX_FLAG_VALID_HASH_VALUE             0x10
454 
455 #define LM_RX_FLAG_IS_IPV4_DATAGRAM             0x0100
456 #define LM_RX_FLAG_IS_IPV6_DATAGRAM             0x0200
457 #define LM_RX_FLAG_IP_CKSUM_IS_GOOD             0x0400
458 #define LM_RX_FLAG_IP_CKSUM_IS_BAD              0x0800
459 
460 #define LM_RX_FLAG_IS_UDP_DATAGRAM              0x1000
461 #define LM_RX_FLAG_UDP_CKSUM_IS_GOOD            0x2000
462 #define LM_RX_FLAG_UDP_CKSUM_IS_BAD             0x4000
463 
464 #define LM_RX_FLAG_IS_TCP_SEGMENT               0x010000
465 #define LM_RX_FLAG_TCP_CKSUM_IS_GOOD            0x020000
466 #define LM_RX_FLAG_TCP_CKSUM_IS_BAD             0x040000
467 #define LM_RX_FLAG_START_RSC_TPA                0x080000
468 
469 typedef struct _lm_pkt_rx_info_t
470 {
471     lm_rx_flag_t flags;
472 
473     u32_t size;
474 
475     u16_t vlan_tag;
476     u16_t _pad;
477 
478     /* Virtual address corresponding to the first byte of the first SGL entry.
479      * This is the starting location of the packet which may begin with some
480      * control information. */
481     u8_t *mem_virt;
482     u32_t mem_size;
483 
484     /* these fields only valid when LM_RX_FLAG_START_RSC_TPA is set */
485     u16_t coal_seg_cnt;
486     u16_t dup_ack_cnt;
487     u32_t ts_delta;  /* valid when timestamp is enabled */
488     /* if the packet is RSC, this field will hold the total size of the
489      * RSC SCU */
490     u32_t total_packet_size;
491 
492     u32_t unused;
493 } lm_pkt_rx_info_t;
494 
495 
496 
497 /*******************************************************************************
498  * various type of counters.
499  ******************************************************************************/
500 
501 typedef enum
502 {
503     LM_STATS_BASE                       = 0x686b3000,
504     LM_STATS_FRAMES_XMITTED_OK          = 0x686b3001,
505     LM_STATS_FRAMES_RECEIVED_OK         = 0x686b3002,
506     LM_STATS_ERRORED_TRANSMIT_CNT       = 0x686b3003,
507     LM_STATS_ERRORED_RECEIVE_CNT        = 0x686b3004,
508     LM_STATS_RCV_CRC_ERROR              = 0x686b3005,
509     LM_STATS_ALIGNMENT_ERROR            = 0x686b3006,
510     LM_STATS_SINGLE_COLLISION_FRAMES    = 0x686b3007,
511     LM_STATS_MULTIPLE_COLLISION_FRAMES  = 0x686b3008,
512     LM_STATS_FRAMES_DEFERRED            = 0x686b3009,
513     LM_STATS_MAX_COLLISIONS             = 0x686b300a,
514     LM_STATS_RCV_OVERRUN                = 0x686b300b,
515     LM_STATS_XMIT_UNDERRUN              = 0x686b300c,
516     LM_STATS_UNICAST_FRAMES_XMIT        = 0x686b300d,
517     LM_STATS_MULTICAST_FRAMES_XMIT      = 0x686b300e,
518     LM_STATS_BROADCAST_FRAMES_XMIT      = 0x686b300f,
519     LM_STATS_UNICAST_FRAMES_RCV         = 0x686b3010,
520     LM_STATS_MULTICAST_FRAMES_RCV       = 0x686b3011,
521     LM_STATS_BROADCAST_FRAMES_RCV       = 0x686b3012,
522     LM_STATS_RCV_NO_BUFFER_DROP         = 0x686b3013,
523     LM_STATS_BYTES_RCV                  = 0x686b3014,
524     LM_STATS_BYTES_XMIT                 = 0x686b3015,
525     LM_STATS_IP4_OFFLOAD                = 0x686b3016,
526     LM_STATS_TCP_OFFLOAD                = 0x686b3017,
527     LM_STATS_IF_IN_DISCARDS             = 0x686b3018,
528     LM_STATS_IF_IN_ERRORS               = 0x686b3019,
529     LM_STATS_IF_OUT_ERRORS              = 0x686b301a,
530     LM_STATS_IP6_OFFLOAD                = 0x686b301b,
531     LM_STATS_TCP6_OFFLOAD               = 0x686b301c,
532     LM_STATS_XMIT_DISCARDS              = 0x686b301d,
533     LM_STATS_DIRECTED_BYTES_RCV         = 0x686b301e,
534     LM_STATS_MULTICAST_BYTES_RCV        = 0x686b301f,
535     LM_STATS_BROADCAST_BYTES_RCV        = 0x686b3020,
536     LM_STATS_DIRECTED_BYTES_XMIT        = 0x686b3021,
537     LM_STATS_MULTICAST_BYTES_XMIT       = 0x686b3022,
538     LM_STATS_BROADCAST_BYTES_XMIT       = 0x686b3023,
539 } lm_stats_t;
540 
541 #define NUM_OF_LM_STATS                       36
542 
543 
544 
545 /*******************************************************************************
546  * 64-bit value.
547  ******************************************************************************/
548 
549 typedef union _lm_u64_t
550 {
551     struct _lm_u64_as_u32_t
552     {
553         #ifdef BIG_ENDIAN_HOST
554         u32_t high;
555         u32_t low;
556         #else
557         u32_t low;
558         u32_t high;
559         #endif
560     } as_u32;
561 
562     u64_t as_u64;
563 
564     void *as_ptr;
565 } lm_u64_t;
566 
567 
568 typedef lm_u64_t lm_address_t;
569 
570 
571 /* 64-bit increment.  The second argument is a 32-bit value. */
572 #define LM_INC64(result, addend32)          \
573     {                                       \
574         u32_t low;                          \
575                                             \
576         low = (result)->as_u32.low;         \
577         (result)->as_u32.low += (addend32); \
578         if((result)->as_u32.low < low)      \
579         {                                   \
580             (result)->as_u32.high++;        \
581         }                                   \
582     }
583 
584 
585 /* 64-bit decrement.  The second argument is a 32-bit value. */
586 #define LM_DEC64(result, addend32)          \
587     {                                       \
588         u32_t low;                          \
589                                             \
590         low = (result)->as_u32.low;         \
591         (result)->as_u32.low -= (addend32); \
592         if((result)->as_u32.low > low)      \
593         {                                   \
594             (result)->as_u32.high--;        \
595         }                                   \
596     }
597 
598 /*******************************************************************************
599  * IP4 and TCP offload stats.
600  ******************************************************************************/
601 
602 typedef struct _lm_ip4_offload_stats_t
603 {
604     u64_t in_receives;
605     u64_t in_delivers;
606     u64_t out_requests;
607     u32_t in_header_errors;
608     u32_t in_discards;
609     u32_t out_discards;
610     u32_t out_no_routes;
611 
612     u32_t _pad[8];
613 } lm_ip4_offload_stats_t;
614 
615 
616 typedef struct _lm_tcp_offload_stats_t
617 {
618     u64_t in_segments;
619     u64_t out_segments;
620     u32_t retran_segments;
621     u32_t in_errors;
622     u32_t out_resets;
623 
624     u32_t _pad[8];
625 } lm_tcp_offload_stats_t;
626 
627 
628 
629 /*******************************************************************************
630  * Host to network order conversion.
631  ******************************************************************************/
632 
633 #ifdef BIG_ENDIAN_HOST
634 
635 #ifndef HTON16
636 #define HTON16(_val16)      (_val16)
637 #endif
638 #ifndef HTON32
639 #define HTON32(_val32)      (_val32)
640 #ifndef NTOH16
641 #endif
642 #define NTOH16(_val16)      (_val16)
643 #endif
644 #ifndef NTOH32
645 #define NTOH32(_val32)      (_val32)
646 #endif
647 
648 #else
649 
650 #ifndef HTON16
651 #define HTON16(_val16)      (((_val16 & 0xff00) >> 8) | ((_val16 & 0xff) << 8))
652 #endif
653 #ifndef HTON32
654 #define HTON32(_val32)      ((HTON16(_val32) << 16) | (HTON16(_val32 >> 16)))
655 #endif
656 #ifndef NTOH16
657 #define NTOH16(_val16)      HTON16(_val16)
658 #endif
659 #ifndef NTOH32
660 #define NTOH32(_val32)      HTON32(_val32)
661 #endif
662 
663 #endif
664 
665 
666 
667 /*******************************************************************************
668  * Fragment structure.
669  ******************************************************************************/
670 
671 typedef struct _lm_frag_t
672 {
673     lm_address_t addr;
674     u32_t size;
675 
676     #if defined(_WIN64)     /* mirror the SCATTER_GATHER_ELEMENT structure. */
677     u64_t _reserved;
678     #else
679     u32_t _reserved;
680     #endif
681 } lm_frag_t;
682 
683 typedef struct _lm_frag_list_t
684 {
685     u32_t cnt;
686 
687     #if defined(_WIN64)     /* mirror the SCATTER_GATHER_LIST structure. */
688     u64_t size;
689     #else
690     u32_t size;
691     #endif
692 
693     lm_frag_t frag_arr[1];
694 } lm_frag_list_t;
695 
696 /* a macro for declaring 'lm_frag_list_t' with various array sizes. */
697 #define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_CNT)   \
698     typedef struct _##_FRAG_LIST_TYPE_NAME                                   \
699     {                                                                        \
700         lm_frag_list_t list;                                                 \
701         lm_frag_t frag_arr[_MAX_FRAG_CNT-1];                                 \
702     } _FRAG_LIST_TYPE_NAME
703 
704 
705 
706 /*******************************************************************************
707  * DCBX indicate event parameters.
708  ******************************************************************************/
709 typedef enum _dcb_condition_selector_t
710 {
711     DCB_CONDITION_RESERVED,
712     DCB_CONDITION_DEFAULT,
713     DCB_CONDITION_TCP_PORT,
714     DCB_CONDITION_UDP_PORT,
715     DCB_CONDITION_TCP_OR_UDP_PORT,
716     DCB_CONDITION_ETHERTYPE,
717     DCB_CONDITION_NETDIRECT_PORT,
718     DCB_CONDITION_MAX,
719 }dcb_condition_selector_t;
720 
721 typedef enum _action_selector_t
722 {
723     DCB_ACTION_PRIORITY,
724     DCB_ACTION_MAX,
725 } action_selector_t;
726 
727 typedef struct _dcb_classif_elem_t
728 {
729     u32_t flags;
730     #define DCB_CLASSIF_ENFORCED_BY_VBD         0x1
731     dcb_condition_selector_t condition_selector;
732     u16_t condition_field;
733     action_selector_t action_selector;
734     u16_t action_field;
735 }dcb_classif_elem_t;
736 
737 typedef enum _dcb_classif_version_t
738 {
739     DCB_CLASSIFI_VER_SIMPLE_ELEM,
740     DCB_CLASSIFI_VER_SIMPLE_ELEM_MAX,
741 }dcb_classif_version_t;
742 
743 typedef struct _dcb_classif_params_t
744 {
745     u16_t num_classif_elements;
746     u16_t _pad;
747     dcb_classif_version_t classif_version;
748     void *classif_table;
749 }dcb_classif_params_t;
750 
751 typedef struct _dcb_pfc_param_t
752 {
753     u32_t pfc_enable;
754     #define DCB_PFC_MAX_BIT_ENABLE_MASK     (0xFF)
755 }dcb_pfc_param_t;
756 
757 typedef enum _tsa_assignment
758 {
759     TSA_ASSIGNMENT_DCB_TSA_STRICT,
760     TSA_ASSIGNMENT_DCB_TSA_CBS,
761     TSA_ASSIGNMENT_DCB_TSA_ETS,
762 }tsa_assignment;
763 
764 typedef struct _dcb_ets_tsa_param_t
765 {
766     u32_t num_traffic_classes;
767     u8_t priority_assignment_table[8];
768     u8_t tc_bw_assignment_table[8];
769     tsa_assignment tsa_assignment_table[8];
770 } dcb_ets_tsa_param_t;
771 
772 typedef struct _dcb_indicate_event_params_t
773 {
774     u32_t flags;
775     #define DCB_PARAMS_ETS_ENABLED                      0x00000001
776     #define DCB_PARAMS_ETS_CHANGED                      0x00000002
777     #define DCB_PARAMS_PFC_ENABLED                      0x00000004
778     #define DCB_PARAMS_PFC_CHANGED                      0x00000008
779     #define DCB_PARAMS_CLASSIF_ENABLED                  0x00000020
780     #define DCB_PARAMS_CLASSIF_CHANGED                  0x00000040
781     #define DCB_PARAMS_WILLING                          0x00000080
782 
783     dcb_ets_tsa_param_t ets_params;
784     dcb_pfc_param_t pfc_params;
785     dcb_classif_params_t classif_params;
786     u32_t reserved[4];
787 } dcb_indicate_event_params_t;
788 
789 /*******************************************************************************
790  * Macro fore calculating the address of the base of the structure given its
791  * type, and an address of a field within the structure.
792  ******************************************************************************/
793 
794 #define GET_CONTAINING_RECORD(address, type, field) \
795     ((type *) ((u8_t *) (address) - (u8_t *) (&((type *) 0)->field)))
796 
797 
798 
799 /*******************************************************************************
800  * Simple macros.
801  ******************************************************************************/
802 
803 #define IS_ETH_BROADCAST(eth_addr)                                       \
804     (((unsigned char *) (eth_addr))[0] == ((unsigned char) 0xff))
805 
806 #define IS_ETH_MULTICAST(eth_addr)                                       \
807     (((unsigned char *) (eth_addr))[0] & ((unsigned char) 0x01))
808 
809 #define IS_ETH_ADDRESS_EQUAL(eth_addr1, eth_addr2)                       \
810     ((((unsigned char *) (eth_addr1))[0] ==                              \
811     ((unsigned char *) (eth_addr2))[0]) &&                               \
812     (((unsigned char *) (eth_addr1))[1] ==                               \
813     ((unsigned char *) (eth_addr2))[1]) &&                               \
814     (((unsigned char *) (eth_addr1))[2] ==                               \
815     ((unsigned char *) (eth_addr2))[2]) &&                               \
816     (((unsigned char *) (eth_addr1))[3] ==                               \
817     ((unsigned char *) (eth_addr2))[3]) &&                               \
818     (((unsigned char *) (eth_addr1))[4] ==                               \
819     ((unsigned char *) (eth_addr2))[4]) &&                               \
820     (((unsigned char *) (eth_addr1))[5] ==                               \
821     ((unsigned char *) (eth_addr2))[5]))
822 
823 #define COPY_ETH_ADDRESS(src, dst)                                       \
824     ((unsigned char *) (dst))[0] = ((unsigned char *) (src))[0];         \
825     ((unsigned char *) (dst))[1] = ((unsigned char *) (src))[1];         \
826     ((unsigned char *) (dst))[2] = ((unsigned char *) (src))[2];         \
827     ((unsigned char *) (dst))[3] = ((unsigned char *) (src))[3];         \
828     ((unsigned char *) (dst))[4] = ((unsigned char *) (src))[4];         \
829     ((unsigned char *) (dst))[5] = ((unsigned char *) (src))[5];
830 
831 #endif /* _LM_DEFS_H */
832