IsRet (definition) in projects: freebsd

Searched defs:IsRet (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A D	RISCVCallLowering.cpp	`35 bool IsRet; member 181 bool IsRet; member`
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A D	LoongArchISelLowering.cpp	`4719 CCState &State, bool IsFixed, bool IsRet, in CC_LoongArch() 4869 const SmallVectorImpl<ISD::InputArg> &Ins, bool IsRet, in analyzeInputArgs() 4892 const SmallVectorImpl<ISD::OutputArg> &Outs, bool IsRet, in analyzeOutputArgs()`
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	18994 CC_RISCV(const DataLayout & DL,RISCVABI::ABI ABI,unsigned ValNo,MVT ValVT,MVT LocVT,CCValAssign::LocInfo LocInfo,ISD::ArgFlagsTy ArgFlags,CCState & State,bool IsFixed,bool IsRet,Type * OrigTy,const RISCVTargetLowering & TLI,RVVArgDispatcher & RVVDispatcher) CC_RISCV() argument 19245 analyzeInputArgs(MachineFunction & MF,CCState & CCInfo,const SmallVectorImpl<ISD::InputArg> & Ins,bool IsRet,RISCVCCAssignFn Fn) const analyzeInputArgs() argument 19283 analyzeOutputArgs(MachineFunction & MF,CCState & CCInfo,const SmallVectorImpl<ISD::OutputArg> & Outs,bool IsRet,CallLoweringInfo * CLI,RISCVCCAssignFn Fn) const analyzeOutputArgs() argument 19482 CC_RISCV_FastCC(const DataLayout & DL,RISCVABI::ABI ABI,unsigned ValNo,MVT ValVT,MVT LocVT,CCValAssign::LocInfo LocInfo,ISD::ArgFlagsTy ArgFlags,CCState & State,bool IsFixed,bool IsRet,Type * OrigTy,const RISCVTargetLowering & TLI,RVVArgDispatcher & RVVDispatcher) CC_RISCV_FastCC() argument [all...]