| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/ |
| H A D | ELF_aarch64.cpp | 279 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
288 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
305 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
316 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
327 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
338 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
349 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
360 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
371 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
382 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
[all …]
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| H A D | aarch64.cpp | 105 uint32_t Instr = MOVGPR64Template; in writeMovRegRegSeq() local
131 uint32_t Instr = MovRegImm64Template; in writeMovRegImm64Seq() local
181 uint32_t Instr = PACTemplate; in writePACSignSeq() local
200 uint32_t Instr = STRTemplate; in writeStoreRegSeq() local
325 auto AppendInstr = [&](uint32_t Instr) { in lowerPointer64AuthEdgesToSigningFunction()
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| H A D | MachO_arm64.cpp | 373 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addRelocations() local
420 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addRelocations() local
440 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addRelocations() local
454 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addRelocations() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/ |
| H A D | aarch64.h | 425 inline bool isLoadStoreImm12(uint32_t Instr) { in isLoadStoreImm12()
430 inline bool isTestAndBranchImm14(uint32_t Instr) { in isTestAndBranchImm14()
435 inline bool isCondBranchImm19(uint32_t Instr) { in isCondBranchImm19()
440 inline bool isCompAndBranchImm19(uint32_t Instr) { in isCompAndBranchImm19()
445 inline bool isADR(uint32_t Instr) { in isADR()
450 inline bool isLDRLiteral(uint32_t Instr) { in isLDRLiteral()
461 inline unsigned getPageOffset12Shift(uint32_t Instr) { in getPageOffset12Shift()
477 inline bool isMoveWideImm16(uint32_t Instr) { in isMoveWideImm16()
486 inline unsigned getMoveWide16Shift(uint32_t Instr) { in getMoveWide16Shift()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 737 struct Instr { in select() struct
738 unsigned Opcode; in select()
739 Register Def, LHS, RHS; in select()
740 Instr(unsigned Opcode, Register Def, Register LHS, Register RHS) in select() function
743 bool hasImm() const { in select()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | VectorUtils.h | 531 InterleaveGroup(InstTy *Instr, int32_t Stride, Align Alignment) in InterleaveGroup()
550 bool insertMember(InstTy *Instr, int32_t Index, Align NewAlign) { in insertMember()
602 uint32_t getIndex(const InstTy *Instr) const { in getIndex()
704 bool isInterleaved(Instruction *Instr) const { in isInterleaved()
712 getInterleaveGroup(const Instruction *Instr) const { in getInterleaveGroup()
787 createInterleaveGroup(Instruction *Instr, int Stride, Align Alignment) { in createInterleaveGroup()
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| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFCFIPrinter.cpp | 43 const CFIProgram::Instruction &Instr, in printOperand()
113 for (const auto &Instr : P) { in printCFIProgram() local
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/ |
| H A D | GIMatchDagPredicate.cpp | |
| H A D | GIMatchDagPredicate.h | |
| H A D | GIMatchTree.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFeatures.h | 24 inline bool isV8EligibleForIT(const InstrType *Instr) { in isV8EligibleForIT()
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| H A D | MVETPAndVPTOptimisationsPass.cpp | 572 static ARMCC::CondCodes GetCondCode(MachineInstr &Instr) { in GetCondCode()
605 static bool IsWritingToVCCR(MachineInstr &Instr) { in IsWritingToVCCR()
628 MachineBasicBlock &MBB, MachineInstr &Instr, MachineOperand &User, in ReplaceRegisterUseWithVPNOT()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RemoveRedundantDebugValues.cpp | 141 for (auto &Instr : DbgValsToBeRemoved) { in reduceDbgValsForwardScan() local
196 for (auto &Instr : DbgValsToBeRemoved) { in reduceDbgValsBackwardScan() local
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| H A D | MachineUniformityAnalysis.cpp | 33 const MachineInstr &Instr) { in markDefsDivergent()
80 const MachineInstr &Instr) { in pushUsers()
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| H A D | MachineSSAContext.cpp | 112 if (auto *Instr = MRI->getUniqueVRegDef(Value)) { in print() local
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | UniformityAnalysis.cpp | 28 const Instruction &Instr) { in markDefsDivergent()
58 const Instruction &Instr) { in pushUsers()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 95 static void PostOperandDecodeAdjust(MCInst &Instr, uint32_t Insn) { in PostOperandDecodeAdjust()
137 LanaiDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, in getInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanSLP.h | 67 getInterleaveGroup(VPInstruction *Instr) const { in getInterleaveGroup()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | CorrelatedValuePropagation.cpp | 768 static bool narrowSDivOrSRem(BinaryOperator *Instr, const ConstantRange &LCR, in narrowSDivOrSRem()
814 static bool expandUDivOrURem(BinaryOperator *Instr, const ConstantRange &XCR, in expandUDivOrURem()
895 static bool narrowUDivOrURem(BinaryOperator *Instr, const ConstantRange &XCR, in narrowUDivOrURem()
932 static bool processUDivOrURem(BinaryOperator *Instr, LazyValueInfo *LVI) { in processUDivOrURem()
1062 static bool processSDivOrSRem(BinaryOperator *Instr, LazyValueInfo *LVI) { in processSDivOrSRem()
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| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| H A D | RuntimeDyldELF.cpp | 772 auto Instr = support::ulittle32_t::ref(TargetPtr); in resolveLoongArch64Relocation() local
796 auto Instr = support::ulittle32_t::ref(TargetPtr); in resolveLoongArch64Relocation() local
804 auto Instr = support::ulittle32_t::ref(TargetPtr); in resolveLoongArch64Relocation() local
811 auto Instr = support::ulittle32_t::ref(TargetPtr); in resolveLoongArch64Relocation() local
818 auto Instr = support::ulittle32_t::ref(TargetPtr); in resolveLoongArch64Relocation() local
825 auto Instr = support::ulittle32_t::ref(TargetPtr); in resolveLoongArch64Relocation() local
832 auto Instr = support::ulittle32_t::ref(TargetPtr); in resolveLoongArch64Relocation() local
1226 auto Instr = support::ulittle32_t::ref(InstrAddr); in applyUTypeImmRISCV() local
1232 auto Instr = support::ulittle32_t::ref(InstrAddr); in applyITypeImmRISCV() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | DbgEntityHistoryCalculator.h | 78 Entry(const MachineInstr *Instr, EntryKind Kind) in Entry()
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| H A D | LiveIntervals.h | 242 bool isNotInMIMap(const MachineInstr &Instr) const { in isNotInMIMap()
247 SlotIndex getInstructionIndex(const MachineInstr &Instr) const { in getInstructionIndex()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/ |
| H A D | PatternParser.cpp | 115 auto &Instr = CGT.getInstruction(IP->getOperatorAsDef(DiagLoc)); in parseInstructionPattern() local
122 const CodeGenInstruction &Instr = getInstrForIntrinsic(CGT, Intrin); in parseInstructionPattern() local
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | SSAContext.cpp | 65 bool SSAContext::isConstantOrUndefValuePhi(const Instruction &Instr) { in isConstantOrUndefValuePhi()
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| H A D | FPEnv.cpp | 90 Intrinsic::ID getConstrainedIntrinsicID(const Instruction &Instr) { in getConstrainedIntrinsicID()
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