| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86InstComments.cpp | 25 #define CASE_SSE_INS_COMMON(Inst, src) \ argument
28 #define CASE_AVX_INS_COMMON(Inst, Suffix, src) \ argument
31 #define CASE_MASK_INS_COMMON(Inst, Suffix, src) \ argument
34 #define CASE_MASKZ_INS_COMMON(Inst, Suffix, src) \ argument
37 #define CASE_AVX512_INS_COMMON(Inst, Suffix, src) \ argument
42 #define CASE_MOVDUP(Inst, src) \ argument
50 #define CASE_MASK_MOVDUP(Inst, src) \ argument
55 #define CASE_MASKZ_MOVDUP(Inst, src) \ argument
60 #define CASE_PMOVZX(Inst, src) \ argument
68 #define CASE_UNPCK(Inst, src) \ argument
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 65 static DecodeStatus decodeCondBrTarget(MCInst &Inst, unsigned Imm, in decodeCondBrTarget()
72 static DecodeStatus decodeDirectBrTarget(MCInst &Inst, unsigned Imm, in decodeDirectBrTarget()
84 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass()
92 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRCRegisterClass()
98 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRBITRCRegisterClass()
104 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF4RCRegisterClass()
110 static DecodeStatus DecodeF8RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF8RCRegisterClass()
116 static DecodeStatus DecodeFpRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFpRCRegisterClass()
124 static DecodeStatus DecodeVFRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVFRCRegisterClass()
130 static DecodeStatus DecodeVRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVRRCRegisterClass()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 81 decodeRegisterClass(MCInst & Inst,uint64_t RegNo,const unsigned * Regs,unsigned Size,bool IsAddr=false) decodeRegisterClass() argument
96 DecodeGR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR32BitRegisterClass() argument
102 DecodeGRH32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGRH32BitRegisterClass() argument
108 DecodeGR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR64BitRegisterClass() argument
114 DecodeGR128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR128BitRegisterClass() argument
121 DecodeADDR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeADDR32BitRegisterClass() argument
127 DecodeADDR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeADDR64BitRegisterClass() argument
132 DecodeFP32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP32BitRegisterClass() argument
138 DecodeFP64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP64BitRegisterClass() argument
144 DecodeFP128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP128BitRegisterClass() argument
150 DecodeVR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR32BitRegisterClass() argument
156 DecodeVR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR64BitRegisterClass() argument
162 DecodeVR128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR128BitRegisterClass() argument
168 DecodeAR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeAR32BitRegisterClass() argument
174 DecodeCR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCR64BitRegisterClass() argument
181 decodeUImmOperand(MCInst & Inst,uint64_t Imm) decodeUImmOperand() argument
189 decodeSImmOperand(MCInst & Inst,uint64_t Imm) decodeSImmOperand() argument
196 decodeU1ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU1ImmOperand() argument
202 decodeU2ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU2ImmOperand() argument
208 decodeU3ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU3ImmOperand() argument
214 decodeU4ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU4ImmOperand() argument
220 decodeU8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU8ImmOperand() argument
226 decodeU12ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU12ImmOperand() argument
232 decodeU16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU16ImmOperand() argument
238 decodeU32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU32ImmOperand() argument
244 decodeS8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS8ImmOperand() argument
250 decodeS16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS16ImmOperand() argument
256 decodeS20ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS20ImmOperand() argument
262 decodeS32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS32ImmOperand() argument
269 decodeLenOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeLenOperand() argument
279 decodePCDBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,bool isBranch,const MCDisassembler * Decoder) decodePCDBLOperand() argument
292 decodePC12DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC12DBLBranchOperand() argument
298 decodePC16DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC16DBLBranchOperand() argument
304 decodePC24DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC24DBLBranchOperand() argument
310 decodePC32DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLBranchOperand() argument
316 decodePC32DBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLOperand() argument
353 uint64_t Inst = 0; getInstruction() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 331 static DecodeStatus DecodeSimpleRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeSimpleRegisterClass()
344 DecodeGPR64x8ClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPR64x8ClassRegisterClass()
358 static DecodeStatus DecodeZPR2Mul2RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeZPR2Mul2RegisterClass()
369 static DecodeStatus DecodeZPR4Mul4RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeZPR4Mul4RegisterClass()
381 DecodeMatrixTileListRegisterClass(MCInst &Inst, unsigned RegMask, in DecodeMatrixTileListRegisterClass()
402 static DecodeStatus DecodeMatrixTile(MCInst &Inst, unsigned RegNo, in DecodeMatrixTile()
413 static DecodeStatus DecodePPR2Mul2RegisterClass(MCInst &Inst, unsigned RegNo, in DecodePPR2Mul2RegisterClass()
424 static DecodeStatus DecodeFixedPointScaleImm32(MCInst &Inst, unsigned Imm, in DecodeFixedPointScaleImm32()
433 static DecodeStatus DecodeFixedPointScaleImm64(MCInst &Inst, unsigned Imm, in DecodeFixedPointScaleImm64()
440 static DecodeStatus DecodePCRelLabel16(MCInst &Inst, unsigned Imm, in DecodePCRelLabel16()
[all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrAnalysis.h | 53 virtual void updateState(const MCInst &Inst, uint64_t Addr) {} in updateState()
55 virtual bool isBranch(const MCInst &Inst) const { in isBranch()
59 virtual bool isConditionalBranch(const MCInst &Inst) const { in isConditionalBranch()
63 virtual bool isUnconditionalBranch(const MCInst &Inst) const { in isUnconditionalBranch()
67 virtual bool isIndirectBranch(const MCInst &Inst) const { in isIndirectBranch()
71 virtual bool isCall(const MCInst &Inst) const { in isCall()
75 virtual bool isReturn(const MCInst &Inst) const { in isReturn()
79 virtual bool isTerminator(const MCInst &Inst) const { in isTerminator()
83 virtual bool mayAffectControlFlow(const MCInst &Inst, in mayAffectControlFlow()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 108 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRRegisterClass()
118 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32RegisterClass()
128 static DecodeStatus DecodesFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodesFPR32RegisterClass()
138 static DecodeStatus DecodesFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodesFPR64RegisterClass()
148 static DecodeStatus DecodesFPR64_VRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodesFPR64_VRegisterClass()
158 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR64RegisterClass()
170 static DecodeStatus DecodesFPR128RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodesFPR128RegisterClass()
180 static DecodeStatus DecodesGPRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodesGPRRegisterClass()
190 static DecodeStatus DecodemGPRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodemGPRRegisterClass()
202 static DecodeStatus DecodeGPRSPRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRSPRegisterClass()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMatInt.h | 17 struct Inst { struct
20 Inst(unsigned Opc, int64_t Imm) : Opc(Opc), Imm(Imm) {} in Inst() argument
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 71 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeGPRRegisterClass()
84 static DecodeStatus DecodeGPRX1X5RegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeGPRX1X5RegisterClass()
95 static DecodeStatus DecodeFPR16RegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeFPR16RegisterClass()
106 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeFPR32RegisterClass()
117 static DecodeStatus DecodeFPR32CRegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeFPR32CRegisterClass()
128 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeFPR64RegisterClass()
139 static DecodeStatus DecodeFPR64CRegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeFPR64CRegisterClass()
150 static DecodeStatus DecodeGPRNoX0RegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeGPRNoX0RegisterClass()
161 DecodeGPRNoX0X2RegisterClass(MCInst &Inst, uint64_t RegNo, uint32_t Address, in DecodeGPRNoX0X2RegisterClass()
170 static DecodeStatus DecodeGPRCRegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeGPRCRegisterClass()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 352 static DecodeStatus DecodeUImmWithOffset(MCInst &Inst, unsigned Value, in DecodeUImmWithOffset()
1338 DecodeCPU16RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeCPU16RegsRegisterClass()
1343 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR64RegisterClass()
1354 static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRMM16RegisterClass()
1365 DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPRMM16ZeroRegisterClass()
1375 DecodeGPRMM16MovePRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPRMM16MovePRegisterClass()
1384 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR32RegisterClass()
1394 static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, unsigned RegNo, in DecodePtrRegisterClass()
1403 static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDSPRRegisterClass()
1409 static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFGR64RegisterClass()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1296 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRRegisterClass()
1307 static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeCLRMGPRRegisterClass()
1321 static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRnopcRegisterClass()
1334 static DecodeStatus DecodeGPRnospRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRnospRegisterClass()
1348 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPRwithAPSRRegisterClass()
1363 DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPRwithZRRegisterClass()
1381 DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPRwithZRnospRegisterClass()
1390 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetGPRRegisterClass()
1403 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRPairRegisterClass()
1422 DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPRPairnospRegisterClass()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/ |
| H A D | XtensaDisassembler.cpp | 67 static DecodeStatus DecodeARRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeARRegisterClass()
80 static DecodeStatus DecodeSRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeSRRegisterClass()
106 static DecodeStatus decodeCallOperand(MCInst &Inst, uint64_t Imm, in decodeCallOperand()
113 static DecodeStatus decodeJumpOperand(MCInst &Inst, uint64_t Imm, in decodeJumpOperand()
120 static DecodeStatus decodeBranchOperand(MCInst &Inst, uint64_t Imm, in decodeBranchOperand()
141 static DecodeStatus decodeL32ROperand(MCInst &Inst, uint64_t Imm, in decodeL32ROperand()
150 static DecodeStatus decodeImm8Operand(MCInst &Inst, uint64_t Imm, in decodeImm8Operand()
157 static DecodeStatus decodeImm8_sh8Operand(MCInst &Inst, uint64_t Imm, in decodeImm8_sh8Operand()
165 static DecodeStatus decodeImm12Operand(MCInst &Inst, uint64_t Imm, in decodeImm12Operand()
172 static DecodeStatus decodeUimm4Operand(MCInst &Inst, uint64_t Imm, in decodeUimm4Operand()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 58 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRRegisterClass()
67 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32RegisterClass()
76 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR64RegisterClass()
85 static DecodeStatus DecodeCFRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCFRRegisterClass()
94 static DecodeStatus DecodeFCSRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFCSRRegisterClass()
103 static DecodeStatus DecodeLSX128RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeLSX128RegisterClass()
112 static DecodeStatus DecodeLASX256RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeLASX256RegisterClass()
121 static DecodeStatus DecodeSCRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeSCRRegisterClass()
131 static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm, in decodeUImmOperand()
140 static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm, in decodeSImmOperand()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 70 static DecodeStatus DecodeGPR8RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR8RegisterClass()
81 static DecodeStatus DecodeLD8RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeLD8RegisterClass()
142 static DecodeStatus decodeFIOARr(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFIOARr()
155 static DecodeStatus decodeFIORdA(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFIORdA()
168 static DecodeStatus decodeFIOBIT(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFIOBIT()
177 static DecodeStatus decodeCallTarget(MCInst &Inst, unsigned Field, in decodeCallTarget()
186 static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFRd()
195 static DecodeStatus decodeFLPMX(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFLPMX()
203 static DecodeStatus decodeFFMULRdRr(MCInst &Inst, unsigned Insn, in decodeFFMULRdRr()
217 static DecodeStatus decodeFMOVWRdRr(MCInst &Inst, unsigned Insn, in decodeFMOVWRdRr()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/Disassembler/ |
| H A D | M68kDisassembler.cpp | 41 DecodeRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeRegisterClass() argument
49 DecodeDR32RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeDR32RegisterClass() argument
55 DecodeDR16RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeDR16RegisterClass() argument
61 DecodeDR8RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeDR8RegisterClass() argument
67 DecodeAR32RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeAR32RegisterClass() argument
73 DecodeAR16RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeAR16RegisterClass() argument
79 DecodeXR32RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeXR32RegisterClass() argument
85 DecodeXR16RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeXR16RegisterClass() argument
91 DecodeFPDRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeFPDRRegisterClass() argument
100 DecodeCCRCRegisterClass(MCInst & Inst,APInt & Insn,uint64_t Address,const void * Decoder) DecodeCCRCRegisterClass() argument
106 DecodeImm32(MCInst & Inst,uint64_t Imm,uint64_t Address,const void * Decoder) DecodeImm32() argument
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 176 static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGRRegsRegisterClass()
186 static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeRRegsRegisterClass()
196 static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val, in DecodeBitpOperand()
208 static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val, in DecodeNegImmOperand()
249 static DecodeStatus Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, in Decode2OpInstructionFail()
319 static DecodeStatus Decode2RInstruction(MCInst &Inst, unsigned Insn, in Decode2RInstruction()
332 static DecodeStatus Decode2RImmInstruction(MCInst &Inst, unsigned Insn, in Decode2RImmInstruction()
345 static DecodeStatus DecodeR2RInstruction(MCInst &Inst, unsigned Insn, in DecodeR2RInstruction()
358 static DecodeStatus Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, in Decode2RSrcDstInstruction()
372 static DecodeStatus DecodeRUSInstruction(MCInst &Inst, unsigned Insn, in DecodeRUSInstruction()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 187 MCInst *Inst = getContext().createMCInst(); getInstruction() local
498 auto const &Inst = *i->getInst(); getSingleInstruction() local
527 MCInst const &Inst = HexagonMCInstrInfo::isDuplex(*MCII, MI) getSingleInstruction() local
537 DecodeRegisterClass(MCInst & Inst,unsigned RegNo,ArrayRef<MCPhysReg> Table) DecodeRegisterClass() argument
548 DecodeIntRegsLow8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeIntRegsLow8RegisterClass() argument
553 DecodeIntRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeIntRegsRegisterClass() argument
569 DecodeGeneralSubRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGeneralSubRegsRegisterClass() argument
582 DecodeHvxVRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxVRRegisterClass() argument
598 DecodeDoubleRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeDoubleRegsRegisterClass() argument
611 DecodeGeneralDoubleLow8RegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeGeneralDoubleLow8RegsRegisterClass() argument
621 DecodeHvxWRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxWRRegisterClass() argument
639 DecodeHvxVQRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxVQRRegisterClass() argument
649 DecodePredRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodePredRegsRegisterClass() argument
658 DecodeHvxQRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxQRRegisterClass() argument
667 DecodeCtrRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeCtrRegsRegisterClass() argument
696 DecodeCtrRegs64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeCtrRegs64RegisterClass() argument
723 DecodeModRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeModRegsRegisterClass() argument
807 DecodeSysRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeSysRegsRegisterClass() argument
835 DecodeSysRegs64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeSysRegs64RegisterClass() argument
850 DecodeGuestRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeGuestRegsRegisterClass() argument
876 DecodeGuestRegs64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeGuestRegs64RegisterClass() argument
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiMCCodeEmitter.cpp | 111 const MCInst &Inst, cons in getMachineOpValue() argument
136 adjustPqBits(const MCInst & Inst,unsigned Value,unsigned PBitShift,unsigned QBitShift) adjustPqBits() argument
162 adjustPqBitsRmAndRrm(const MCInst & Inst,unsigned Value,const MCSubtargetInfo & STI) const adjustPqBitsRmAndRrm() argument
168 adjustPqBitsSpls(const MCInst & Inst,unsigned Value,const MCSubtargetInfo & STI) const adjustPqBitsSpls() argument
174 encodeInstruction(const MCInst & Inst,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & SubtargetInfo) const encodeInstruction() argument
186 getRiMemoryOpValue(const MCInst & Inst,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & SubtargetInfo) const getRiMemoryOpValue() argument
218 getRrMemoryOpValue(const MCInst & Inst,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & SubtargetInfo) const getRrMemoryOpValue() argument
256 getSplsOpValue(const MCInst & Inst,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & SubtargetInfo) const getSplsOpValue() argument
289 getBranchTargetOpValue(const MCInst & Inst,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & SubtargetInfo) const getBranchTargetOpValue() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 131 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR32RegisterClass()
144 static DecodeStatus DecodeGBR32ShortRegister(MCInst &Inst, unsigned RegNo, in DecodeGBR32ShortRegister()
169 static DecodeStatus DecodeMEMrs9(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMEMrs9()
179 static bool DecodeSymbolicOperand(MCInst &Inst, uint64_t Address, in DecodeSymbolicOperand()
187 static void DecodeSymbolicOperandOff(MCInst &Inst, uint64_t Address, in DecodeSymbolicOperandOff()
197 static DecodeStatus DecodeBranchTargetS(MCInst &Inst, unsigned InsnS, in DecodeBranchTargetS()
207 static DecodeStatus DecodeSignedOperand(MCInst &Inst, unsigned InsnS, in DecodeSignedOperand()
218 static DecodeStatus DecodeFromCyclicRange(MCInst &Inst, unsigned InsnS, in DecodeFromCyclicRange()
229 static DecodeStatus DecodeStLImmInstruction(MCInst &Inst, uint64_t Insn, in DecodeStLImmInstruction()
246 static DecodeStatus DecodeLdLImmInstruction(MCInst &Inst, uint64_t Insn, in DecodeLdLImmInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 145 DecodeIntRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeIntRegsRegisterClass() argument
155 DecodeI64RegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeI64RegsRegisterClass() argument
163 DecodePointerLikeRegClass0(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodePointerLikeRegClass0() argument
169 DecodeFPRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPRegsRegisterClass() argument
179 DecodeDFPRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDFPRegsRegisterClass() argument
189 DecodeQFPRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeQFPRegsRegisterClass() argument
203 DecodeCoprocRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCoprocRegsRegisterClass() argument
212 DecodeFCCRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFCCRegsRegisterClass() argument
221 DecodeASRRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeASRRegsRegisterClass() argument
230 DecodePRRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodePRRegsRegisterClass() argument
239 DecodeIntPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeIntPairRegisterClass() argument
256 DecodeCoprocPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCoprocPairRegisterClass() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVAsmPrinter.cpp | 236 void SPIRVAsmPrinter::outputMCInst(MCInst &Inst) { in outputMCInst()
272 MCInst Inst; in outputDebugSourceAndStrings() local
278 MCInst Inst; in outputDebugSourceAndStrings() local
290 MCInst Inst; in outputOpExtInstImports() local
301 MCInst Inst; in outputOpMemoryModel() local
350 MCInst Inst; in outputGlobalRequirements() local
358 MCInst Inst; in outputGlobalRequirements() local
410 static void addOpsFromMDNode(MDNode *MDN, MCInst &Inst, in addOpsFromMDNode()
429 MCInst Inst; in outputExecutionModeFromMDNode() local
448 MCInst Inst; in outputExecutionModeFromNumthreadsAttribute() local
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | InstrInfoEmitter.cpp | 127 InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) { in GetOperandInfo()
219 for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) { in CollectOperandInfo() local
253 for (const CodeGenInstruction *Inst : NumberedInstructions) { in initOperandMapData() local
403 for (const CodeGenInstruction *Inst : NumberedInstructions) { in emitOperandTypeMappings() local
506 for (const auto *Inst : NumberedInstructions) { in emitLogicalOperandSizeMappings() local
560 for (const auto &Inst : Insts) { in emitLogicalOperandSizeMappings() local
593 for (const auto *Inst : NumberedInstructions) { in emitLogicalOperandTypeMappings() local
658 for (const auto &Inst : Insts) { in emitLogicalOperandTypeMappings() local
756 for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) { in emitFeatureVerifier() local
806 for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) { in emitFeatureVerifier() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 127 static DecodeStatus DecodeI32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeI32RegisterClass()
137 static DecodeStatus DecodeI64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeI64RegisterClass()
147 static DecodeStatus DecodeF32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeF32RegisterClass()
157 static DecodeStatus DecodeF128RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeF128RegisterClass()
167 static DecodeStatus DecodeV64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeV64RegisterClass()
181 static DecodeStatus DecodeVMRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeVMRegisterClass()
191 static DecodeStatus DecodeVM512RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeVM512RegisterClass()
201 static DecodeStatus DecodeMISCRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeMISCRegisterClass()
419 static DecodeStatus DecodeLoadI32(MCInst &Inst, uint64_t insn, uint64_t Address, in DecodeLoadI32()
424 static DecodeStatus DecodeStoreI32(MCInst &Inst, uint64_t insn, in DecodeStoreI32()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsAnalyzeImmediate.h | 19 struct Inst { struct
22 Inst(unsigned Opc, unsigned ImmOpnd); argument
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| /freebsd/contrib/llvm-project/llvm/lib/FuzzMutate/ |
| H A D | Operations.cpp | 101 auto buildOp = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in selectDescriptor()
110 auto buildOp = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in fnegDescriptor()
118 auto buildOp = [Op](ArrayRef<Value *> Srcs, Instruction *Inst) { in binOpDescriptor()
151 auto buildOp = [CmpOp, Pred](ArrayRef<Value *> Srcs, Instruction *Inst) { in cmpOpDescriptor()
166 auto buildSplitBlock = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in splitBlockDescriptor()
196 auto buildGEP = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in gepDescriptor()
242 auto buildExtract = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in extractValueDescriptor()
301 auto buildInsert = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in insertValueDescriptor()
313 auto buildExtract = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in extractElementDescriptor()
321 auto buildInsert = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in insertElementDescriptor()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/AsmParser/ |
| H A D | LoongArchAsmParser.cpp | 36 struct Inst { struct in __anon571544da0111::LoongArchAsmParser
37 unsigned Opc;
38 LoongArchMCExpr::VariantKind VK;
39 Inst(unsigned Opc, in Inst() argument
580 void addExpr(MCInst &Inst, const MCExpr *Expr) const { in addExpr()
588 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands()
592 void addImmOperands(MCInst &Inst, unsigned N) const { in addImmOperands()
902 void LoongArchAsmParser::emitLoadAddressAbs(MCInst &Inst, SMLoc IDLoc, in emitLoadAddressAbs()
933 void LoongArchAsmParser::emitLoadAddressPcrel(MCInst &Inst, SMLoc IDLoc, in emitLoadAddressPcrel()
952 void LoongArchAsmParser::emitLoadAddressPcrelLarge(MCInst &Inst, SMLoc IDLoc, in emitLoadAddressPcrelLarge()
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