| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCCState.h | 131 void PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeFormalArguments()
139 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
151 void PreAnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResult()
161 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
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| H A D | MipsCCState.cpp | 87 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128()
112 const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) { in PreAnalyzeCallResultForVectorFloat()
181 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128()
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| H A D | MipsCallLowering.cpp | 386 SmallVector<ISD::InputArg, 8> Ins; in lowerFormalArguments() local
556 SmallVector<ISD::InputArg, 8> Ins; in lowerCall() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCCState.cpp | 27 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArguments()
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| H A D | PPCCCState.h | 50 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CallingConvLower.cpp | 85 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
162 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
264 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 447 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeVarArgs()
551 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeRetResult()
569 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
592 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
620 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
809 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
937 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 396 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
413 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
437 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCArguments()
606 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCCallTo()
778 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 269 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
471 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
486 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, in LowerCallArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 327 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
410 auto &Ins = CLI.Ins; in LowerCall() local
585 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCallingConv.h | 51 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | MVETailPredication.cpp | 441 Instruction *Ins = L->getLoopPreheader()->getTerminator(); in TryConvertActiveLaneMask() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 1095 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
1294 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerMemArgument()
1672 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
1998 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
2736 const SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in IsEligibleForTailCallOptimization() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCommonGEP.cpp | 568 std::pair<NodeSymRel::iterator, bool> Ins = EqRel.insert(C); in common() local
597 std::pair<ProjMap::iterator,bool> Ins = PM.insert(std::make_pair(&S, Min)); in common() local
1239 ValueVect Ins; in removeDeadCode() local
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| H A D | HexagonISelLowering.cpp | 351 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult() argument
409 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
794 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
2831 SDValue Ins = insertVectorPred() local
2852 SDValue Ins = insertVectorPred() local
3731 IsEligibleForTailCallOptimization(SDValue Callee,CallingConv::ID CalleeCC,bool IsVarArg,bool IsCalleeStructRet,bool IsCallerStructRet,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,SelectionDAG & DAG) const IsEligibleForTailCallOptimization() argument
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 206 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
301 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins; in LowerCall() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 946 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
1019 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
1149 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
1168 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/TableGen/ |
| H A D | TGParser.h | 134 bool Ins = Vars.insert(std::make_pair(std::string(Name), I)).second; in addVar() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/ |
| H A D | SSAUpdaterImpl.h | 86 SmallVectorImpl<PhiT *> *Ins) : in SSAUpdaterImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 248 argsAreStructReturn(const SmallVectorImpl<ISD::InputArg> &Ins) { in argsAreStructReturn()
431 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerMemArgument()
526 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
885 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult()
920 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
1228 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const { in IsEligibleForTailCallOptimization() argument
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 97 SmallVector<ISD::InputArg, 4> Ins; member
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| H A D | CallingConvLower.h | 266 void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeArguments() argument
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/ |
| H A D | PatternParser.cpp | 344 const DagInit *Ins = Def->getValueAsDag("InOperands"); in parsePatFragImpl() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/ |
| H A D | WebAssemblyAsmParser.cpp | 312 bool pop(StringRef Ins, NestingType NT1, NestingType NT2 = Undefined) { in pop()
326 bool popAndPushWithSameSignature(StringRef Ins, NestingType PopNT, in popAndPushWithSameSignature()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1369 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
1473 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
1647 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
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