1 /******************************************************************************
2 SPDX-License-Identifier: BSD-3-Clause
3
4 Copyright (c) 2001-2020, Intel Corporation
5 All rights reserved.
6
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
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10 1. Redistributions of source code must retain the above copyright notice,
11 this list of conditions and the following disclaimer.
12
13 2. Redistributions in binary form must reproduce the above copyright
14 notice, this list of conditions and the following disclaimer in the
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21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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33 ******************************************************************************/
34
35 #ifndef _IXGBE_OSDEP_H_
36 #define _IXGBE_OSDEP_H_
37
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/endian.h>
41 #include <sys/systm.h>
42 #include <sys/mbuf.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
47 #include <sys/bus.h>
48 #include <machine/bus.h>
49 #include <sys/rman.h>
50 #include <machine/resource.h>
51 #include <vm/vm.h>
52 #include <vm/pmap.h>
53 #include <machine/clock.h>
54 #include <dev/pci/pcivar.h>
55 #include <dev/pci/pcireg.h>
56
57 #define ASSERT(x) if(!(x)) panic("IXGBE: x")
58 #define EWARN(H, W) printf(W)
59
60 enum {
61 IXGBE_ERROR_SOFTWARE,
62 IXGBE_ERROR_POLLING,
63 IXGBE_ERROR_INVALID_STATE,
64 IXGBE_ERROR_UNSUPPORTED,
65 IXGBE_ERROR_ARGUMENT,
66 IXGBE_ERROR_CAUTION,
67 };
68
69 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
70 #define usec_delay(x) DELAY(x)
71 #define msec_delay(x) DELAY(1000*(x))
72
73 #define DBG 0
74 #define MSGOUT(S, A, B) printf(S "\n", A, B)
75 #define DEBUGFUNC(F) DEBUGOUT(F);
76 #if DBG
77 #define DEBUGOUT(S) printf(S "\n")
78 #define DEBUGOUT1(S,A) printf(S "\n",A)
79 #define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
80 #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
81 #define DEBUGOUT4(S,A,B,C,D) printf(S "\n",A,B,C,D)
82 #define DEBUGOUT5(S,A,B,C,D,E) printf(S "\n",A,B,C,D,E)
83 #define DEBUGOUT6(S,A,B,C,D,E,F) printf(S "\n",A,B,C,D,E,F)
84 #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
85 #define ERROR_REPORT1 ERROR_REPORT
86 #define ERROR_REPORT2 ERROR_REPORT
87 #define ERROR_REPORT3 ERROR_REPORT
88 #define ERROR_REPORT(level, format, arg...) do { \
89 switch (level) { \
90 case IXGBE_ERROR_SOFTWARE: \
91 case IXGBE_ERROR_CAUTION: \
92 case IXGBE_ERROR_POLLING: \
93 case IXGBE_ERROR_INVALID_STATE: \
94 case IXGBE_ERROR_UNSUPPORTED: \
95 case IXGBE_ERROR_ARGUMENT: \
96 device_printf(ixgbe_dev_from_hw(hw), format, ## arg); \
97 break; \
98 default: \
99 break; \
100 } \
101 } while (0)
102 #else
103 #define DEBUGOUT(S)
104 #define DEBUGOUT1(S,A)
105 #define DEBUGOUT2(S,A,B)
106 #define DEBUGOUT3(S,A,B,C)
107 #define DEBUGOUT4(S,A,B,C,D)
108 #define DEBUGOUT5(S,A,B,C,D,E)
109 #define DEBUGOUT6(S,A,B,C,D,E,F)
110 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
111
112 #define ERROR_REPORT1(S,A)
113 #define ERROR_REPORT2(S,A,B)
114 #define ERROR_REPORT3(S,A,B,C)
115 #endif
116
117 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
118 #define PCI_COMMAND_REGISTER PCIR_COMMAND
119
120 /* Shared code dropped this define.. */
121 #define IXGBE_INTEL_VENDOR_ID 0x8086
122
123 /* Bunch of defines for shared code bogosity */
124 #define UNREFERENCED_PARAMETER(_p)
125 #define UNREFERENCED_1PARAMETER(_p)
126 #define UNREFERENCED_2PARAMETER(_p, _q)
127 #define UNREFERENCED_3PARAMETER(_p, _q, _r)
128 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
129
130 #define IXGBE_NTOHL(_i) ntohl(_i)
131 #define IXGBE_NTOHS(_i) ntohs(_i)
132
133 /* XXX these need to be revisited */
134 #define IXGBE_CPU_TO_LE16 htole16
135 #define IXGBE_CPU_TO_LE32 htole32
136 #define IXGBE_LE16_TO_CPU le16toh
137 #define IXGBE_LE32_TO_CPU le32toh
138 #define IXGBE_LE64_TO_CPU le64toh
139 #define IXGBE_LE32_TO_CPUS(x) *(x) = le32dec(x)
140 #define IXGBE_CPU_TO_BE16 htobe16
141 #define IXGBE_CPU_TO_BE32 htobe32
142 #define IXGBE_BE32_TO_CPU be32toh
143
144 typedef uint8_t u8;
145 typedef int8_t s8;
146 typedef uint16_t u16;
147 typedef int16_t s16;
148 typedef uint32_t u32;
149 typedef int32_t s32;
150 typedef uint64_t u64;
151 typedef int64_t s64;
152 #ifndef __bool_true_false_are_defined
153 typedef boolean_t bool;
154 #endif
155
156 /* shared code requires this */
157 #define __le16 u16
158 #define __le32 u32
159 #define __le64 u64
160 #define __be16 u16
161 #define __be32 u32
162 #define __be64 u64
163
164 #define le16_to_cpu
165
166 #if defined(__i386__) || defined(__amd64__)
167 static __inline
prefetch(void * x)168 void prefetch(void *x)
169 {
170 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
171 }
172 #else
173 #define prefetch(x)
174 #endif
175
176 /*
177 * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes
178 * non-overlapping regions and 32-byte padding on both src and dst.
179 */
180 static __inline int
ixgbe_bcopy(void * restrict _src,void * restrict _dst,int l)181 ixgbe_bcopy(void *restrict _src, void *restrict _dst, int l)
182 {
183 uint64_t *src = _src;
184 uint64_t *dst = _dst;
185
186 for (; l > 0; l -= 32) {
187 *dst++ = *src++;
188 *dst++ = *src++;
189 *dst++ = *src++;
190 *dst++ = *src++;
191 }
192 return (0);
193 }
194
195 struct ixgbe_osdep
196 {
197 bus_space_tag_t mem_bus_space_tag;
198 bus_space_handle_t mem_bus_space_handle;
199 };
200
201 struct ixgbe_lock
202 {
203 struct mtx mutex;
204 };
205
206 /* These routines need struct ixgbe_hw declared */
207 struct ixgbe_hw;
208 device_t ixgbe_dev_from_hw(struct ixgbe_hw *hw);
209
210 /* These routines are needed by the shared code */
211 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
212 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
213
214 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
215 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
216
217 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
218
219 extern u32 ixgbe_read_reg(struct ixgbe_hw *, u32);
220 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg(a, reg)
221
222 extern void ixgbe_write_reg(struct ixgbe_hw *, u32, u32);
223 #define IXGBE_WRITE_REG(a, reg, val) ixgbe_write_reg(a, reg, val)
224
225 extern u32 ixgbe_read_reg_array(struct ixgbe_hw *, u32, u32);
226 #define IXGBE_READ_REG_ARRAY(a, reg, offset) \
227 ixgbe_read_reg_array(a, reg, offset)
228
229 extern void ixgbe_write_reg_array(struct ixgbe_hw *, u32, u32, u32);
230 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, val) \
231 ixgbe_write_reg_array(a, reg, offset, val)
232
233 void ixgbe_init_lock(struct ixgbe_lock *);
234 void ixgbe_destroy_lock(struct ixgbe_lock *);
235 void ixgbe_acquire_lock(struct ixgbe_lock *);
236 void ixgbe_release_lock(struct ixgbe_lock *);
237
238 static inline void *
ixgbe_calloc(struct ixgbe_hw __unused * hw,size_t count,size_t size)239 ixgbe_calloc(struct ixgbe_hw __unused *hw, size_t count, size_t size)
240 {
241 return (malloc(count * size, M_DEVBUF, M_ZERO | M_NOWAIT));
242 }
243
244 static inline void *
ixgbe_malloc(struct ixgbe_hw __unused * hw,size_t size)245 ixgbe_malloc(struct ixgbe_hw __unused *hw, size_t size)
246 {
247 return (malloc(size, M_DEVBUF, M_ZERO | M_NOWAIT));
248 }
249
250 static inline void
ixgbe_free(struct ixgbe_hw __unused * hw,void * addr)251 ixgbe_free(struct ixgbe_hw __unused *hw, void *addr)
252 {
253 free(addr, M_DEVBUF);
254 }
255
256 #endif /* _IXGBE_OSDEP_H_ */
257