1 /******************************************************************************* 2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved. 3 * 4 *Redistribution and use in source and binary forms, with or without modification, are permitted provided 5 *that the following conditions are met: 6 *1. Redistributions of source code must retain the above copyright notice, this list of conditions and the 7 *following disclaimer. 8 *2. Redistributions in binary form must reproduce the above copyright notice, 9 *this list of conditions and the following disclaimer in the documentation and/or other materials provided 10 *with the distribution. 11 * 12 *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 13 *WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 14 *FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 15 *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 16 *NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 17 *BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 19 *SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 20 * 21 * 22 *******************************************************************************/ 23 /***************************************************************************** 24 * 25 * tdioctl.h 26 * 27 * Abstract: This module contains data structure definition used 28 * by the Transport Dependent (TD) Layer IOCTL. 29 * 30 * 31 * Notes: 32 * 33 * 34 ** MODIFICATION HISTORY ****************************************************** 35 * 36 * NAME DATE DESCRIPTION 37 * ---- ---- ----------- 38 * IWN 12/11/02 Initial creation. 39 * 40 * 41 *****************************************************************************/ 42 43 44 #ifndef TD_IOCTL_H 45 46 #define TD_IOCTL_H 47 48 //#include "global.h" 49 50 /* 51 * PMC-Sierra IOCTL signature 52 */ 53 #define PMC_SIERRA_SIGNATURE 0x1234 54 #define PMC_SIERRA_IOCTL_SIGNATURE "PMC-STRG" 55 56 /* 57 * Major function code of IOCTL functions, common to target and initiator. 58 */ 59 #define IOCTL_MJ_CARD_PARAMETER 0x01 60 #define IOCTL_MJ_FW_CONTROL 0x02 61 #define IOCTL_MJ_NVMD_GET 0x03 62 #define IOCTL_MJ_NVMD_SET 0x04 63 #define IOCTL_MJ_GET_EVENT_LOG1 0x05 64 #define IOCTL_MJ_GET_EVENT_LOG2 0x06 65 #define IOCTL_MJ_GET_CORE_DUMP 0x07 66 #define IOCTL_MJ_LL_TRACING 0x08 67 #define IOCTL_MJ_FW_PROFILE 0x09 68 #define IOCTL_MJ_MNID 0x0A 69 #define IOCTL_MJ_ENCRYPTION_CTL 0x0B 70 71 #define IOCTL_MJ_FW_INFO 0x0C 72 73 #define IOCTL_MJ_LL_API_TEST 0x11 74 #define IOCTL_MJ_CHECK_DPMC_EVENT 0x16 75 #define IOCTL_MJ_GET_FW_REV 0x1A 76 #define IOCTL_MJ_GET_DEVICE_INFO 0x1B 77 #define IOCTL_MJ_GET_IO_ERROR_STATISTIC 0x1C 78 #define IOCTL_MJ_GET_IO_EVENT_STATISTIC 0x1D 79 #define IOCTL_MJ_GET_FORENSIC_DATA 0x1E 80 #define IOCTL_MJ_GET_DEVICE_LIST 0x1F 81 #define IOCTL_MJ_SMP_REQUEST 0x6D 82 #define IOCTL_MJ_GET_DEVICE_LUN 0x7A1 83 #define IOCTL_MJ_PHY_GENERAL_STATUS 0x7A6 84 #define IOCTL_MJ_PHY_DETAILS 0x7A7 85 #define IOCTL_MJ_SEND_BIST 0x20 86 #define IOCTL_MJ_CHECK_FATAL_ERROR 0x70 87 #define IOCTL_MJ_FATAL_ERROR_DUMP_COMPLETE 0x71 88 #define IOCTL_MJ_GPIO 0x41 89 #define IOCTL_MJ_SGPIO 0x42 90 #define IOCTL_MJ_SEND_TMF 0x6E 91 #define IOCTL_MJ_FATAL_ERROR_SOFT_RESET_TRIG 0x72 92 #define IOCTL_MJ_FATAL_ERR_CHK_RET_FALSE 0x76 93 #define IOCTL_MJ_FATAL_ERR_CHK_SEND_FALSE 0x76 94 #define IOCTL_MJ_FATAL_ERR_CHK_SEND_TRUE 0x77 95 96 97 /* 98 * Major function code of IOCTL functions, specific to initiator. 99 */ 100 #define IOCTL_MJ_INI_ISCSI_DISCOVERY 0x21 101 #define IOCTL_MJ_INI_SESSION_CONTROL 0x22 102 #define IOCTL_MJ_INI_SNIA_IMA 0x23 103 #define IOCTL_MJ_INI_SCSI 0x24 104 #define IOCTL_MJ_INI_WMI 0x25 105 #define IOCTL_MJ_INI_DRIVER_EVENT_LOG 0x26 106 #define IOCTL_MJ_INI_PERSISTENT_BINDING 0x27 107 #define IOCTL_MJ_INI_DRIVER_IDENTIFY 0x28 108 109 /* temp */ 110 #define IOCTL_MJ_PORT_STOP 0x29 111 #define IOCTL_MJ_PORT_START 0x30 112 113 /* SPCv controller configuration page commands */ 114 #define IOCTL_MJ_MODE_CTL_PAGE 0x40 115 116 #define IOCTL_MJ_SET_OR_GET_REGISTER 0x41 117 118 #define IOCTL_MJ_GET_PHY_PROFILE 0x44 119 #define IOCTL_MJ_SET_PHY_PROFILE 0x43 120 121 #define IOCTL_MJ_GET_DRIVER_VERSION 0x101 122 123 #define IOCTL_MN_PHY_PROFILE_COUNTERS 0x01 124 #define IOCTL_MN_PHY_PROFILE_COUNTERS_CLR 0x02 125 #define IOCTL_MN_PHY_PROFILE_BW_COUNTERS 0x03 126 #define IOCTL_MN_PHY_PROFILE_ANALOG_SETTINGS 0x04 127 128 /* 129 * Minor functions for Card parameter IOCTL functions. 130 */ 131 #define IOCTL_MN_CARD_GET_VPD_INFO 0x01 132 #define IOCTL_MN_CARD_GET_PORTSTART_INFO 0x02 133 #define IOCTL_MN_CARD_GET_INTERRUPT_CONFIG 0x03 134 #define IOCTL_MN_CARD_GET_PHY_ANALOGSETTING 0x04 135 #define IOCTL_MN_CARD_GET_TIMER_CONFIG 0x05 136 #define IOCTL_MN_CARD_GET_TYPE_FATAL_DUMP 0x06 137 138 /* 139 * Minor functions for FW control IOCTL functions. 140 */ 141 142 /* Send FW data requests. 143 */ 144 #define IOCTL_MN_FW_DOWNLOAD_DATA 0x01 145 146 /* Send the request for burning the new firmware. 147 */ 148 #define IOCTL_MN_FW_DOWNLOAD_BURN 0x02 149 150 /* Poll for the flash burn phases. Sequences of poll function calls are 151 * needed following the IOCTL_MN_FW_DOWNLOAD_BURN, IOCTL_MN_FW_BURN_OSPD 152 * and IOCTL_MN_FW_ROLL_BACK_FW functions. 153 */ 154 #define IOCTL_MN_FW_BURN_POLL 0x03 155 156 /* Instruct the FW to roll back FW to prior revision. 157 */ 158 #define IOCTL_MN_FW_ROLL_BACK_FW 0x04 159 160 /* Instruct the FW to return the current firmware revision number. 161 */ 162 #define IOCTL_MN_FW_VERSION 0x05 163 164 /* Retrieve the maximum size of the OS Persistent Data stored on the card. 165 */ 166 #define IOCTL_MN_FW_GET_OSPD_SIZE 0x06 167 168 /* Retrieve the OS Persistent Data from the card. 169 */ 170 #define IOCTL_MN_FW_GET_OSPD 0x07 171 172 /* Send a new OS Persistent Data to the card and burn in flash. 173 */ 174 #define IOCTL_MN_FW_BURN_OSPD 0x08 175 176 /* Retrieve the trace buffer from the card FW. Only available on the debug 177 * version of the FW. 178 */ 179 #define IOCTL_MN_FW_GET_TRACE_BUFFER 0x0f 180 181 #define IOCTL_MN_NVMD_GET_CONFIG 0x0A 182 #define IOCTL_MN_NVMD_SET_CONFIG 0x0B 183 184 #define IOCTL_MN_FW_GET_CORE_DUMP_AAP1 0x0C 185 #define IOCTL_MN_FW_GET_CORE_DUMP_IOP 0x0D 186 #define IOCTL_MN_FW_GET_CORE_DUMP_FLASH_AAP1 0x12 187 #define IOCTL_MN_FW_GET_CORE_DUMP_FLASH_IOP 0x13 188 189 #define IOCTL_MN_LL_RESET_TRACE_INDEX 0x0e 190 #define IOCTL_MN_LL_GET_TRACE_BUFFER_INFO 0x0f 191 #define IOCTL_MN_LL_GET_TRACE_BUFFER 0x10 192 193 #define IOCTL_MN_ENCRYPTION_GET_INFO 0x13 194 #define IOCTL_MN_ENCRYPTION_SET_MODE 0x14 195 #define IOCTL_MN_ENCRYPTION_KEK_ADD 0x15 196 #define IOCTL_MN_ENCRYPTION_DEK_ADD 0x16 197 #define IOCTL_MN_ENCRYPTION_DEK_INVALID 0x17 198 #define IOCTL_MN_ENCRYPTION_KEK_NVRAM 0x18 199 #define IOCTL_MN_ENCRYPTION_DEK_ASSIGN 0x19 200 #define IOCTL_MN_ENCRYPTION_LUN_QUERY 0x1A 201 #define IOCTL_MN_ENCRYPTION_KEK_LOAD_NVRAM 0x1B 202 #define IOCTL_MN_ENCRYPTION_ERROR_QUERY 0x1C 203 #define IOCTL_MN_ENCRYPTION_DEK_TABLE_INIT 0x1D 204 #define IOCTL_MN_ENCRYPT_LUN_VERIFY 0x1E 205 #define IOCTL_MN_ENCRYPT_OPERATOR_MGMT 0x1F 206 #define IOCTL_MN_ENCRYPT_SET_DEK_CONFIG_PAGE 0x21 207 #define IOCTL_MN_ENCRYPT_SET_CONTROL_PAGE 0x22 208 #define IOCTL_MN_ENCRYPT_SET_OPERATOR_CMD 0x23 209 #define IOCTL_MN_ENCRYPT_TEST_EXECUTE 0x24 210 #define IOCTL_MN_ENCRYPT_SET_HMAC_CONFIG_PAGE 0x25 211 #define IOCTL_MN_ENCRYPT_GET_OPERATOR_CMD 0x26 212 #define IOCTL_MN_ENCRYPT_RESCAN 0x27 213 #ifdef SOFT_RESET_TEST 214 #define IOCTL_MN_SOFT_RESET 0x28 215 #endif 216 /* SPCv configuration pages */ 217 #define IOCTL_MN_MODE_SENSE 0x30 218 #define IOCTL_MN_MODE_SELECT 0x31 219 220 #define IOCTL_MN_TISA_TEST_ENCRYPT_DEK_DUMP 0x51 221 222 #define IOCTL_MN_FW_GET_EVENT_FLASH_LOG1 0x5A 223 #define IOCTL_MN_FW_GET_EVENT_FLASH_LOG2 0x6A 224 #define IOCTL_MN_GET_EVENT_LOG1 0x5B 225 #define IOCTL_MN_GET_EVENT_LOG2 0x6B 226 227 #define IOCTL_MN_GPIO_PINSETUP 0x01 228 #define IOCTL_MN_GPIO_EVENTSETUP 0x02 229 #define IOCTL_MN_GPIO_READ 0x03 230 #define IOCTL_MN_GPIO_WRITE 0x04 231 232 #define IOCTL_MN_TMF_DEVICE_RESET 0x6F 233 #define IOCTL_MN_TMF_LUN_RESET 0x70 234 typedef struct tdFWControl 235 { 236 bit32 retcode; /* ret code (status) = (bit32)oscmCtrlEvnt_e */ 237 bit32 phase; /* ret code phase = (bit32)agcmCtrlFwPhase_e */ 238 bit32 phaseCmplt; /* percent complete for the current update phase */ 239 bit32 version; /* Hex encoded firmware version number */ 240 bit32 offset; /* Used for downloading firmware */ 241 bit32 len; /* len of buffer */ 242 bit32 size; /* Used in OS VPD and Trace get size operations. */ 243 bit32 reserved; /* padding required for 64 bit alignment */ 244 bit8 buffer[1]; /* Start of buffer */ 245 } tdFWControl_t; 246 247 248 typedef struct tdFWControlEx 249 { 250 tdFWControl_t *tdFWControl; 251 bit8 *buffer; // keep buffer pointer to be freed when the responce comes 252 bit8 *virtAddr; /* keep virtual address of the data */ 253 bit8 *usrAddr; /* keep virtual address of the user data */ 254 bit32 len; /* len of buffer */ 255 void *payload; /* pointer to IOCTL Payload */ 256 bit8 inProgress; /* if 1 - the IOCTL request is in progress */ 257 void *param1; 258 void *param2; 259 void *param3; 260 } tdFWControlEx_t; 261 262 /************************************************************/ 263 //This flag and datastructure are specific for fw profiling, Now defined as 264 // compiler flag 265 //#define SPC_ENABLE_PROFILE 266 267 #ifdef SPC_ENABLE_PROFILE 268 typedef struct tdFWProfile 269 { 270 bit32 status; 271 bit32 tcid; 272 bit32 processor; /* processor name "iop/aap1" */ 273 bit32 cmd; /* cmd to fw */ 274 bit32 len; /* len of buffer */ 275 bit32 codeStartAdd; 276 bit32 codeEndAdd; 277 bit32 reserved; /* padding required for 64 bit alignment */ 278 bit8 buffer[1]; /* Start of buffer */ 279 } tdFWProfile_t; 280 281 /************************************************/ 282 /**Definations for FW profile*/ 283 #define FW_PROFILE_PROCESSOR_ID_IOP 0x00 284 #define FW_PROFILE_PROCESSOR_ID_AAP1 0x02 285 /* definitions for sub operation */ 286 #define START_TIMER_PROFILE 0x01 287 #define START_CODE_PROFILE 0x02 288 #define STOP_TIMER_PROFILE 0x81 289 #define STOP_CODE_PROFILE 0x82 290 /************************************************/ 291 292 typedef struct tdFWProfileEx 293 { 294 tdFWProfile_t *tdFWProfile; 295 bit8 *buffer; // keep buffer pointer to be freed when the responce comes 296 bit8 *virtAddr; /* keep virtual address of the data */ 297 bit8 *usrAddr; /* keep virtual address of the user data */ 298 bit32 len; /* len of buffer */ 299 void *payload; /* pointer to IOCTL Payload */ 300 bit8 inProgress; /* if 1 - the IOCTL request is in progress */ 301 void *param1; 302 void *param2; 303 void *param3; 304 } tdFWProfileEx_t; 305 #endif 306 /************************************************************/ 307 typedef struct tdVPDControl 308 { 309 bit32 retcode; /* ret code (status) */ 310 bit32 phase; /* ret code phase */ 311 bit32 phaseCmplt; /* percent complete for the current update phase */ 312 bit32 version; /* Hex encoded firmware version number */ 313 bit32 offset; /* Used for downloading firmware */ 314 bit32 len; /* len of buffer */ 315 bit32 size; /* Used in OS VPD and Trace get size operations. */ 316 bit8 deviceID; /* padding required for 64 bit alignment */ 317 bit8 reserved1; 318 bit16 reserved2; 319 bit32 signature; 320 bit8 buffer[1]; /* Start of buffer */ 321 } tdVPDControl_t; 322 323 typedef struct tdDeviceInfoIOCTL_s 324 { 325 bit8 deviceType; // TD_SATA_DEVICE or TD_SAS_DEVICE 326 bit8 linkRate; // 0x08: 1.5 Gbit/s; 0x09: 3.0; 0x0A: 6.0 Gbit/s. 327 bit8 phyId; 328 bit8 reserved; 329 bit32 sasAddressHi; // SAS address high 330 bit32 sasAddressLo; // SAS address low 331 bit32 up_sasAddressHi; // upstream SAS address high 332 bit32 up_sasAddressLo; // upstream SAS address low 333 bit32 ishost; 334 bit32 isEncryption; // is encryption enabled 335 bit32 isDIF; // is DIF enabled 336 unsigned long DeviceHandle; 337 bit32 host_num; 338 bit32 channel; 339 bit32 id; 340 bit32 lun; 341 }tdDeviceInfoIOCTL_t; 342 343 /* Payload of IOCTL dump device list at OS layer */ 344 typedef struct tdDeviceInfoPayload_s 345 { 346 bit32 PathId; 347 bit32 TargetId; 348 bit32 Lun; 349 bit32 Reserved; /* Had better aligned to 64-bit. */ 350 351 /* output */ 352 tdDeviceInfoIOCTL_t devInfo; 353 }tdDeviceInfoPayload_t; 354 355 typedef struct tdDeviceListPayload_s 356 { 357 bit32 realDeviceCount;// the real device out in the array, returned by driver 358 bit32 deviceLength; // the length of tdDeviceInfoIOCTL_t array 359 bit8 pDeviceInfo[1]; // point to tdDeviceInfoIOCTL_t array 360 }tdDeviceListPayload_t; 361 362 // Payload of IO error and event statistic IOCTL. 363 typedef struct tdIoErrorEventStatisticIOCTL_s 364 { 365 bit32 agOSSA_IO_COMPLETED_ERROR_SCSI_STATUS; 366 bit32 agOSSA_IO_ABORTED; 367 bit32 agOSSA_IO_OVERFLOW; 368 bit32 agOSSA_IO_UNDERFLOW; 369 bit32 agOSSA_IO_FAILED; 370 bit32 agOSSA_IO_ABORT_RESET; 371 bit32 agOSSA_IO_NOT_VALID; 372 bit32 agOSSA_IO_NO_DEVICE; 373 bit32 agOSSA_IO_ILLEGAL_PARAMETER; 374 bit32 agOSSA_IO_LINK_FAILURE; 375 bit32 agOSSA_IO_PROG_ERROR; 376 bit32 agOSSA_IO_DIF_IN_ERROR; 377 bit32 agOSSA_IO_DIF_OUT_ERROR; 378 bit32 agOSSA_IO_ERROR_HW_TIMEOUT; 379 bit32 agOSSA_IO_XFER_ERROR_BREAK; 380 bit32 agOSSA_IO_XFER_ERROR_PHY_NOT_READY; 381 bit32 agOSSA_IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED; 382 bit32 agOSSA_IO_OPEN_CNX_ERROR_ZONE_VIOLATION; 383 bit32 agOSSA_IO_OPEN_CNX_ERROR_BREAK; 384 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS; 385 bit32 agOSSA_IO_OPEN_CNX_ERROR_BAD_DESTINATION; 386 bit32 agOSSA_IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED; 387 bit32 agOSSA_IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY; 388 bit32 agOSSA_IO_OPEN_CNX_ERROR_WRONG_DESTINATION; 389 bit32 agOSSA_IO_OPEN_CNX_ERROR_UNKNOWN_ERROR; 390 bit32 agOSSA_IO_XFER_ERROR_NAK_RECEIVED; 391 bit32 agOSSA_IO_XFER_ERROR_ACK_NAK_TIMEOUT; 392 bit32 agOSSA_IO_XFER_ERROR_PEER_ABORTED; 393 bit32 agOSSA_IO_XFER_ERROR_RX_FRAME; 394 bit32 agOSSA_IO_XFER_ERROR_DMA; 395 bit32 agOSSA_IO_XFER_ERROR_CREDIT_TIMEOUT; 396 bit32 agOSSA_IO_XFER_ERROR_SATA_LINK_TIMEOUT; 397 bit32 agOSSA_IO_XFER_ERROR_SATA; 398 bit32 agOSSA_IO_XFER_ERROR_ABORTED_DUE_TO_SRST; 399 bit32 agOSSA_IO_XFER_ERROR_REJECTED_NCQ_MODE; 400 bit32 agOSSA_IO_XFER_ERROR_ABORTED_NCQ_MODE; 401 bit32 agOSSA_IO_XFER_OPEN_RETRY_TIMEOUT; 402 bit32 agOSSA_IO_XFER_SMP_RESP_CONNECTION_ERROR; 403 bit32 agOSSA_IO_XFER_ERROR_UNEXPECTED_PHASE; 404 bit32 agOSSA_IO_XFER_ERROR_XFER_RDY_OVERRUN; 405 bit32 agOSSA_IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED; 406 bit32 agOSSA_IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT; 407 bit32 agOSSA_IO_XFER_ERROR_CMD_ISSUE_BREAK_BEFORE_ACK_NAK; 408 bit32 agOSSA_IO_XFER_ERROR_CMD_ISSUE_PHY_DOWN_BEFORE_ACK_NAK; 409 bit32 agOSSA_IO_XFER_ERROR_OFFSET_MISMATCH; 410 bit32 agOSSA_IO_XFER_ERROR_XFER_ZERO_DATA_LEN; 411 bit32 agOSSA_IO_XFER_CMD_FRAME_ISSUED; 412 bit32 agOSSA_IO_ERROR_INTERNAL_SMP_RESOURCE; 413 bit32 agOSSA_IO_PORT_IN_RESET; 414 bit32 agOSSA_IO_DS_NON_OPERATIONAL; 415 bit32 agOSSA_IO_DS_IN_RECOVERY; 416 bit32 agOSSA_IO_TM_TAG_NOT_FOUND; 417 bit32 agOSSA_IO_XFER_PIO_SETUP_ERROR; 418 bit32 agOSSA_IO_SSP_EXT_IU_ZERO_LEN_ERROR; 419 bit32 agOSSA_IO_DS_IN_ERROR; 420 bit32 agOSSA_IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY; 421 bit32 agOSSA_IO_ABORT_IN_PROGRESS; 422 bit32 agOSSA_IO_ABORT_DELAYED; 423 bit32 agOSSA_IO_INVALID_LENGTH; 424 bit32 agOSSA_IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY_ALT; 425 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED; 426 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO; 427 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST; 428 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE; 429 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED; 430 bit32 agOSSA_IO_DS_INVALID; 431 bit32 agOSSA_IO_XFER_READ_COMPL_ERR; 432 bit32 agOSSA_IO_XFER_ERR_LAST_PIO_DATAIN_CRC_ERR; 433 bit32 agOSSA_IO_XFR_ERROR_INTERNAL_CRC_ERROR; 434 bit32 agOSSA_MPI_IO_RQE_BUSY_FULL; 435 bit32 agOSSA_MPI_ERR_IO_RESOURCE_UNAVAILABLE; 436 bit32 agOSSA_MPI_ERR_ATAPI_DEVICE_BUSY; 437 bit32 agOSSA_IO_XFR_ERROR_DEK_KEY_CACHE_MISS; 438 bit32 agOSSA_IO_XFR_ERROR_DEK_KEY_TAG_MISMATCH; 439 bit32 agOSSA_IO_XFR_ERROR_CIPHER_MODE_INVALID; 440 bit32 agOSSA_IO_XFR_ERROR_DEK_IV_MISMATCH; 441 bit32 agOSSA_IO_XFR_ERROR_DEK_RAM_INTERFACE_ERROR; 442 bit32 agOSSA_IO_XFR_ERROR_INTERNAL_RAM; 443 bit32 agOSSA_IO_XFR_ERROR_DIF_MISMATCH; 444 bit32 agOSSA_IO_XFR_ERROR_DIF_APPLICATION_TAG_MISMATCH; 445 bit32 agOSSA_IO_XFR_ERROR_DIF_REFERENCE_TAG_MISMATCH; 446 bit32 agOSSA_IO_XFR_ERROR_DIF_CRC_MISMATCH; 447 bit32 agOSSA_IO_XFR_ERROR_INVALID_SSP_RSP_FRAME; 448 bit32 agOSSA_IO_XFER_ERR_EOB_DATA_OVERRUN; 449 bit32 agOSSA_IO_XFR_ERROR_DEK_INDEX_OUT_OF_BOUNDS; 450 bit32 agOSSA_IO_OPEN_CNX_ERROR_OPEN_PREEMPTED; 451 bit32 agOSSA_IO_XFR_ERROR_DEK_ILLEGAL_TABLE; 452 bit32 agOSSA_IO_XFER_ERROR_DIF_INTERNAL_ERROR; 453 bit32 agOSSA_MPI_ERR_OFFLOAD_DIF_OR_ENC_NOT_ENABLED; 454 bit32 agOSSA_IO_UNKNOWN_ERROR; 455 456 } tdIoErrorEventStatisticIOCTL_t; 457 458 /* 459 01: soft error 460 02: not ready 461 03: medium error 462 04: hardware error 463 05: illegal request 464 06: unit attention 465 0b: abort command 466 */ 467 typedef struct tdSenseKeyCount_s{ 468 bit32 SoftError; 469 bit32 MediumNotReady; 470 bit32 MediumError; 471 bit32 HardwareError; 472 bit32 IllegalRequest; 473 bit32 UnitAttention; 474 bit32 AbortCommand; 475 bit32 OtherKeyType; 476 }tdSenseKeyCount_t; 477 478 /* 479 Code Status Command completed Service response 480 00h GOOD Yes COMMAND COMPLETE 481 02h CHECK CONDITION Yes COMMAND COMPLETE 482 04h CONDITION MET Yes COMMAND COMPLETE 483 08h BUSY Yes COMMAND COMPLETE 484 10h Obsolete 485 14h Obsolete 486 18h RESERVATION CONFLICT Yes COMMAND COMPLETE 487 22h Obsolete 488 28h TASK SET FULL Yes COMMAND COMPLETE 489 30h ACA ACTIVE Yes COMMAND COMPLETE 490 40h TASK ABORTED Yes COMMAND COMPLETE 491 */ 492 typedef struct tdSCSIStatusCount_s{ 493 bit32 GoodStatus; 494 bit32 CheckCondition; 495 bit32 ConditionMet; 496 bit32 BusyStatus; 497 bit32 ResvConflict; 498 bit32 TaskSetFull; 499 bit32 AcaActive; 500 bit32 TaskAborted; 501 bit32 ObsoleteStatus; 502 }tdSCSIStatusCount_t; 503 504 /* Payload of Io Error Statistic IOCTL. */ 505 typedef struct tdIoErrorStatisticPayload_s 506 { 507 bit32 flag; 508 bit32 Reserved; /* Had better aligned to 64-bit. */ 509 510 /* output */ 511 tdIoErrorEventStatisticIOCTL_t IoError; 512 tdSCSIStatusCount_t ScsiStatusCounter; 513 tdSenseKeyCount_t SenseKeyCounter; 514 } tdIoErrorStatisticPayload_t; 515 516 /* Payload of Io Error Statistic IOCTL. */ 517 typedef struct tdIoEventStatisticPayload_s 518 { 519 bit32 flag; 520 bit32 Reserved; /* Had better aligned to 64-bit. */ 521 522 /* output */ 523 tdIoErrorEventStatisticIOCTL_t IoEvent; 524 } tdIoEventStatisticPayload_t; 525 526 /* Payload of Register IOCTL. */ 527 typedef struct tdRegisterPayload_s 528 { 529 bit32 flag; 530 bit32 busNum; 531 bit32 RegAddr; /* Register address */ 532 bit32 RegValue; /* Register value */ 533 534 } tdRegisterPayload_t; 535 536 537 #define FORENSIC_DATA_TYPE_GSM_SPACE 1 538 #define FORENSIC_DATA_TYPE_QUEUE 2 539 #define FORENSIC_DATA_TYPE_FATAL 3 540 #define FORENSIC_DATA_TYPE_NON_FATAL 4 541 #define FORENSIC_DATA_TYPE_IB_QUEUE 5 542 #define FORENSIC_DATA_TYPE_OB_QUEUE 6 543 #define FORENSIC_DATA_TYPE_CHECK_FATAL 0x70 544 545 #define FORENSIC_Q_TYPE_INBOUND 1 546 #define FORENSIC_Q_TYPE_OUTBOUND 2 547 548 /* get forensic data IOCTL payload */ 549 typedef struct tdForensicDataPayload_s 550 { 551 bit32 DataType; 552 union 553 { 554 struct 555 { 556 bit32 directLen; 557 bit32 directOffset; 558 bit32 readLen; 559 bit8 directData[1]; 560 } gsmBuffer; 561 562 struct 563 { 564 bit16 queueType; 565 bit16 queueIndex; 566 bit32 directLen; 567 bit8 directData[1]; 568 } queueBuffer; 569 570 struct 571 { 572 bit32 directLen; 573 bit32 directOffset; 574 bit32 readLen; 575 bit8 directData[1]; 576 } dataBuffer; 577 }; 578 }tdForensicDataPayload_t; 579 580 typedef struct tdBistPayload_s 581 { 582 bit32 testType; 583 bit32 testLength; 584 bit32 testData[29]; 585 }tdBistPayload_t; 586 587 typedef struct _TSTMTID_CARD_LOCATION_INFO 588 { 589 bit32 CardNo; 590 bit32 Bus; 591 bit32 Slot; 592 bit32 Device; 593 bit32 Function; 594 bit32 IOLower; 595 bit32 IO_Upper; 596 bit32 VidDid; 597 bit32 PhyMem; 598 bit32 Flag; 599 600 } TSTMTID_CARD_LOCATION_INFO; 601 602 typedef struct _TSTMTID_TRACE_BUFFER_INFO 603 { 604 bit32 CardNo; 605 bit32 TraceCompiled; 606 bit32 BufferSize; 607 bit32 CurrentIndex; 608 bit32 TraceWrap; 609 bit32 CurrentTraceIndexWrapCount; 610 bit32 TraceMask; 611 bit32 Flag; 612 613 } TSTMTID_TRACE_BUFFER_INFO; 614 615 #define FetchBufferSIZE 32 616 #define LowFence32Bits 0xFCFD1234 617 #define HighFence32Bits 0x5678ABDC 618 619 typedef struct _TSTMTID_TRACE_BUFFER_FETCH 620 { 621 bit32 CardNo; 622 bit32 BufferOffsetBegin; 623 bit32 LowFence; 624 bit8 Data[FetchBufferSIZE]; 625 bit32 HighFence; 626 bit32 Flag; 627 628 } TSTMTID_TRACE_BUFFER_FETCH; 629 630 631 typedef struct _TSTMTID_TRACE_BUFFER_RESET 632 { 633 bit32 CardNo; 634 bit32 Reset; 635 bit32 TraceMask; 636 bit32 Flag; 637 638 } TSTMTID_TRACE_BUFFER_RESET; 639 640 641 642 typedef struct tdPhyCount_s{ 643 bit32 Phy; 644 bit32 BW_tx; 645 bit32 BW_rx; 646 bit32 InvalidDword; 647 bit32 runningDisparityError; 648 bit32 codeViolation; 649 bit32 LossOfSyncDW; 650 bit32 phyResetProblem; 651 bit32 inboundCRCError; 652 }tdPhyCount_t; 653 654 655 typedef struct _PHY_GENERAL_STATE 656 { 657 bit32 Dword0; 658 bit32 Dword1; 659 660 }GetPhyGenState_t; 661 typedef struct agsaPhyGeneralState_s 662 { 663 GetPhyGenState_t PhyGenData[16]; 664 bit32 Reserved1; 665 bit32 Reserved2; 666 } agsaPhyGeneralState_t; 667 668 typedef struct _PHY_DETAILS_ 669 { 670 bit8 sasAddressLo[4]; 671 bit8 sasAddressHi[4]; 672 bit8 attached_sasAddressLo[4]; 673 bit8 attached_sasAddressHi[4]; 674 bit8 attached_phy; 675 bit8 attached_dev_type ; 676 }PhyDetails_t; 677 678 enum SAS_SATA_DEVICE_TYPE { 679 SAS_PHY_NO_DEVICE , 680 SAS_PHY_END_DEVICE, 681 SAS_PHY_EXPANDER_DEVICE, 682 SAS_PHY_SATA_DEVICE = 0x11, 683 }; 684 #define PHY_SETTINGS_LEN 1024 685 686 #endif /* TD_IOCTL_H */ 687