1 /*
2 * This file and its contents are supplied under the terms of the
3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 * You may only use this file in accordance with the terms of version
5 * 1.0 of the CDDL.
6 *
7 * A full copy of the text of the CDDL should have accompanied this
8 * source. A copy of the CDDL is also available via the Internet at
9 * http://www.illumos.org/license/CDDL.
10 */
11
12 /*
13 * Copyright 2024 Oxide Computer Company
14 */
15
16 /*
17 * Implementation of the various igc functionality that is required by the core
18 * code.
19 */
20
21 #include "igc.h"
22
23 /*
24 * Set to 1 if you want the igc core logic actually written out. Otherwise this
25 * serves as a DTrace point.
26 */
27 uint32_t igc_core_debug = 0;
28
29 void
igc_core_log(struct igc_hw * hw,const char * fmt,...)30 igc_core_log(struct igc_hw *hw, const char *fmt, ...)
31 {
32 igc_t *igc = hw->back;
33
34 if (igc_core_debug != 0) {
35 va_list ap;
36
37 va_start(ap, fmt);
38 vdev_err(igc->igc_dip, CE_WARN, fmt, ap);
39 va_end(ap);
40 }
41 }
42
43 uint32_t
IGC_READ_REG(struct igc_hw * hw,uint32_t reg)44 IGC_READ_REG(struct igc_hw *hw, uint32_t reg)
45 {
46 igc_t *igc = hw->back;
47
48 return (igc_read32(igc, reg));
49 }
50
51 void
IGC_WRITE_REG(struct igc_hw * hw,uint32_t reg,uint32_t val)52 IGC_WRITE_REG(struct igc_hw *hw, uint32_t reg, uint32_t val)
53 {
54 igc_t *igc = hw->back;
55
56 igc_write32(igc, reg, val);
57 }
58
59 void
IGC_WRITE_REG_ARRAY(struct igc_hw * hw,uint32_t reg,uint32_t offset,uint32_t val)60 IGC_WRITE_REG_ARRAY(struct igc_hw *hw, uint32_t reg, uint32_t offset,
61 uint32_t val)
62 {
63 igc_t *igc = hw->back;
64
65 ASSERT3U(reg, <, igc->igc_regs_size);
66 ASSERT3U(offset + reg, <=, igc->igc_regs_size);
67 igc_write32(igc, reg + offset, val);
68 }
69