1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2024, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _ICE_FLEX_TYPE_H_ 33 #define _ICE_FLEX_TYPE_H_ 34 35 #define ICE_FV_OFFSET_INVAL 0x1FF 36 37 #pragma pack(1) 38 /* Extraction Sequence (Field Vector) Table */ 39 struct ice_fv_word { 40 u8 prot_id; 41 u16 off; /* Offset within the protocol header */ 42 u8 resvrd; 43 }; 44 45 #pragma pack() 46 47 #define ICE_MAX_NUM_PROFILES 256 48 49 #define ICE_MAX_FV_WORDS 48 50 struct ice_fv { 51 struct ice_fv_word ew[ICE_MAX_FV_WORDS]; 52 }; 53 54 /* Packet Type (PTYPE) values */ 55 #define ICE_PTYPE_MAC_PAY 1 56 #define ICE_PTYPE_IPV4FRAG_PAY 22 57 #define ICE_PTYPE_IPV4_PAY 23 58 #define ICE_PTYPE_IPV4_UDP_PAY 24 59 #define ICE_PTYPE_IPV4_TCP_PAY 26 60 #define ICE_PTYPE_IPV4_SCTP_PAY 27 61 #define ICE_PTYPE_IPV4_ICMP_PAY 28 62 #define ICE_PTYPE_IPV6FRAG_PAY 88 63 #define ICE_PTYPE_IPV6_PAY 89 64 #define ICE_PTYPE_IPV6_UDP_PAY 90 65 #define ICE_PTYPE_IPV6_TCP_PAY 92 66 #define ICE_PTYPE_IPV6_SCTP_PAY 93 67 #define ICE_PTYPE_IPV6_ICMP_PAY 94 68 69 struct ice_meta_sect { 70 struct ice_pkg_ver ver; 71 #define ICE_META_SECT_NAME_SIZE 28 72 char name[ICE_META_SECT_NAME_SIZE]; 73 __le32 track_id; 74 }; 75 76 /* Packet Type Groups (PTG) - Inner Most fields (IM) */ 77 #define ICE_PTG_IM_IPV4_TCP 16 78 #define ICE_PTG_IM_IPV4_UDP 17 79 #define ICE_PTG_IM_IPV4_SCTP 18 80 #define ICE_PTG_IM_IPV4_PAY 20 81 #define ICE_PTG_IM_IPV4_OTHER 21 82 #define ICE_PTG_IM_IPV6_TCP 32 83 #define ICE_PTG_IM_IPV6_UDP 33 84 #define ICE_PTG_IM_IPV6_SCTP 34 85 #define ICE_PTG_IM_IPV6_OTHER 37 86 #define ICE_PTG_IM_L2_OTHER 67 87 88 struct ice_flex_fields { 89 union { 90 struct { 91 u8 src_ip; 92 u8 dst_ip; 93 u8 flow_label; /* valid for IPv6 only */ 94 } ip_fields; 95 96 struct { 97 u8 src_prt; 98 u8 dst_prt; 99 } tcp_udp_fields; 100 101 struct { 102 u8 src_ip; 103 u8 dst_ip; 104 u8 src_prt; 105 u8 dst_prt; 106 } ip_tcp_udp_fields; 107 108 struct { 109 u8 src_prt; 110 u8 dst_prt; 111 u8 flow_label; /* valid for IPv6 only */ 112 u8 spi; 113 } ip_esp_fields; 114 115 struct { 116 u32 offset; 117 u32 length; 118 } off_len; 119 } fields; 120 }; 121 122 #define ICE_XLT1_DFLT_GRP 0 123 #define ICE_XLT1_TABLE_SIZE 1024 124 125 /* package labels */ 126 struct ice_label { 127 __le16 value; 128 #define ICE_PKG_LABEL_SIZE 64 129 char name[ICE_PKG_LABEL_SIZE]; 130 }; 131 132 struct ice_label_section { 133 __le16 count; 134 struct ice_label label[STRUCT_HACK_VAR_LEN]; 135 }; 136 137 #define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \ 138 ice_struct_size((struct ice_label_section *)0, label, 1) - \ 139 sizeof(struct ice_label), sizeof(struct ice_label)) 140 141 struct ice_sw_fv_section { 142 __le16 count; 143 __le16 base_offset; 144 struct ice_fv fv[STRUCT_HACK_VAR_LEN]; 145 }; 146 147 struct ice_sw_fv_list_entry { 148 struct LIST_ENTRY_TYPE list_entry; 149 u32 profile_id; 150 struct ice_fv *fv_ptr; 151 }; 152 153 #pragma pack(1) 154 /* The BOOST TCAM stores the match packet header in reverse order, meaning 155 * the fields are reversed; in addition, this means that the normally big endian 156 * fields of the packet are now little endian. 157 */ 158 struct ice_boost_key_value { 159 #define ICE_BOOST_REMAINING_HV_KEY 15 160 u8 remaining_hv_key[ICE_BOOST_REMAINING_HV_KEY]; 161 union { 162 struct { 163 __le16 hv_dst_port_key; 164 __le16 hv_src_port_key; 165 } /* udp_tunnel */; 166 struct { 167 __le16 hv_vlan_id_key; 168 __le16 hv_etype_key; 169 } vlan; 170 }; 171 u8 tcam_search_key; 172 }; 173 #pragma pack() 174 175 struct ice_boost_key { 176 struct ice_boost_key_value key; 177 struct ice_boost_key_value key2; 178 }; 179 180 /* package Boost TCAM entry */ 181 struct ice_boost_tcam_entry { 182 __le16 addr; 183 __le16 reserved; 184 /* break up the 40 bytes of key into different fields */ 185 struct ice_boost_key key; 186 u8 boost_hit_index_group; 187 /* The following contains bitfields which are not on byte boundaries. 188 * These fields are currently unused by driver software. 189 */ 190 #define ICE_BOOST_BIT_FIELDS 43 191 u8 bit_fields[ICE_BOOST_BIT_FIELDS]; 192 }; 193 194 struct ice_boost_tcam_section { 195 __le16 count; 196 __le16 reserved; 197 struct ice_boost_tcam_entry tcam[STRUCT_HACK_VAR_LEN]; 198 }; 199 200 #define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \ 201 ice_struct_size((struct ice_boost_tcam_section *)0, tcam, 1) - \ 202 sizeof(struct ice_boost_tcam_entry), \ 203 sizeof(struct ice_boost_tcam_entry)) 204 205 struct ice_xlt1_section { 206 __le16 count; 207 __le16 offset; 208 u8 value[STRUCT_HACK_VAR_LEN]; 209 }; 210 211 struct ice_xlt2_section { 212 __le16 count; 213 __le16 offset; 214 __le16 value[STRUCT_HACK_VAR_LEN]; 215 }; 216 217 struct ice_prof_redir_section { 218 __le16 count; 219 __le16 offset; 220 u8 redir_value[STRUCT_HACK_VAR_LEN]; 221 }; 222 223 /* Tunnel enabling */ 224 225 enum ice_tunnel_type { 226 TNL_VXLAN = 0, 227 TNL_GENEVE, 228 TNL_GRETAP, 229 TNL_GTP, 230 TNL_GTPC, 231 TNL_GTPU, 232 TNL_LAST = 0xFF, 233 TNL_ALL = 0xFF, 234 }; 235 236 struct ice_tunnel_type_scan { 237 enum ice_tunnel_type type; 238 const char *label_prefix; 239 }; 240 241 struct ice_tunnel_entry { 242 enum ice_tunnel_type type; 243 u16 boost_addr; 244 u16 port; 245 u16 ref; 246 struct ice_boost_tcam_entry *boost_entry; 247 u8 valid; 248 u8 in_use; 249 u8 marked; 250 }; 251 252 #define ICE_TUNNEL_MAX_ENTRIES 16 253 254 struct ice_tunnel_table { 255 struct ice_tunnel_entry tbl[ICE_TUNNEL_MAX_ENTRIES]; 256 u16 count; 257 }; 258 259 struct ice_pkg_es { 260 __le16 count; 261 __le16 offset; 262 struct ice_fv_word es[STRUCT_HACK_VAR_LEN]; 263 }; 264 265 struct ice_es { 266 u32 sid; 267 u16 count; 268 u16 fvw; 269 u16 *ref_count; 270 struct LIST_HEAD_TYPE prof_map; 271 struct ice_fv_word *t; 272 struct ice_lock prof_map_lock; /* protect access to profiles list */ 273 u8 *written; 274 u8 reverse; /* set to true to reverse FV order */ 275 }; 276 277 /* PTYPE Group management */ 278 279 /* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type 280 * group (PTG) ID as output. 281 * 282 * Note: PTG 0 is the default packet type group and it is assumed that all PTYPE 283 * are a part of this group until moved to a new PTG. 284 */ 285 #define ICE_DEFAULT_PTG 0 286 287 struct ice_ptg_entry { 288 struct ice_ptg_ptype *first_ptype; 289 u8 in_use; 290 }; 291 292 struct ice_ptg_ptype { 293 struct ice_ptg_ptype *next_ptype; 294 u8 ptg; 295 }; 296 297 #define ICE_MAX_TCAM_PER_PROFILE 32 298 #define ICE_MAX_PTG_PER_PROFILE 32 299 300 struct ice_prof_map { 301 struct LIST_ENTRY_TYPE list; 302 u64 profile_cookie; 303 u64 context; 304 u8 prof_id; 305 u8 ptg_cnt; 306 u8 ptg[ICE_MAX_PTG_PER_PROFILE]; 307 }; 308 309 #define ICE_INVALID_TCAM 0xFFFF 310 311 struct ice_tcam_inf { 312 u16 tcam_idx; 313 u8 ptg; 314 u8 prof_id; 315 u8 in_use; 316 }; 317 318 struct ice_vsig_prof { 319 struct LIST_ENTRY_TYPE list; 320 u64 profile_cookie; 321 u8 prof_id; 322 u8 tcam_count; 323 struct ice_tcam_inf tcam[ICE_MAX_TCAM_PER_PROFILE]; 324 }; 325 326 struct ice_vsig_entry { 327 struct LIST_HEAD_TYPE prop_lst; 328 struct ice_vsig_vsi *first_vsi; 329 u8 in_use; 330 }; 331 332 struct ice_vsig_vsi { 333 struct ice_vsig_vsi *next_vsi; 334 u32 prop_mask; 335 u16 changed; 336 u16 vsig; 337 }; 338 339 #define ICE_XLT1_CNT 1024 340 #define ICE_MAX_PTGS 256 341 342 /* XLT1 Table */ 343 struct ice_xlt1 { 344 struct ice_ptg_entry *ptg_tbl; 345 struct ice_ptg_ptype *ptypes; 346 u8 *t; 347 u32 sid; 348 u16 count; 349 }; 350 351 #define ICE_XLT2_CNT 768 352 #define ICE_MAX_VSIGS 768 353 354 /* VSIG bit layout: 355 * [0:12]: incremental VSIG index 1 to ICE_MAX_VSIGS 356 * [13:15]: PF number of device 357 */ 358 #define ICE_VSIG_IDX_M (0x1FFF) 359 #define ICE_PF_NUM_S 13 360 #define ICE_PF_NUM_M (0x07 << ICE_PF_NUM_S) 361 #define ICE_VSIG_VALUE(vsig, pf_id) \ 362 ((u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \ 363 (((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M))) 364 #define ICE_DEFAULT_VSIG 0 365 366 /* XLT2 Table */ 367 struct ice_xlt2 { 368 struct ice_vsig_entry *vsig_tbl; 369 struct ice_vsig_vsi *vsis; 370 u16 *t; 371 u32 sid; 372 u16 count; 373 }; 374 375 /* Extraction sequence - list of match fields: 376 * protocol ID, offset, profile length 377 */ 378 union ice_match_fld { 379 struct { 380 u8 prot_id; 381 u8 offset; 382 u8 length; 383 u8 reserved; /* must be zero */ 384 } fld; 385 u32 val; 386 }; 387 388 #define ICE_MATCH_LIST_SZ 20 389 #pragma pack(1) 390 struct ice_match { 391 u8 count; 392 union ice_match_fld list[ICE_MATCH_LIST_SZ]; 393 }; 394 395 /* Profile ID Management */ 396 struct ice_prof_id_key { 397 __le16 flags; 398 u8 xlt1; 399 __le16 xlt2_cdid; 400 }; 401 402 /* Keys are made up of two values, each one-half the size of the key. 403 * For TCAM, the entire key is 80 bits wide (or 2, 40-bit wide values) 404 */ 405 #define ICE_TCAM_KEY_VAL_SZ 5 406 #define ICE_TCAM_KEY_SZ (2 * ICE_TCAM_KEY_VAL_SZ) 407 408 struct ice_prof_tcam_entry { 409 __le16 addr; 410 u8 key[ICE_TCAM_KEY_SZ]; 411 u8 prof_id; 412 }; 413 #pragma pack() 414 415 struct ice_prof_id_section { 416 __le16 count; 417 struct ice_prof_tcam_entry entry[STRUCT_HACK_VAR_LEN]; 418 }; 419 420 struct ice_prof_tcam { 421 u32 sid; 422 u16 count; 423 u16 max_prof_id; 424 struct ice_prof_tcam_entry *t; 425 u8 cdid_bits; /* # CDID bits to use in key, 0, 2, 4, or 8 */ 426 }; 427 428 struct ice_prof_redir { 429 u8 *t; 430 u32 sid; 431 u16 count; 432 }; 433 434 /* Tables per block */ 435 struct ice_blk_info { 436 struct ice_xlt1 xlt1; 437 struct ice_xlt2 xlt2; 438 struct ice_prof_tcam prof; 439 struct ice_prof_redir prof_redir; 440 struct ice_es es; 441 u8 overwrite; /* set to true to allow overwrite of table entries */ 442 u8 is_list_init; 443 }; 444 445 enum ice_chg_type { 446 ICE_TCAM_NONE = 0, 447 ICE_PTG_ES_ADD, 448 ICE_TCAM_ADD, 449 ICE_VSIG_ADD, 450 ICE_VSIG_REM, 451 ICE_VSI_MOVE, 452 }; 453 454 struct ice_chs_chg { 455 struct LIST_ENTRY_TYPE list_entry; 456 enum ice_chg_type type; 457 458 u8 add_ptg; 459 u8 add_vsig; 460 u8 add_tcam_idx; 461 u8 add_prof; 462 u16 ptype; 463 u8 ptg; 464 u8 prof_id; 465 u16 vsi; 466 u16 vsig; 467 u16 orig_vsig; 468 u16 tcam_idx; 469 }; 470 471 #define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT 472 473 enum ice_prof_type { 474 ICE_PROF_INVALID = 0x0, 475 ICE_PROF_NON_TUN = 0x1, 476 ICE_PROF_TUN_UDP = 0x2, 477 ICE_PROF_TUN_GRE = 0x4, 478 ICE_PROF_TUN_GTPU = 0x8, 479 ICE_PROF_TUN_GTPC = 0x10, 480 ICE_PROF_TUN_ALL = 0x1E, 481 ICE_PROF_ALL = 0xFF, 482 }; 483 484 /* Number of bits/bytes contained in meta init entry. Note, this should be a 485 * multiple of 32 bits. 486 */ 487 #define ICE_META_INIT_BITS 192 488 #define ICE_META_INIT_DW_CNT (ICE_META_INIT_BITS / (sizeof(__le32) * \ 489 BITS_PER_BYTE)) 490 491 /* The meta init Flag field starts at this bit */ 492 #define ICE_META_FLAGS_ST 123 493 494 /* The entry and bit to check for Double VLAN Mode (DVM) support */ 495 #define ICE_META_VLAN_MODE_ENTRY 0 496 #define ICE_META_FLAG_VLAN_MODE 60 497 #define ICE_META_VLAN_MODE_BIT (ICE_META_FLAGS_ST + \ 498 ICE_META_FLAG_VLAN_MODE) 499 500 struct ice_meta_init_entry { 501 __le32 bm[ICE_META_INIT_DW_CNT]; 502 }; 503 504 struct ice_meta_init_section { 505 __le16 count; 506 __le16 offset; 507 struct ice_meta_init_entry entry[1]; 508 }; 509 #endif /* _ICE_FLEX_TYPE_H_ */ 510