xref: /linux/drivers/staging/gpib/include/tms9914.h (revision 91fff6fa94cbe13d28caa978ce3f600749304e11)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 /***************************************************************************
4  *    copyright            : (C) 2002 by Frank Mori Hess
5  ***************************************************************************/
6 
7 #ifndef _TMS9914_H
8 #define _TMS9914_H
9 
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include "gpib_state_machines.h"
13 #include "gpib_types.h"
14 
15 enum tms9914_holdoff_mode {
16 	TMS9914_HOLDOFF_NONE,
17 	TMS9914_HOLDOFF_EOI,
18 	TMS9914_HOLDOFF_ALL,
19 };
20 
21 /* struct used to provide variables local to a tms9914 chip */
22 struct tms9914_priv {
23 #ifdef CONFIG_HAS_IOPORT
24 	u32 iobase;
25 #endif
26 	void __iomem *mmiobase;
27 	unsigned int offset;	// offset between successive tms9914 io addresses
28 	unsigned int dma_channel;
29 	// software copy of bits written to interrupt mask registers
30 	u8 imr0_bits, imr1_bits;
31 	// bits written to address mode register
32 	u8 admr_bits;
33 	u8 auxa_bits;	// bits written to auxiliary register A
34 	// used to keep track of board's state, bit definitions given below
35 	unsigned long state;
36 	u8 eos;	// eos character
37 	short eos_flags;
38 	u8 spoll_status;
39 	enum tms9914_holdoff_mode holdoff_mode;
40 	unsigned int ppoll_line;
41 	enum talker_function_state talker_state;
42 	enum listener_function_state listener_state;
43 	unsigned ppoll_sense : 1;
44 	unsigned ppoll_enable : 1;
45 	unsigned ppoll_configure_state : 1;
46 	unsigned primary_listen_addressed : 1;
47 	unsigned primary_talk_addressed : 1;
48 	unsigned holdoff_on_end : 1;
49 	unsigned holdoff_on_all : 1;
50 	unsigned holdoff_active : 1;
51 	// wrappers for outb, inb, readb, or writeb
52 	u8 (*read_byte)(struct tms9914_priv *priv, unsigned int register_number);
53 	void (*write_byte)(struct tms9914_priv *priv, u8 byte, unsigned int
54 			   register_number);
55 };
56 
57 // slightly shorter way to access read_byte and write_byte
read_byte(struct tms9914_priv * priv,unsigned int register_number)58 static inline u8 read_byte(struct tms9914_priv *priv, unsigned int register_number)
59 {
60 	return priv->read_byte(priv, register_number);
61 }
62 
write_byte(struct tms9914_priv * priv,u8 byte,unsigned int register_number)63 static inline void write_byte(struct tms9914_priv *priv, u8 byte, unsigned int register_number)
64 {
65 	priv->write_byte(priv, byte, register_number);
66 }
67 
68 // struct tms9914_priv.state bit numbers
69 enum {
70 	PIO_IN_PROGRESS_BN,	// pio transfer in progress
71 	DMA_READ_IN_PROGRESS_BN,	// dma read transfer in progress
72 	DMA_WRITE_IN_PROGRESS_BN,	// dma write transfer in progress
73 	READ_READY_BN,	// board has data byte available to read
74 	WRITE_READY_BN,	// board is ready to send a data byte
75 	COMMAND_READY_BN,	// board is ready to send a command byte
76 	RECEIVED_END_BN,	// received END
77 	BUS_ERROR_BN,	// bus error
78 	DEV_CLEAR_BN,	// device clear received
79 };
80 
81 // interface functions
82 int tms9914_read(gpib_board_t *board, struct tms9914_priv *priv, uint8_t *buffer,
83 		 size_t length, int *end, size_t *bytes_read);
84 int tms9914_write(gpib_board_t *board, struct tms9914_priv *priv, uint8_t *buffer,
85 		  size_t length, int send_eoi, size_t *bytes_written);
86 int tms9914_command(gpib_board_t *board, struct tms9914_priv *priv, uint8_t *buffer,
87 		    size_t length, size_t *bytes_written);
88 int tms9914_take_control(gpib_board_t *board, struct tms9914_priv *priv, int syncronous);
89 /* alternate version of tms9914_take_control which works around buggy tcs
90  * implementation.
91  */
92 int tms9914_take_control_workaround(gpib_board_t *board, struct tms9914_priv *priv,
93 				    int syncronous);
94 int tms9914_go_to_standby(gpib_board_t *board, struct tms9914_priv *priv);
95 void tms9914_request_system_control(gpib_board_t *board, struct tms9914_priv *priv,
96 				    int request_control);
97 void tms9914_interface_clear(gpib_board_t *board, struct tms9914_priv *priv, int assert);
98 void tms9914_remote_enable(gpib_board_t *board, struct tms9914_priv *priv, int enable);
99 int tms9914_enable_eos(gpib_board_t *board, struct tms9914_priv *priv, uint8_t eos_bytes,
100 		       int compare_8_bits);
101 void tms9914_disable_eos(gpib_board_t *board, struct tms9914_priv *priv);
102 unsigned int tms9914_update_status(gpib_board_t *board, struct tms9914_priv *priv,
103 				   unsigned int clear_mask);
104 int tms9914_primary_address(gpib_board_t *board,
105 			    struct tms9914_priv *priv, unsigned int address);
106 int tms9914_secondary_address(gpib_board_t *board, struct tms9914_priv *priv,
107 			      unsigned int address, int enable);
108 int tms9914_parallel_poll(gpib_board_t *board, struct tms9914_priv *priv, uint8_t *result);
109 void tms9914_parallel_poll_configure(gpib_board_t *board,
110 				     struct tms9914_priv *priv, uint8_t config);
111 void tms9914_parallel_poll_response(gpib_board_t *board,
112 				    struct tms9914_priv *priv, int ist);
113 void tms9914_serial_poll_response(gpib_board_t *board, struct tms9914_priv *priv, uint8_t status);
114 uint8_t tms9914_serial_poll_status(gpib_board_t *board, struct tms9914_priv *priv);
115 int tms9914_line_status(const gpib_board_t *board, struct tms9914_priv *priv);
116 unsigned int tms9914_t1_delay(gpib_board_t *board, struct tms9914_priv *priv,
117 			      unsigned int nano_sec);
118 void tms9914_return_to_local(const gpib_board_t *board, struct tms9914_priv *priv);
119 
120 // utility functions
121 void tms9914_board_reset(struct tms9914_priv *priv);
122 void tms9914_online(gpib_board_t *board, struct tms9914_priv *priv);
123 void tms9914_release_holdoff(struct tms9914_priv *priv);
124 void tms9914_set_holdoff_mode(struct tms9914_priv *priv, enum tms9914_holdoff_mode mode);
125 
126 // wrappers for io functions
127 uint8_t tms9914_ioport_read_byte(struct tms9914_priv *priv, unsigned int register_num);
128 void tms9914_ioport_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num);
129 uint8_t tms9914_iomem_read_byte(struct tms9914_priv *priv, unsigned int register_num);
130 void tms9914_iomem_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num);
131 
132 // interrupt service routine
133 irqreturn_t tms9914_interrupt(gpib_board_t *board, struct tms9914_priv *priv);
134 irqreturn_t tms9914_interrupt_have_status(gpib_board_t *board, struct tms9914_priv *priv,
135 					  int status1,	int status2);
136 
137 // tms9914 has 8 registers
138 enum {
139 	ms9914_num_registers = 8,
140 };
141 
142 /* tms9914 register numbers (might need to be multiplied by
143  * a board-dependent offset to get actually io address offset)
144  */
145 // write registers
146 enum {
147 	IMR0 = 0,	/* interrupt mask 0          */
148 	IMR1 = 1,	/* interrupt mask 1          */
149 	AUXCR = 3,	/* auxiliary command         */
150 	ADR = 4,	// address register
151 	SPMR = 5,	// serial poll mode register
152 	PPR = 6,	/* parallel poll             */
153 	CDOR = 7,	/* data out register         */
154 };
155 
156 // read registers
157 enum {
158 	ISR0 = 0,	/* interrupt status 0          */
159 	ISR1 = 1,	/* interrupt status 1          */
160 	ADSR = 2,	/* address status               */
161 	BSR = 3,	/* bus status */
162 	CPTR = 6,	/* command pass thru           */
163 	DIR = 7,	/* data in register            */
164 };
165 
166 //bit definitions common to tms9914 compatible registers
167 
168 /* ISR0   - Register bits */
169 enum isr0_bits {
170 	HR_MAC = (1 << 0),   /* My Address Change           */
171 	HR_RLC = (1 << 1),   /* Remote/Local change         */
172 	HR_SPAS = (1 << 2),   /* Serial Poll active State    */
173 	HR_END = (1 << 3),   /* END (EOI or EOS)            */
174 	HR_BO = (1 << 4),   /* Byte Out                    */
175 	HR_BI = (1 << 5),   /* Byte In                     */
176 };
177 
178 /* IMR0   - Register bits */
179 enum imr0_bits {
180 	HR_MACIE = (1 << 0),   /*        */
181 	HR_RLCIE = (1 << 1),   /*        */
182 	HR_SPASIE = (1 << 2),   /*        */
183 	HR_ENDIE = (1 << 3),   /*        */
184 	HR_BOIE = (1 << 4),   /*        */
185 	HR_BIIE = (1 << 5),   /*        */
186 };
187 
188 /* ISR1   - Register bits */
189 enum isr1_bits {
190 	HR_IFC = (1 << 0),   /* IFC asserted                */
191 	HR_SRQ = (1 << 1),   /* SRQ asserted                */
192 	HR_MA = (1 << 2),    /* My Address                  */
193 	HR_DCAS = (1 << 3),  /* Device Clear active State   */
194 	HR_APT = (1 << 4),   /* Address pass Through        */
195 	HR_UNC = (1 << 5),   /* Unrecognized Command        */
196 	HR_ERR = (1 << 6),   /* Data Transmission Error     */
197 	HR_GET = (1 << 7),   /* Group execute Trigger       */
198 };
199 
200 /* IMR1   - Register bits */
201 enum imr1_bits {
202 	HR_IFCIE = (1 << 0),   /*        */
203 	HR_SRQIE = (1 << 1),   /*        */
204 	HR_MAIE = (1 << 2),    /*        */
205 	HR_DCASIE = (1 << 3),  /*        */
206 	HR_APTIE = (1 << 4),   /*        */
207 	HR_UNCIE = (1 << 5),   /*        */
208 	HR_ERRIE = (1 << 6),   /*        */
209 	HR_GETIE = (1 << 7),   /*        */
210 };
211 
212 /* ADSR   - Register bits */
213 enum adsr_bits {
214 	HR_ULPA = (1 << 0),   /* Store last address LSB       */
215 	HR_TA = (1 << 1),     /* Talker Adressed              */
216 	HR_LA = (1 << 2),     /* Listener adressed            */
217 	HR_TPAS = (1 << 3),   /* talker primary address state */
218 	HR_LPAS = (1 << 4),   /* listener    "                */
219 	HR_ATN = (1 << 5),    /* ATN active                   */
220 	HR_LLO = (1 << 6),    /* LLO active                   */
221 	HR_REM = (1 << 7),    /* REM active                   */
222 };
223 
224 /* ADR   - Register bits */
225 enum adr_bits {
226 	ADDRESS_MASK = 0x1f,	/* mask to specify lower 5 bits for ADR */
227 	HR_DAT = (1 << 5),      /* disable talker */
228 	HR_DAL = (1 << 6),      /* disable listener */
229 	HR_EDPA = (1 << 7),     /* enable dual primary addressing */
230 };
231 
232 enum bus_status_bits {
233 	BSR_REN_BIT = 0x1,
234 	BSR_IFC_BIT = 0x2,
235 	BSR_SRQ_BIT = 0x4,
236 	BSR_EOI_BIT = 0x8,
237 	BSR_NRFD_BIT = 0x10,
238 	BSR_NDAC_BIT = 0x20,
239 	BSR_DAV_BIT = 0x40,
240 	BSR_ATN_BIT = 0x80,
241 };
242 
243 /*---------------------------------------------------------*/
244 /* TMS 9914 Auxiliary Commands                             */
245 /*---------------------------------------------------------*/
246 
247 enum aux_cmd_bits {
248 	AUX_CS = 0x80,	/* set bit instead of clearing it, used with commands marked 'd' below */
249 	AUX_CHIP_RESET = 0x0,	/* d Chip reset                   */
250 	AUX_INVAL = 0x1,	// release dac holdoff, invalid command byte
251 	AUX_VAL = (AUX_INVAL | AUX_CS),	// release dac holdoff, valid command byte
252 	AUX_RHDF = 0x2,	/* X Release RFD holdoff          */
253 	AUX_HLDA = 0x3,	/* d holdoff on all data          */
254 	AUX_HLDE = 0x4,	/* d holdoff on EOI only          */
255 	AUX_NBAF = 0x5,	/* X Set new byte available false */
256 	AUX_FGET = 0x6,	/* d force GET                    */
257 	AUX_RTL = 0x7,	/* d return to local              */
258 	AUX_SEOI = 0x8,	/* X send EOI with next byte      */
259 	AUX_LON = 0x9,	/* d Listen only                  */
260 	AUX_TON = 0xa,	/* d Talk only                    */
261 	AUX_GTS = 0xb,	/* X goto standby                 */
262 	AUX_TCA = 0xc,	/* X take control asynchronously  */
263 	AUX_TCS = 0xd,	/* X take    "     synchronously  */
264 	AUX_RPP = 0xe,	/* d Request parallel poll        */
265 	AUX_SIC = 0xf,	/* d send interface clear         */
266 	AUX_SRE = 0x10,	/* d send remote enable           */
267 	AUX_RQC = 0x11,	/* X request control              */
268 	AUX_RLC = 0x12,	/* X release control              */
269 	AUX_DAI = 0x13,	/* d disable all interrupts       */
270 	AUX_PTS = 0x14,	/* X pass through next secondary  */
271 	AUX_STDL = 0x15,	/* d short T1 delay                 */
272 	AUX_SHDW = 0x16,	/* d shadow handshake             */
273 	AUX_VSTDL = 0x17,	/* d very short T1 delay (smj9914 extension) */
274 	AUX_RSV2 = 0x18,	/* d request service bit 2 (smj9914 extension) */
275 };
276 
277 #endif	//_TMS9914_H
278