xref: /freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/TargetParser.h (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583)
1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements a target parser to recognise hardware features such as
10 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_TARGETPARSER_TARGETPARSER_H
15 #define LLVM_TARGETPARSER_TARGETPARSER_H
16 
17 #include "llvm/ADT/StringMap.h"
18 #include "llvm/ADT/StringRef.h"
19 
20 namespace llvm {
21 
22 template <typename T> class SmallVectorImpl;
23 class Triple;
24 
25 // Target specific information in their own namespaces.
26 // (ARM/AArch64/X86 are declared in ARM/AArch64/X86TargetParser.h)
27 // These should be generated from TableGen because the information is already
28 // there, and there is where new information about targets will be added.
29 // FIXME: To TableGen this we need to make some table generated files available
30 // even if the back-end is not compiled with LLVM, plus we need to create a new
31 // back-end to TableGen to create these clean tables.
32 namespace AMDGPU {
33 
34 /// GPU kinds supported by the AMDGPU target.
35 enum GPUKind : uint32_t {
36   // Not specified processor.
37   GK_NONE = 0,
38 
39   // R600-based processors.
40   GK_R600 = 1,
41   GK_R630 = 2,
42   GK_RS880 = 3,
43   GK_RV670 = 4,
44   GK_RV710 = 5,
45   GK_RV730 = 6,
46   GK_RV770 = 7,
47   GK_CEDAR = 8,
48   GK_CYPRESS = 9,
49   GK_JUNIPER = 10,
50   GK_REDWOOD = 11,
51   GK_SUMO = 12,
52   GK_BARTS = 13,
53   GK_CAICOS = 14,
54   GK_CAYMAN = 15,
55   GK_TURKS = 16,
56 
57   GK_R600_FIRST = GK_R600,
58   GK_R600_LAST = GK_TURKS,
59 
60   // AMDGCN-based processors.
61   GK_GFX600 = 32,
62   GK_GFX601 = 33,
63   GK_GFX602 = 34,
64 
65   GK_GFX700 = 40,
66   GK_GFX701 = 41,
67   GK_GFX702 = 42,
68   GK_GFX703 = 43,
69   GK_GFX704 = 44,
70   GK_GFX705 = 45,
71 
72   GK_GFX801 = 50,
73   GK_GFX802 = 51,
74   GK_GFX803 = 52,
75   GK_GFX805 = 53,
76   GK_GFX810 = 54,
77 
78   GK_GFX900 = 60,
79   GK_GFX902 = 61,
80   GK_GFX904 = 62,
81   GK_GFX906 = 63,
82   GK_GFX908 = 64,
83   GK_GFX909 = 65,
84   GK_GFX90A = 66,
85   GK_GFX90C = 67,
86   GK_GFX940 = 68,
87   GK_GFX941 = 69,
88   GK_GFX942 = 70,
89 
90   GK_GFX1010 = 71,
91   GK_GFX1011 = 72,
92   GK_GFX1012 = 73,
93   GK_GFX1013 = 74,
94   GK_GFX1030 = 75,
95   GK_GFX1031 = 76,
96   GK_GFX1032 = 77,
97   GK_GFX1033 = 78,
98   GK_GFX1034 = 79,
99   GK_GFX1035 = 80,
100   GK_GFX1036 = 81,
101 
102   GK_GFX1100 = 90,
103   GK_GFX1101 = 91,
104   GK_GFX1102 = 92,
105   GK_GFX1103 = 93,
106   GK_GFX1150 = 94,
107   GK_GFX1151 = 95,
108   GK_GFX1152 = 96,
109 
110   GK_GFX1200 = 100,
111   GK_GFX1201 = 101,
112 
113   GK_AMDGCN_FIRST = GK_GFX600,
114   GK_AMDGCN_LAST = GK_GFX1201,
115 
116   GK_GFX9_GENERIC = 192,
117   GK_GFX10_1_GENERIC = 193,
118   GK_GFX10_3_GENERIC = 194,
119   GK_GFX11_GENERIC = 195,
120   GK_GFX12_GENERIC = 196,
121 
122   GK_AMDGCN_GENERIC_FIRST = GK_GFX9_GENERIC,
123   GK_AMDGCN_GENERIC_LAST = GK_GFX12_GENERIC,
124 };
125 
126 /// Instruction set architecture version.
127 struct IsaVersion {
128   unsigned Major;
129   unsigned Minor;
130   unsigned Stepping;
131 };
132 
133 // This isn't comprehensive for now, just things that are needed from the
134 // frontend driver.
135 enum ArchFeatureKind : uint32_t {
136   FEATURE_NONE = 0,
137 
138   // These features only exist for r600, and are implied true for amdgcn.
139   FEATURE_FMA = 1 << 1,
140   FEATURE_LDEXP = 1 << 2,
141   FEATURE_FP64 = 1 << 3,
142 
143   // Common features.
144   FEATURE_FAST_FMA_F32 = 1 << 4,
145   FEATURE_FAST_DENORMAL_F32 = 1 << 5,
146 
147   // Wavefront 32 is available.
148   FEATURE_WAVE32 = 1 << 6,
149 
150   // Xnack is available.
151   FEATURE_XNACK = 1 << 7,
152 
153   // Sram-ecc is available.
154   FEATURE_SRAMECC = 1 << 8,
155 
156   // WGP mode is supported.
157   FEATURE_WGP = 1 << 9,
158 };
159 
160 enum FeatureError : uint32_t {
161   NO_ERROR = 0,
162   INVALID_FEATURE_COMBINATION,
163   UNSUPPORTED_TARGET_FEATURE
164 };
165 
166 StringRef getArchFamilyNameAMDGCN(GPUKind AK);
167 
168 StringRef getArchNameAMDGCN(GPUKind AK);
169 StringRef getArchNameR600(GPUKind AK);
170 StringRef getCanonicalArchName(const Triple &T, StringRef Arch);
171 GPUKind parseArchAMDGCN(StringRef CPU);
172 GPUKind parseArchR600(StringRef CPU);
173 unsigned getArchAttrAMDGCN(GPUKind AK);
174 unsigned getArchAttrR600(GPUKind AK);
175 
176 void fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values);
177 void fillValidArchListR600(SmallVectorImpl<StringRef> &Values);
178 
179 IsaVersion getIsaVersion(StringRef GPU);
180 
181 /// Fills Features map with default values for given target GPU
182 void fillAMDGPUFeatureMap(StringRef GPU, const Triple &T,
183                           StringMap<bool> &Features);
184 
185 /// Inserts wave size feature for given GPU into features map
186 std::pair<FeatureError, StringRef>
187 insertWaveSizeFeature(StringRef GPU, const Triple &T,
188                       StringMap<bool> &Features);
189 
190 } // namespace AMDGPU
191 } // namespace llvm
192 
193 #endif
194