xref: /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h (revision a5b1eecbed07519c637095e3291b9cbd9748e823)
1 //===- llvm/CodeGen/SelectionDAG.h - InstSelection DAG ----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the SelectionDAG class, and transitively defines the
10 // SDNode class and subclasses.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_SELECTIONDAG_H
15 #define LLVM_CODEGEN_SELECTIONDAG_H
16 
17 #include "llvm/ADT/APFloat.h"
18 #include "llvm/ADT/APInt.h"
19 #include "llvm/ADT/ArrayRef.h"
20 #include "llvm/ADT/DenseMap.h"
21 #include "llvm/ADT/DenseSet.h"
22 #include "llvm/ADT/FoldingSet.h"
23 #include "llvm/ADT/SmallVector.h"
24 #include "llvm/ADT/StringMap.h"
25 #include "llvm/ADT/ilist.h"
26 #include "llvm/ADT/iterator.h"
27 #include "llvm/ADT/iterator_range.h"
28 #include "llvm/CodeGen/DAGCombine.h"
29 #include "llvm/CodeGen/ISDOpcodes.h"
30 #include "llvm/CodeGen/MachineFunction.h"
31 #include "llvm/CodeGen/MachineMemOperand.h"
32 #include "llvm/CodeGen/MachinePassManager.h"
33 #include "llvm/CodeGen/SelectionDAGNodes.h"
34 #include "llvm/CodeGen/ValueTypes.h"
35 #include "llvm/CodeGenTypes/MachineValueType.h"
36 #include "llvm/IR/ConstantRange.h"
37 #include "llvm/IR/DebugLoc.h"
38 #include "llvm/IR/Metadata.h"
39 #include "llvm/Support/Allocator.h"
40 #include "llvm/Support/ArrayRecycler.h"
41 #include "llvm/Support/CodeGen.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/RecyclingAllocator.h"
44 #include <cassert>
45 #include <cstdint>
46 #include <functional>
47 #include <map>
48 #include <string>
49 #include <tuple>
50 #include <utility>
51 #include <vector>
52 
53 namespace llvm {
54 
55 class DIExpression;
56 class DILabel;
57 class DIVariable;
58 class Function;
59 class Pass;
60 class Type;
61 template <class GraphType> struct GraphTraits;
62 template <typename T, unsigned int N> class SmallSetVector;
63 template <typename T, typename Enable> struct FoldingSetTrait;
64 class AAResults;
65 class BlockAddress;
66 class BlockFrequencyInfo;
67 class Constant;
68 class ConstantFP;
69 class ConstantInt;
70 class DataLayout;
71 struct fltSemantics;
72 class FunctionLoweringInfo;
73 class FunctionVarLocs;
74 class GlobalValue;
75 struct KnownBits;
76 class LLVMContext;
77 class MachineBasicBlock;
78 class MachineConstantPoolValue;
79 class MCSymbol;
80 class OptimizationRemarkEmitter;
81 class ProfileSummaryInfo;
82 class SDDbgValue;
83 class SDDbgOperand;
84 class SDDbgLabel;
85 class SelectionDAG;
86 class SelectionDAGTargetInfo;
87 class TargetLibraryInfo;
88 class TargetLowering;
89 class TargetMachine;
90 class TargetSubtargetInfo;
91 class Value;
92 
93 template <typename T> class GenericSSAContext;
94 using SSAContext = GenericSSAContext<Function>;
95 template <typename T> class GenericUniformityInfo;
96 using UniformityInfo = GenericUniformityInfo<SSAContext>;
97 
98 class SDVTListNode : public FoldingSetNode {
99   friend struct FoldingSetTrait<SDVTListNode>;
100 
101   /// A reference to an Interned FoldingSetNodeID for this node.
102   /// The Allocator in SelectionDAG holds the data.
103   /// SDVTList contains all types which are frequently accessed in SelectionDAG.
104   /// The size of this list is not expected to be big so it won't introduce
105   /// a memory penalty.
106   FoldingSetNodeIDRef FastID;
107   const EVT *VTs;
108   unsigned int NumVTs;
109   /// The hash value for SDVTList is fixed, so cache it to avoid
110   /// hash calculation.
111   unsigned HashValue;
112 
113 public:
114   SDVTListNode(const FoldingSetNodeIDRef ID, const EVT *VT, unsigned int Num) :
115       FastID(ID), VTs(VT), NumVTs(Num) {
116     HashValue = ID.ComputeHash();
117   }
118 
119   SDVTList getSDVTList() {
120     SDVTList result = {VTs, NumVTs};
121     return result;
122   }
123 };
124 
125 /// Specialize FoldingSetTrait for SDVTListNode
126 /// to avoid computing temp FoldingSetNodeID and hash value.
127 template<> struct FoldingSetTrait<SDVTListNode> : DefaultFoldingSetTrait<SDVTListNode> {
128   static void Profile(const SDVTListNode &X, FoldingSetNodeID& ID) {
129     ID = X.FastID;
130   }
131 
132   static bool Equals(const SDVTListNode &X, const FoldingSetNodeID &ID,
133                      unsigned IDHash, FoldingSetNodeID &TempID) {
134     if (X.HashValue != IDHash)
135       return false;
136     return ID == X.FastID;
137   }
138 
139   static unsigned ComputeHash(const SDVTListNode &X, FoldingSetNodeID &TempID) {
140     return X.HashValue;
141   }
142 };
143 
144 template <> struct ilist_alloc_traits<SDNode> {
145   static void deleteNode(SDNode *) {
146     llvm_unreachable("ilist_traits<SDNode> shouldn't see a deleteNode call!");
147   }
148 };
149 
150 /// Keeps track of dbg_value information through SDISel.  We do
151 /// not build SDNodes for these so as not to perturb the generated code;
152 /// instead the info is kept off to the side in this structure. Each SDNode may
153 /// have one or more associated dbg_value entries. This information is kept in
154 /// DbgValMap.
155 /// Byval parameters are handled separately because they don't use alloca's,
156 /// which busts the normal mechanism.  There is good reason for handling all
157 /// parameters separately:  they may not have code generated for them, they
158 /// should always go at the beginning of the function regardless of other code
159 /// motion, and debug info for them is potentially useful even if the parameter
160 /// is unused.  Right now only byval parameters are handled separately.
161 class SDDbgInfo {
162   BumpPtrAllocator Alloc;
163   SmallVector<SDDbgValue*, 32> DbgValues;
164   SmallVector<SDDbgValue*, 32> ByvalParmDbgValues;
165   SmallVector<SDDbgLabel*, 4> DbgLabels;
166   using DbgValMapType = DenseMap<const SDNode *, SmallVector<SDDbgValue *, 2>>;
167   DbgValMapType DbgValMap;
168 
169 public:
170   SDDbgInfo() = default;
171   SDDbgInfo(const SDDbgInfo &) = delete;
172   SDDbgInfo &operator=(const SDDbgInfo &) = delete;
173 
174   void add(SDDbgValue *V, bool isParameter);
175 
176   void add(SDDbgLabel *L) { DbgLabels.push_back(L); }
177 
178   /// Invalidate all DbgValues attached to the node and remove
179   /// it from the Node-to-DbgValues map.
180   void erase(const SDNode *Node);
181 
182   void clear() {
183     DbgValMap.clear();
184     DbgValues.clear();
185     ByvalParmDbgValues.clear();
186     DbgLabels.clear();
187     Alloc.Reset();
188   }
189 
190   BumpPtrAllocator &getAlloc() { return Alloc; }
191 
192   bool empty() const {
193     return DbgValues.empty() && ByvalParmDbgValues.empty() && DbgLabels.empty();
194   }
195 
196   ArrayRef<SDDbgValue*> getSDDbgValues(const SDNode *Node) const {
197     auto I = DbgValMap.find(Node);
198     if (I != DbgValMap.end())
199       return I->second;
200     return ArrayRef<SDDbgValue*>();
201   }
202 
203   using DbgIterator = SmallVectorImpl<SDDbgValue*>::iterator;
204   using DbgLabelIterator = SmallVectorImpl<SDDbgLabel*>::iterator;
205 
206   DbgIterator DbgBegin() { return DbgValues.begin(); }
207   DbgIterator DbgEnd()   { return DbgValues.end(); }
208   DbgIterator ByvalParmDbgBegin() { return ByvalParmDbgValues.begin(); }
209   DbgIterator ByvalParmDbgEnd()   { return ByvalParmDbgValues.end(); }
210   DbgLabelIterator DbgLabelBegin() { return DbgLabels.begin(); }
211   DbgLabelIterator DbgLabelEnd()   { return DbgLabels.end(); }
212 };
213 
214 void checkForCycles(const SelectionDAG *DAG, bool force = false);
215 
216 /// This is used to represent a portion of an LLVM function in a low-level
217 /// Data Dependence DAG representation suitable for instruction selection.
218 /// This DAG is constructed as the first step of instruction selection in order
219 /// to allow implementation of machine specific optimizations
220 /// and code simplifications.
221 ///
222 /// The representation used by the SelectionDAG is a target-independent
223 /// representation, which has some similarities to the GCC RTL representation,
224 /// but is significantly more simple, powerful, and is a graph form instead of a
225 /// linear form.
226 ///
227 class SelectionDAG {
228   const TargetMachine &TM;
229   const SelectionDAGTargetInfo *TSI = nullptr;
230   const TargetLowering *TLI = nullptr;
231   const TargetLibraryInfo *LibInfo = nullptr;
232   const FunctionVarLocs *FnVarLocs = nullptr;
233   MachineFunction *MF;
234   MachineFunctionAnalysisManager *MFAM = nullptr;
235   Pass *SDAGISelPass = nullptr;
236   LLVMContext *Context;
237   CodeGenOptLevel OptLevel;
238 
239   UniformityInfo *UA = nullptr;
240   FunctionLoweringInfo * FLI = nullptr;
241 
242   /// The function-level optimization remark emitter.  Used to emit remarks
243   /// whenever manipulating the DAG.
244   OptimizationRemarkEmitter *ORE;
245 
246   ProfileSummaryInfo *PSI = nullptr;
247   BlockFrequencyInfo *BFI = nullptr;
248 
249   /// List of non-single value types.
250   FoldingSet<SDVTListNode> VTListMap;
251 
252   /// Pool allocation for misc. objects that are created once per SelectionDAG.
253   BumpPtrAllocator Allocator;
254 
255   /// The starting token.
256   SDNode EntryNode;
257 
258   /// The root of the entire DAG.
259   SDValue Root;
260 
261   /// A linked list of nodes in the current DAG.
262   ilist<SDNode> AllNodes;
263 
264   /// The AllocatorType for allocating SDNodes. We use
265   /// pool allocation with recycling.
266   using NodeAllocatorType = RecyclingAllocator<BumpPtrAllocator, SDNode,
267                                                sizeof(LargestSDNode),
268                                                alignof(MostAlignedSDNode)>;
269 
270   /// Pool allocation for nodes.
271   NodeAllocatorType NodeAllocator;
272 
273   /// This structure is used to memoize nodes, automatically performing
274   /// CSE with existing nodes when a duplicate is requested.
275   FoldingSet<SDNode> CSEMap;
276 
277   /// Pool allocation for machine-opcode SDNode operands.
278   BumpPtrAllocator OperandAllocator;
279   ArrayRecycler<SDUse> OperandRecycler;
280 
281   /// Tracks dbg_value and dbg_label information through SDISel.
282   SDDbgInfo *DbgInfo;
283 
284   using CallSiteInfo = MachineFunction::CallSiteInfo;
285 
286   struct NodeExtraInfo {
287     CallSiteInfo CSInfo;
288     MDNode *HeapAllocSite = nullptr;
289     MDNode *PCSections = nullptr;
290     MDNode *MMRA = nullptr;
291     bool NoMerge = false;
292   };
293   /// Out-of-line extra information for SDNodes.
294   DenseMap<const SDNode *, NodeExtraInfo> SDEI;
295 
296   /// PersistentId counter to be used when inserting the next
297   /// SDNode to this SelectionDAG. We do not place that under
298   /// `#if LLVM_ENABLE_ABI_BREAKING_CHECKS` intentionally because
299   /// it adds unneeded complexity without noticeable
300   /// benefits (see discussion with @thakis in D120714).
301   uint16_t NextPersistentId = 0;
302 
303 public:
304   /// Clients of various APIs that cause global effects on
305   /// the DAG can optionally implement this interface.  This allows the clients
306   /// to handle the various sorts of updates that happen.
307   ///
308   /// A DAGUpdateListener automatically registers itself with DAG when it is
309   /// constructed, and removes itself when destroyed in RAII fashion.
310   struct DAGUpdateListener {
311     DAGUpdateListener *const Next;
312     SelectionDAG &DAG;
313 
314     explicit DAGUpdateListener(SelectionDAG &D)
315       : Next(D.UpdateListeners), DAG(D) {
316       DAG.UpdateListeners = this;
317     }
318 
319     virtual ~DAGUpdateListener() {
320       assert(DAG.UpdateListeners == this &&
321              "DAGUpdateListeners must be destroyed in LIFO order");
322       DAG.UpdateListeners = Next;
323     }
324 
325     /// The node N that was deleted and, if E is not null, an
326     /// equivalent node E that replaced it.
327     virtual void NodeDeleted(SDNode *N, SDNode *E);
328 
329     /// The node N that was updated.
330     virtual void NodeUpdated(SDNode *N);
331 
332     /// The node N that was inserted.
333     virtual void NodeInserted(SDNode *N);
334   };
335 
336   struct DAGNodeDeletedListener : public DAGUpdateListener {
337     std::function<void(SDNode *, SDNode *)> Callback;
338 
339     DAGNodeDeletedListener(SelectionDAG &DAG,
340                            std::function<void(SDNode *, SDNode *)> Callback)
341         : DAGUpdateListener(DAG), Callback(std::move(Callback)) {}
342 
343     void NodeDeleted(SDNode *N, SDNode *E) override { Callback(N, E); }
344 
345    private:
346     virtual void anchor();
347   };
348 
349   struct DAGNodeInsertedListener : public DAGUpdateListener {
350     std::function<void(SDNode *)> Callback;
351 
352     DAGNodeInsertedListener(SelectionDAG &DAG,
353                             std::function<void(SDNode *)> Callback)
354         : DAGUpdateListener(DAG), Callback(std::move(Callback)) {}
355 
356     void NodeInserted(SDNode *N) override { Callback(N); }
357 
358   private:
359     virtual void anchor();
360   };
361 
362   /// Help to insert SDNodeFlags automatically in transforming. Use
363   /// RAII to save and resume flags in current scope.
364   class FlagInserter {
365     SelectionDAG &DAG;
366     SDNodeFlags Flags;
367     FlagInserter *LastInserter;
368 
369   public:
370     FlagInserter(SelectionDAG &SDAG, SDNodeFlags Flags)
371         : DAG(SDAG), Flags(Flags),
372           LastInserter(SDAG.getFlagInserter()) {
373       SDAG.setFlagInserter(this);
374     }
375     FlagInserter(SelectionDAG &SDAG, SDNode *N)
376         : FlagInserter(SDAG, N->getFlags()) {}
377 
378     FlagInserter(const FlagInserter &) = delete;
379     FlagInserter &operator=(const FlagInserter &) = delete;
380     ~FlagInserter() { DAG.setFlagInserter(LastInserter); }
381 
382     SDNodeFlags getFlags() const { return Flags; }
383   };
384 
385   /// When true, additional steps are taken to
386   /// ensure that getConstant() and similar functions return DAG nodes that
387   /// have legal types. This is important after type legalization since
388   /// any illegally typed nodes generated after this point will not experience
389   /// type legalization.
390   bool NewNodesMustHaveLegalTypes = false;
391 
392 private:
393   /// DAGUpdateListener is a friend so it can manipulate the listener stack.
394   friend struct DAGUpdateListener;
395 
396   /// Linked list of registered DAGUpdateListener instances.
397   /// This stack is maintained by DAGUpdateListener RAII.
398   DAGUpdateListener *UpdateListeners = nullptr;
399 
400   /// Implementation of setSubgraphColor.
401   /// Return whether we had to truncate the search.
402   bool setSubgraphColorHelper(SDNode *N, const char *Color,
403                               DenseSet<SDNode *> &visited,
404                               int level, bool &printed);
405 
406   template <typename SDNodeT, typename... ArgTypes>
407   SDNodeT *newSDNode(ArgTypes &&... Args) {
408     return new (NodeAllocator.template Allocate<SDNodeT>())
409         SDNodeT(std::forward<ArgTypes>(Args)...);
410   }
411 
412   /// Build a synthetic SDNodeT with the given args and extract its subclass
413   /// data as an integer (e.g. for use in a folding set).
414   ///
415   /// The args to this function are the same as the args to SDNodeT's
416   /// constructor, except the second arg (assumed to be a const DebugLoc&) is
417   /// omitted.
418   template <typename SDNodeT, typename... ArgTypes>
419   static uint16_t getSyntheticNodeSubclassData(unsigned IROrder,
420                                                ArgTypes &&... Args) {
421     // The compiler can reduce this expression to a constant iff we pass an
422     // empty DebugLoc.  Thankfully, the debug location doesn't have any bearing
423     // on the subclass data.
424     return SDNodeT(IROrder, DebugLoc(), std::forward<ArgTypes>(Args)...)
425         .getRawSubclassData();
426   }
427 
428   template <typename SDNodeTy>
429   static uint16_t getSyntheticNodeSubclassData(unsigned Opc, unsigned Order,
430                                                 SDVTList VTs, EVT MemoryVT,
431                                                 MachineMemOperand *MMO) {
432     return SDNodeTy(Opc, Order, DebugLoc(), VTs, MemoryVT, MMO)
433          .getRawSubclassData();
434   }
435 
436   void createOperands(SDNode *Node, ArrayRef<SDValue> Vals);
437 
438   void removeOperands(SDNode *Node) {
439     if (!Node->OperandList)
440       return;
441     OperandRecycler.deallocate(
442         ArrayRecycler<SDUse>::Capacity::get(Node->NumOperands),
443         Node->OperandList);
444     Node->NumOperands = 0;
445     Node->OperandList = nullptr;
446   }
447   void CreateTopologicalOrder(std::vector<SDNode*>& Order);
448 
449 public:
450   // Maximum depth for recursive analysis such as computeKnownBits, etc.
451   static constexpr unsigned MaxRecursionDepth = 6;
452 
453   explicit SelectionDAG(const TargetMachine &TM, CodeGenOptLevel);
454   SelectionDAG(const SelectionDAG &) = delete;
455   SelectionDAG &operator=(const SelectionDAG &) = delete;
456   ~SelectionDAG();
457 
458   /// Prepare this SelectionDAG to process code in the given MachineFunction.
459   void init(MachineFunction &NewMF, OptimizationRemarkEmitter &NewORE,
460             Pass *PassPtr, const TargetLibraryInfo *LibraryInfo,
461             UniformityInfo *UA, ProfileSummaryInfo *PSIin,
462             BlockFrequencyInfo *BFIin, FunctionVarLocs const *FnVarLocs);
463 
464   void init(MachineFunction &NewMF, OptimizationRemarkEmitter &NewORE,
465             MachineFunctionAnalysisManager &AM,
466             const TargetLibraryInfo *LibraryInfo, UniformityInfo *UA,
467             ProfileSummaryInfo *PSIin, BlockFrequencyInfo *BFIin,
468             FunctionVarLocs const *FnVarLocs) {
469     init(NewMF, NewORE, nullptr, LibraryInfo, UA, PSIin, BFIin, FnVarLocs);
470     MFAM = &AM;
471   }
472 
473   void setFunctionLoweringInfo(FunctionLoweringInfo * FuncInfo) {
474     FLI = FuncInfo;
475   }
476 
477   /// Clear state and free memory necessary to make this
478   /// SelectionDAG ready to process a new block.
479   void clear();
480 
481   MachineFunction &getMachineFunction() const { return *MF; }
482   const Pass *getPass() const { return SDAGISelPass; }
483   MachineFunctionAnalysisManager *getMFAM() { return MFAM; }
484 
485   CodeGenOptLevel getOptLevel() const { return OptLevel; }
486   const DataLayout &getDataLayout() const { return MF->getDataLayout(); }
487   const TargetMachine &getTarget() const { return TM; }
488   const TargetSubtargetInfo &getSubtarget() const { return MF->getSubtarget(); }
489   template <typename STC> const STC &getSubtarget() const {
490     return MF->getSubtarget<STC>();
491   }
492   const TargetLowering &getTargetLoweringInfo() const { return *TLI; }
493   const TargetLibraryInfo &getLibInfo() const { return *LibInfo; }
494   const SelectionDAGTargetInfo &getSelectionDAGInfo() const { return *TSI; }
495   const UniformityInfo *getUniformityInfo() const { return UA; }
496   /// Returns the result of the AssignmentTrackingAnalysis pass if it's
497   /// available, otherwise return nullptr.
498   const FunctionVarLocs *getFunctionVarLocs() const { return FnVarLocs; }
499   LLVMContext *getContext() const { return Context; }
500   OptimizationRemarkEmitter &getORE() const { return *ORE; }
501   ProfileSummaryInfo *getPSI() const { return PSI; }
502   BlockFrequencyInfo *getBFI() const { return BFI; }
503 
504   FlagInserter *getFlagInserter() { return Inserter; }
505   void setFlagInserter(FlagInserter *FI) { Inserter = FI; }
506 
507   /// Just dump dot graph to a user-provided path and title.
508   /// This doesn't open the dot viewer program and
509   /// helps visualization when outside debugging session.
510   /// FileName expects absolute path. If provided
511   /// without any path separators then the file
512   /// will be created in the current directory.
513   /// Error will be emitted if the path is insane.
514 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
515   LLVM_DUMP_METHOD void dumpDotGraph(const Twine &FileName, const Twine &Title);
516 #endif
517 
518   /// Pop up a GraphViz/gv window with the DAG rendered using 'dot'.
519   void viewGraph(const std::string &Title);
520   void viewGraph();
521 
522 #if LLVM_ENABLE_ABI_BREAKING_CHECKS
523   std::map<const SDNode *, std::string> NodeGraphAttrs;
524 #endif
525 
526   /// Clear all previously defined node graph attributes.
527   /// Intended to be used from a debugging tool (eg. gdb).
528   void clearGraphAttrs();
529 
530   /// Set graph attributes for a node. (eg. "color=red".)
531   void setGraphAttrs(const SDNode *N, const char *Attrs);
532 
533   /// Get graph attributes for a node. (eg. "color=red".)
534   /// Used from getNodeAttributes.
535   std::string getGraphAttrs(const SDNode *N) const;
536 
537   /// Convenience for setting node color attribute.
538   void setGraphColor(const SDNode *N, const char *Color);
539 
540   /// Convenience for setting subgraph color attribute.
541   void setSubgraphColor(SDNode *N, const char *Color);
542 
543   using allnodes_const_iterator = ilist<SDNode>::const_iterator;
544 
545   allnodes_const_iterator allnodes_begin() const { return AllNodes.begin(); }
546   allnodes_const_iterator allnodes_end() const { return AllNodes.end(); }
547 
548   using allnodes_iterator = ilist<SDNode>::iterator;
549 
550   allnodes_iterator allnodes_begin() { return AllNodes.begin(); }
551   allnodes_iterator allnodes_end() { return AllNodes.end(); }
552 
553   ilist<SDNode>::size_type allnodes_size() const {
554     return AllNodes.size();
555   }
556 
557   iterator_range<allnodes_iterator> allnodes() {
558     return make_range(allnodes_begin(), allnodes_end());
559   }
560   iterator_range<allnodes_const_iterator> allnodes() const {
561     return make_range(allnodes_begin(), allnodes_end());
562   }
563 
564   /// Return the root tag of the SelectionDAG.
565   const SDValue &getRoot() const { return Root; }
566 
567   /// Return the token chain corresponding to the entry of the function.
568   SDValue getEntryNode() const {
569     return SDValue(const_cast<SDNode *>(&EntryNode), 0);
570   }
571 
572   /// Set the current root tag of the SelectionDAG.
573   ///
574   const SDValue &setRoot(SDValue N) {
575     assert((!N.getNode() || N.getValueType() == MVT::Other) &&
576            "DAG root value is not a chain!");
577     if (N.getNode())
578       checkForCycles(N.getNode(), this);
579     Root = N;
580     if (N.getNode())
581       checkForCycles(this);
582     return Root;
583   }
584 
585 #if !defined(NDEBUG) && LLVM_ENABLE_ABI_BREAKING_CHECKS
586   void VerifyDAGDivergence();
587 #endif
588 
589   /// This iterates over the nodes in the SelectionDAG, folding
590   /// certain types of nodes together, or eliminating superfluous nodes.  The
591   /// Level argument controls whether Combine is allowed to produce nodes and
592   /// types that are illegal on the target.
593   void Combine(CombineLevel Level, AAResults *AA, CodeGenOptLevel OptLevel);
594 
595   /// This transforms the SelectionDAG into a SelectionDAG that
596   /// only uses types natively supported by the target.
597   /// Returns "true" if it made any changes.
598   ///
599   /// Note that this is an involved process that may invalidate pointers into
600   /// the graph.
601   bool LegalizeTypes();
602 
603   /// This transforms the SelectionDAG into a SelectionDAG that is
604   /// compatible with the target instruction selector, as indicated by the
605   /// TargetLowering object.
606   ///
607   /// Note that this is an involved process that may invalidate pointers into
608   /// the graph.
609   void Legalize();
610 
611   /// Transforms a SelectionDAG node and any operands to it into a node
612   /// that is compatible with the target instruction selector, as indicated by
613   /// the TargetLowering object.
614   ///
615   /// \returns true if \c N is a valid, legal node after calling this.
616   ///
617   /// This essentially runs a single recursive walk of the \c Legalize process
618   /// over the given node (and its operands). This can be used to incrementally
619   /// legalize the DAG. All of the nodes which are directly replaced,
620   /// potentially including N, are added to the output parameter \c
621   /// UpdatedNodes so that the delta to the DAG can be understood by the
622   /// caller.
623   ///
624   /// When this returns false, N has been legalized in a way that make the
625   /// pointer passed in no longer valid. It may have even been deleted from the
626   /// DAG, and so it shouldn't be used further. When this returns true, the
627   /// N passed in is a legal node, and can be immediately processed as such.
628   /// This may still have done some work on the DAG, and will still populate
629   /// UpdatedNodes with any new nodes replacing those originally in the DAG.
630   bool LegalizeOp(SDNode *N, SmallSetVector<SDNode *, 16> &UpdatedNodes);
631 
632   /// This transforms the SelectionDAG into a SelectionDAG
633   /// that only uses vector math operations supported by the target.  This is
634   /// necessary as a separate step from Legalize because unrolling a vector
635   /// operation can introduce illegal types, which requires running
636   /// LegalizeTypes again.
637   ///
638   /// This returns true if it made any changes; in that case, LegalizeTypes
639   /// is called again before Legalize.
640   ///
641   /// Note that this is an involved process that may invalidate pointers into
642   /// the graph.
643   bool LegalizeVectors();
644 
645   /// This method deletes all unreachable nodes in the SelectionDAG.
646   void RemoveDeadNodes();
647 
648   /// Remove the specified node from the system.  This node must
649   /// have no referrers.
650   void DeleteNode(SDNode *N);
651 
652   /// Return an SDVTList that represents the list of values specified.
653   SDVTList getVTList(EVT VT);
654   SDVTList getVTList(EVT VT1, EVT VT2);
655   SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3);
656   SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4);
657   SDVTList getVTList(ArrayRef<EVT> VTs);
658 
659   //===--------------------------------------------------------------------===//
660   // Node creation methods.
661 
662   /// Create a ConstantSDNode wrapping a constant value.
663   /// If VT is a vector type, the constant is splatted into a BUILD_VECTOR.
664   ///
665   /// If only legal types can be produced, this does the necessary
666   /// transformations (e.g., if the vector element type is illegal).
667   /// @{
668   SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT,
669                       bool isTarget = false, bool isOpaque = false);
670   SDValue getConstant(const APInt &Val, const SDLoc &DL, EVT VT,
671                       bool isTarget = false, bool isOpaque = false);
672 
673   SDValue getAllOnesConstant(const SDLoc &DL, EVT VT, bool IsTarget = false,
674                              bool IsOpaque = false) {
675     return getConstant(APInt::getAllOnes(VT.getScalarSizeInBits()), DL, VT,
676                        IsTarget, IsOpaque);
677   }
678 
679   SDValue getConstant(const ConstantInt &Val, const SDLoc &DL, EVT VT,
680                       bool isTarget = false, bool isOpaque = false);
681   SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL,
682                             bool isTarget = false);
683   SDValue getShiftAmountConstant(uint64_t Val, EVT VT, const SDLoc &DL);
684   SDValue getShiftAmountConstant(const APInt &Val, EVT VT, const SDLoc &DL);
685   SDValue getVectorIdxConstant(uint64_t Val, const SDLoc &DL,
686                                bool isTarget = false);
687 
688   SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT,
689                             bool isOpaque = false) {
690     return getConstant(Val, DL, VT, true, isOpaque);
691   }
692   SDValue getTargetConstant(const APInt &Val, const SDLoc &DL, EVT VT,
693                             bool isOpaque = false) {
694     return getConstant(Val, DL, VT, true, isOpaque);
695   }
696   SDValue getTargetConstant(const ConstantInt &Val, const SDLoc &DL, EVT VT,
697                             bool isOpaque = false) {
698     return getConstant(Val, DL, VT, true, isOpaque);
699   }
700 
701   /// Create a true or false constant of type \p VT using the target's
702   /// BooleanContent for type \p OpVT.
703   SDValue getBoolConstant(bool V, const SDLoc &DL, EVT VT, EVT OpVT);
704   /// @}
705 
706   /// Create a ConstantFPSDNode wrapping a constant value.
707   /// If VT is a vector type, the constant is splatted into a BUILD_VECTOR.
708   ///
709   /// If only legal types can be produced, this does the necessary
710   /// transformations (e.g., if the vector element type is illegal).
711   /// The forms that take a double should only be used for simple constants
712   /// that can be exactly represented in VT.  No checks are made.
713   /// @{
714   SDValue getConstantFP(double Val, const SDLoc &DL, EVT VT,
715                         bool isTarget = false);
716   SDValue getConstantFP(const APFloat &Val, const SDLoc &DL, EVT VT,
717                         bool isTarget = false);
718   SDValue getConstantFP(const ConstantFP &V, const SDLoc &DL, EVT VT,
719                         bool isTarget = false);
720   SDValue getTargetConstantFP(double Val, const SDLoc &DL, EVT VT) {
721     return getConstantFP(Val, DL, VT, true);
722   }
723   SDValue getTargetConstantFP(const APFloat &Val, const SDLoc &DL, EVT VT) {
724     return getConstantFP(Val, DL, VT, true);
725   }
726   SDValue getTargetConstantFP(const ConstantFP &Val, const SDLoc &DL, EVT VT) {
727     return getConstantFP(Val, DL, VT, true);
728   }
729   /// @}
730 
731   SDValue getGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT,
732                            int64_t offset = 0, bool isTargetGA = false,
733                            unsigned TargetFlags = 0);
734   SDValue getTargetGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT,
735                                  int64_t offset = 0, unsigned TargetFlags = 0) {
736     return getGlobalAddress(GV, DL, VT, offset, true, TargetFlags);
737   }
738   SDValue getFrameIndex(int FI, EVT VT, bool isTarget = false);
739   SDValue getTargetFrameIndex(int FI, EVT VT) {
740     return getFrameIndex(FI, VT, true);
741   }
742   SDValue getJumpTable(int JTI, EVT VT, bool isTarget = false,
743                        unsigned TargetFlags = 0);
744   SDValue getTargetJumpTable(int JTI, EVT VT, unsigned TargetFlags = 0) {
745     return getJumpTable(JTI, VT, true, TargetFlags);
746   }
747   SDValue getJumpTableDebugInfo(int JTI, SDValue Chain, const SDLoc &DL);
748   SDValue getConstantPool(const Constant *C, EVT VT,
749                           MaybeAlign Align = std::nullopt, int Offs = 0,
750                           bool isT = false, unsigned TargetFlags = 0);
751   SDValue getTargetConstantPool(const Constant *C, EVT VT,
752                                 MaybeAlign Align = std::nullopt, int Offset = 0,
753                                 unsigned TargetFlags = 0) {
754     return getConstantPool(C, VT, Align, Offset, true, TargetFlags);
755   }
756   SDValue getConstantPool(MachineConstantPoolValue *C, EVT VT,
757                           MaybeAlign Align = std::nullopt, int Offs = 0,
758                           bool isT = false, unsigned TargetFlags = 0);
759   SDValue getTargetConstantPool(MachineConstantPoolValue *C, EVT VT,
760                                 MaybeAlign Align = std::nullopt, int Offset = 0,
761                                 unsigned TargetFlags = 0) {
762     return getConstantPool(C, VT, Align, Offset, true, TargetFlags);
763   }
764   // When generating a branch to a BB, we don't in general know enough
765   // to provide debug info for the BB at that time, so keep this one around.
766   SDValue getBasicBlock(MachineBasicBlock *MBB);
767   SDValue getExternalSymbol(const char *Sym, EVT VT);
768   SDValue getTargetExternalSymbol(const char *Sym, EVT VT,
769                                   unsigned TargetFlags = 0);
770   SDValue getMCSymbol(MCSymbol *Sym, EVT VT);
771 
772   SDValue getValueType(EVT);
773   SDValue getRegister(unsigned Reg, EVT VT);
774   SDValue getRegisterMask(const uint32_t *RegMask);
775   SDValue getEHLabel(const SDLoc &dl, SDValue Root, MCSymbol *Label);
776   SDValue getLabelNode(unsigned Opcode, const SDLoc &dl, SDValue Root,
777                        MCSymbol *Label);
778   SDValue getBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset = 0,
779                           bool isTarget = false, unsigned TargetFlags = 0);
780   SDValue getTargetBlockAddress(const BlockAddress *BA, EVT VT,
781                                 int64_t Offset = 0, unsigned TargetFlags = 0) {
782     return getBlockAddress(BA, VT, Offset, true, TargetFlags);
783   }
784 
785   SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg,
786                        SDValue N) {
787     return getNode(ISD::CopyToReg, dl, MVT::Other, Chain,
788                    getRegister(Reg, N.getValueType()), N);
789   }
790 
791   // This version of the getCopyToReg method takes an extra operand, which
792   // indicates that there is potentially an incoming glue value (if Glue is not
793   // null) and that there should be a glue result.
794   SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N,
795                        SDValue Glue) {
796     SDVTList VTs = getVTList(MVT::Other, MVT::Glue);
797     SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue };
798     return getNode(ISD::CopyToReg, dl, VTs,
799                    ArrayRef(Ops, Glue.getNode() ? 4 : 3));
800   }
801 
802   // Similar to last getCopyToReg() except parameter Reg is a SDValue
803   SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N,
804                        SDValue Glue) {
805     SDVTList VTs = getVTList(MVT::Other, MVT::Glue);
806     SDValue Ops[] = { Chain, Reg, N, Glue };
807     return getNode(ISD::CopyToReg, dl, VTs,
808                    ArrayRef(Ops, Glue.getNode() ? 4 : 3));
809   }
810 
811   SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT) {
812     SDVTList VTs = getVTList(VT, MVT::Other);
813     SDValue Ops[] = { Chain, getRegister(Reg, VT) };
814     return getNode(ISD::CopyFromReg, dl, VTs, Ops);
815   }
816 
817   // This version of the getCopyFromReg method takes an extra operand, which
818   // indicates that there is potentially an incoming glue value (if Glue is not
819   // null) and that there should be a glue result.
820   SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT,
821                          SDValue Glue) {
822     SDVTList VTs = getVTList(VT, MVT::Other, MVT::Glue);
823     SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue };
824     return getNode(ISD::CopyFromReg, dl, VTs,
825                    ArrayRef(Ops, Glue.getNode() ? 3 : 2));
826   }
827 
828   SDValue getCondCode(ISD::CondCode Cond);
829 
830   /// Return an ISD::VECTOR_SHUFFLE node. The number of elements in VT,
831   /// which must be a vector type, must match the number of mask elements
832   /// NumElts. An integer mask element equal to -1 is treated as undefined.
833   SDValue getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1, SDValue N2,
834                            ArrayRef<int> Mask);
835 
836   /// Return an ISD::BUILD_VECTOR node. The number of elements in VT,
837   /// which must be a vector type, must match the number of operands in Ops.
838   /// The operands must have the same type as (or, for integers, a type wider
839   /// than) VT's element type.
840   SDValue getBuildVector(EVT VT, const SDLoc &DL, ArrayRef<SDValue> Ops) {
841     // VerifySDNode (via InsertNode) checks BUILD_VECTOR later.
842     return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
843   }
844 
845   /// Return an ISD::BUILD_VECTOR node. The number of elements in VT,
846   /// which must be a vector type, must match the number of operands in Ops.
847   /// The operands must have the same type as (or, for integers, a type wider
848   /// than) VT's element type.
849   SDValue getBuildVector(EVT VT, const SDLoc &DL, ArrayRef<SDUse> Ops) {
850     // VerifySDNode (via InsertNode) checks BUILD_VECTOR later.
851     return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
852   }
853 
854   /// Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all
855   /// elements. VT must be a vector type. Op's type must be the same as (or,
856   /// for integers, a type wider than) VT's element type.
857   SDValue getSplatBuildVector(EVT VT, const SDLoc &DL, SDValue Op) {
858     // VerifySDNode (via InsertNode) checks BUILD_VECTOR later.
859     if (Op.getOpcode() == ISD::UNDEF) {
860       assert((VT.getVectorElementType() == Op.getValueType() ||
861               (VT.isInteger() &&
862                VT.getVectorElementType().bitsLE(Op.getValueType()))) &&
863              "A splatted value must have a width equal or (for integers) "
864              "greater than the vector element type!");
865       return getNode(ISD::UNDEF, SDLoc(), VT);
866     }
867 
868     SmallVector<SDValue, 16> Ops(VT.getVectorNumElements(), Op);
869     return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
870   }
871 
872   // Return a splat ISD::SPLAT_VECTOR node, consisting of Op splatted to all
873   // elements.
874   SDValue getSplatVector(EVT VT, const SDLoc &DL, SDValue Op) {
875     if (Op.getOpcode() == ISD::UNDEF) {
876       assert((VT.getVectorElementType() == Op.getValueType() ||
877               (VT.isInteger() &&
878                VT.getVectorElementType().bitsLE(Op.getValueType()))) &&
879              "A splatted value must have a width equal or (for integers) "
880              "greater than the vector element type!");
881       return getNode(ISD::UNDEF, SDLoc(), VT);
882     }
883     return getNode(ISD::SPLAT_VECTOR, DL, VT, Op);
884   }
885 
886   /// Returns a node representing a splat of one value into all lanes
887   /// of the provided vector type.  This is a utility which returns
888   /// either a BUILD_VECTOR or SPLAT_VECTOR depending on the
889   /// scalability of the desired vector type.
890   SDValue getSplat(EVT VT, const SDLoc &DL, SDValue Op) {
891     assert(VT.isVector() && "Can't splat to non-vector type");
892     return VT.isScalableVector() ?
893       getSplatVector(VT, DL, Op) : getSplatBuildVector(VT, DL, Op);
894   }
895 
896   /// Returns a vector of type ResVT whose elements contain the linear sequence
897   ///   <0, Step, Step * 2, Step * 3, ...>
898   SDValue getStepVector(const SDLoc &DL, EVT ResVT, const APInt &StepVal);
899 
900   /// Returns a vector of type ResVT whose elements contain the linear sequence
901   ///   <0, 1, 2, 3, ...>
902   SDValue getStepVector(const SDLoc &DL, EVT ResVT);
903 
904   /// Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to
905   /// the shuffle node in input but with swapped operands.
906   ///
907   /// Example: shuffle A, B, <0,5,2,7> -> shuffle B, A, <4,1,6,3>
908   SDValue getCommutedVectorShuffle(const ShuffleVectorSDNode &SV);
909 
910   /// Convert Op, which must be of float type, to the
911   /// float type VT, by either extending or rounding (by truncation).
912   SDValue getFPExtendOrRound(SDValue Op, const SDLoc &DL, EVT VT);
913 
914   /// Convert Op, which must be a STRICT operation of float type, to the
915   /// float type VT, by either extending or rounding (by truncation).
916   std::pair<SDValue, SDValue>
917   getStrictFPExtendOrRound(SDValue Op, SDValue Chain, const SDLoc &DL, EVT VT);
918 
919   /// Convert *_EXTEND_VECTOR_INREG to *_EXTEND opcode.
920   static unsigned getOpcode_EXTEND(unsigned Opcode) {
921     switch (Opcode) {
922     case ISD::ANY_EXTEND:
923     case ISD::ANY_EXTEND_VECTOR_INREG:
924       return ISD::ANY_EXTEND;
925     case ISD::ZERO_EXTEND:
926     case ISD::ZERO_EXTEND_VECTOR_INREG:
927       return ISD::ZERO_EXTEND;
928     case ISD::SIGN_EXTEND:
929     case ISD::SIGN_EXTEND_VECTOR_INREG:
930       return ISD::SIGN_EXTEND;
931     }
932     llvm_unreachable("Unknown opcode");
933   }
934 
935   /// Convert *_EXTEND to *_EXTEND_VECTOR_INREG opcode.
936   static unsigned getOpcode_EXTEND_VECTOR_INREG(unsigned Opcode) {
937     switch (Opcode) {
938     case ISD::ANY_EXTEND:
939     case ISD::ANY_EXTEND_VECTOR_INREG:
940       return ISD::ANY_EXTEND_VECTOR_INREG;
941     case ISD::ZERO_EXTEND:
942     case ISD::ZERO_EXTEND_VECTOR_INREG:
943       return ISD::ZERO_EXTEND_VECTOR_INREG;
944     case ISD::SIGN_EXTEND:
945     case ISD::SIGN_EXTEND_VECTOR_INREG:
946       return ISD::SIGN_EXTEND_VECTOR_INREG;
947     }
948     llvm_unreachable("Unknown opcode");
949   }
950 
951   /// Convert Op, which must be of integer type, to the
952   /// integer type VT, by either any-extending or truncating it.
953   SDValue getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
954 
955   /// Convert Op, which must be of integer type, to the
956   /// integer type VT, by either sign-extending or truncating it.
957   SDValue getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
958 
959   /// Convert Op, which must be of integer type, to the
960   /// integer type VT, by either zero-extending or truncating it.
961   SDValue getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
962 
963   /// Convert Op, which must be of integer type, to the
964   /// integer type VT, by either any/sign/zero-extending (depending on IsAny /
965   /// IsSigned) or truncating it.
966   SDValue getExtOrTrunc(SDValue Op, const SDLoc &DL,
967                         EVT VT, unsigned Opcode) {
968     switch(Opcode) {
969       case ISD::ANY_EXTEND:
970         return getAnyExtOrTrunc(Op, DL, VT);
971       case ISD::ZERO_EXTEND:
972         return getZExtOrTrunc(Op, DL, VT);
973       case ISD::SIGN_EXTEND:
974         return getSExtOrTrunc(Op, DL, VT);
975     }
976     llvm_unreachable("Unsupported opcode");
977   }
978 
979   /// Convert Op, which must be of integer type, to the
980   /// integer type VT, by either sign/zero-extending (depending on IsSigned) or
981   /// truncating it.
982   SDValue getExtOrTrunc(bool IsSigned, SDValue Op, const SDLoc &DL, EVT VT) {
983     return IsSigned ? getSExtOrTrunc(Op, DL, VT) : getZExtOrTrunc(Op, DL, VT);
984   }
985 
986   /// Convert Op, which must be of integer type, to the
987   /// integer type VT, by first bitcasting (from potential vector) to
988   /// corresponding scalar type then either any-extending or truncating it.
989   SDValue getBitcastedAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
990 
991   /// Convert Op, which must be of integer type, to the
992   /// integer type VT, by first bitcasting (from potential vector) to
993   /// corresponding scalar type then either sign-extending or truncating it.
994   SDValue getBitcastedSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
995 
996   /// Convert Op, which must be of integer type, to the
997   /// integer type VT, by first bitcasting (from potential vector) to
998   /// corresponding scalar type then either zero-extending or truncating it.
999   SDValue getBitcastedZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
1000 
1001   /// Return the expression required to zero extend the Op
1002   /// value assuming it was the smaller SrcTy value.
1003   SDValue getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT);
1004 
1005   /// Return the expression required to zero extend the Op
1006   /// value assuming it was the smaller SrcTy value.
1007   SDValue getVPZeroExtendInReg(SDValue Op, SDValue Mask, SDValue EVL,
1008                                const SDLoc &DL, EVT VT);
1009 
1010   /// Convert Op, which must be of integer type, to the integer type VT, by
1011   /// either truncating it or performing either zero or sign extension as
1012   /// appropriate extension for the pointer's semantics.
1013   SDValue getPtrExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
1014 
1015   /// Return the expression required to extend the Op as a pointer value
1016   /// assuming it was the smaller SrcTy value. This may be either a zero extend
1017   /// or a sign extend.
1018   SDValue getPtrExtendInReg(SDValue Op, const SDLoc &DL, EVT VT);
1019 
1020   /// Convert Op, which must be of integer type, to the integer type VT,
1021   /// by using an extension appropriate for the target's
1022   /// BooleanContent for type OpVT or truncating it.
1023   SDValue getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT, EVT OpVT);
1024 
1025   /// Create negative operation as (SUB 0, Val).
1026   SDValue getNegative(SDValue Val, const SDLoc &DL, EVT VT);
1027 
1028   /// Create a bitwise NOT operation as (XOR Val, -1).
1029   SDValue getNOT(const SDLoc &DL, SDValue Val, EVT VT);
1030 
1031   /// Create a logical NOT operation as (XOR Val, BooleanOne).
1032   SDValue getLogicalNOT(const SDLoc &DL, SDValue Val, EVT VT);
1033 
1034   /// Create a vector-predicated logical NOT operation as (VP_XOR Val,
1035   /// BooleanOne, Mask, EVL).
1036   SDValue getVPLogicalNOT(const SDLoc &DL, SDValue Val, SDValue Mask,
1037                           SDValue EVL, EVT VT);
1038 
1039   /// Convert a vector-predicated Op, which must be an integer vector, to the
1040   /// vector-type VT, by performing either vector-predicated zext or truncating
1041   /// it. The Op will be returned as-is if Op and VT are vectors containing
1042   /// integer with same width.
1043   SDValue getVPZExtOrTrunc(const SDLoc &DL, EVT VT, SDValue Op, SDValue Mask,
1044                            SDValue EVL);
1045 
1046   /// Convert a vector-predicated Op, which must be of integer type, to the
1047   /// vector-type integer type VT, by either truncating it or performing either
1048   /// vector-predicated zero or sign extension as appropriate extension for the
1049   /// pointer's semantics. This function just redirects to getVPZExtOrTrunc
1050   /// right now.
1051   SDValue getVPPtrExtOrTrunc(const SDLoc &DL, EVT VT, SDValue Op, SDValue Mask,
1052                              SDValue EVL);
1053 
1054   /// Returns sum of the base pointer and offset.
1055   /// Unlike getObjectPtrOffset this does not set NoUnsignedWrap by default.
1056   SDValue getMemBasePlusOffset(SDValue Base, TypeSize Offset, const SDLoc &DL,
1057                                const SDNodeFlags Flags = SDNodeFlags());
1058   SDValue getMemBasePlusOffset(SDValue Base, SDValue Offset, const SDLoc &DL,
1059                                const SDNodeFlags Flags = SDNodeFlags());
1060 
1061   /// Create an add instruction with appropriate flags when used for
1062   /// addressing some offset of an object. i.e. if a load is split into multiple
1063   /// components, create an add nuw from the base pointer to the offset.
1064   SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Ptr, TypeSize Offset) {
1065     SDNodeFlags Flags;
1066     Flags.setNoUnsignedWrap(true);
1067     return getMemBasePlusOffset(Ptr, Offset, SL, Flags);
1068   }
1069 
1070   SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Ptr, SDValue Offset) {
1071     // The object itself can't wrap around the address space, so it shouldn't be
1072     // possible for the adds of the offsets to the split parts to overflow.
1073     SDNodeFlags Flags;
1074     Flags.setNoUnsignedWrap(true);
1075     return getMemBasePlusOffset(Ptr, Offset, SL, Flags);
1076   }
1077 
1078   /// Return a new CALLSEQ_START node, that starts new call frame, in which
1079   /// InSize bytes are set up inside CALLSEQ_START..CALLSEQ_END sequence and
1080   /// OutSize specifies part of the frame set up prior to the sequence.
1081   SDValue getCALLSEQ_START(SDValue Chain, uint64_t InSize, uint64_t OutSize,
1082                            const SDLoc &DL) {
1083     SDVTList VTs = getVTList(MVT::Other, MVT::Glue);
1084     SDValue Ops[] = { Chain,
1085                       getIntPtrConstant(InSize, DL, true),
1086                       getIntPtrConstant(OutSize, DL, true) };
1087     return getNode(ISD::CALLSEQ_START, DL, VTs, Ops);
1088   }
1089 
1090   /// Return a new CALLSEQ_END node, which always must have a
1091   /// glue result (to ensure it's not CSE'd).
1092   /// CALLSEQ_END does not have a useful SDLoc.
1093   SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2,
1094                          SDValue InGlue, const SDLoc &DL) {
1095     SDVTList NodeTys = getVTList(MVT::Other, MVT::Glue);
1096     SmallVector<SDValue, 4> Ops;
1097     Ops.push_back(Chain);
1098     Ops.push_back(Op1);
1099     Ops.push_back(Op2);
1100     if (InGlue.getNode())
1101       Ops.push_back(InGlue);
1102     return getNode(ISD::CALLSEQ_END, DL, NodeTys, Ops);
1103   }
1104 
1105   SDValue getCALLSEQ_END(SDValue Chain, uint64_t Size1, uint64_t Size2,
1106                          SDValue Glue, const SDLoc &DL) {
1107     return getCALLSEQ_END(
1108         Chain, getIntPtrConstant(Size1, DL, /*isTarget=*/true),
1109         getIntPtrConstant(Size2, DL, /*isTarget=*/true), Glue, DL);
1110   }
1111 
1112   /// Return true if the result of this operation is always undefined.
1113   bool isUndef(unsigned Opcode, ArrayRef<SDValue> Ops);
1114 
1115   /// Return an UNDEF node. UNDEF does not have a useful SDLoc.
1116   SDValue getUNDEF(EVT VT) {
1117     return getNode(ISD::UNDEF, SDLoc(), VT);
1118   }
1119 
1120   /// Return a node that represents the runtime scaling 'MulImm * RuntimeVL'.
1121   SDValue getVScale(const SDLoc &DL, EVT VT, APInt MulImm,
1122                     bool ConstantFold = true);
1123 
1124   SDValue getElementCount(const SDLoc &DL, EVT VT, ElementCount EC,
1125                           bool ConstantFold = true);
1126 
1127   /// Return a GLOBAL_OFFSET_TABLE node. This does not have a useful SDLoc.
1128   SDValue getGLOBAL_OFFSET_TABLE(EVT VT) {
1129     return getNode(ISD::GLOBAL_OFFSET_TABLE, SDLoc(), VT);
1130   }
1131 
1132   /// Gets or creates the specified node.
1133   ///
1134   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
1135                   ArrayRef<SDUse> Ops);
1136   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
1137                   ArrayRef<SDValue> Ops, const SDNodeFlags Flags);
1138   SDValue getNode(unsigned Opcode, const SDLoc &DL, ArrayRef<EVT> ResultTys,
1139                   ArrayRef<SDValue> Ops);
1140   SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1141                   ArrayRef<SDValue> Ops, const SDNodeFlags Flags);
1142 
1143   // Use flags from current flag inserter.
1144   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
1145                   ArrayRef<SDValue> Ops);
1146   SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1147                   ArrayRef<SDValue> Ops);
1148   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand);
1149   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
1150                   SDValue N2);
1151   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
1152                   SDValue N2, SDValue N3);
1153 
1154   // Specialize based on number of operands.
1155   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT);
1156   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand,
1157                   const SDNodeFlags Flags);
1158   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
1159                   SDValue N2, const SDNodeFlags Flags);
1160   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
1161                   SDValue N2, SDValue N3, const SDNodeFlags Flags);
1162   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
1163                   SDValue N2, SDValue N3, SDValue N4);
1164   SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
1165                   SDValue N2, SDValue N3, SDValue N4, SDValue N5);
1166 
1167   // Specialize again based on number of operands for nodes with a VTList
1168   // rather than a single VT.
1169   SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
1170   SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
1171   SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1172                   SDValue N2);
1173   SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1174                   SDValue N2, SDValue N3);
1175   SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1176                   SDValue N2, SDValue N3, SDValue N4);
1177   SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1178                   SDValue N2, SDValue N3, SDValue N4, SDValue N5);
1179 
1180   /// Compute a TokenFactor to force all the incoming stack arguments to be
1181   /// loaded from the stack. This is used in tail call lowering to protect
1182   /// stack arguments from being clobbered.
1183   SDValue getStackArgumentTokenFactor(SDValue Chain);
1184 
1185   /* \p CI if not null is the memset call being lowered.
1186    * \p OverrideTailCall is an optional parameter that can be used to override
1187    * the tail call optimization decision. */
1188   SDValue
1189   getMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src,
1190             SDValue Size, Align Alignment, bool isVol, bool AlwaysInline,
1191             const CallInst *CI, std::optional<bool> OverrideTailCall,
1192             MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo,
1193             const AAMDNodes &AAInfo = AAMDNodes(), AAResults *AA = nullptr);
1194 
1195   /* \p CI if not null is the memset call being lowered.
1196    * \p OverrideTailCall is an optional parameter that can be used to override
1197    * the tail call optimization decision. */
1198   SDValue getMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src,
1199                      SDValue Size, Align Alignment, bool isVol,
1200                      const CallInst *CI, std::optional<bool> OverrideTailCall,
1201                      MachinePointerInfo DstPtrInfo,
1202                      MachinePointerInfo SrcPtrInfo,
1203                      const AAMDNodes &AAInfo = AAMDNodes(),
1204                      AAResults *AA = nullptr);
1205 
1206   SDValue getMemset(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src,
1207                     SDValue Size, Align Alignment, bool isVol,
1208                     bool AlwaysInline, const CallInst *CI,
1209                     MachinePointerInfo DstPtrInfo,
1210                     const AAMDNodes &AAInfo = AAMDNodes());
1211 
1212   SDValue getAtomicMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst,
1213                           SDValue Src, SDValue Size, Type *SizeTy,
1214                           unsigned ElemSz, bool isTailCall,
1215                           MachinePointerInfo DstPtrInfo,
1216                           MachinePointerInfo SrcPtrInfo);
1217 
1218   SDValue getAtomicMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst,
1219                            SDValue Src, SDValue Size, Type *SizeTy,
1220                            unsigned ElemSz, bool isTailCall,
1221                            MachinePointerInfo DstPtrInfo,
1222                            MachinePointerInfo SrcPtrInfo);
1223 
1224   SDValue getAtomicMemset(SDValue Chain, const SDLoc &dl, SDValue Dst,
1225                           SDValue Value, SDValue Size, Type *SizeTy,
1226                           unsigned ElemSz, bool isTailCall,
1227                           MachinePointerInfo DstPtrInfo);
1228 
1229   /// Helper function to make it easier to build SetCC's if you just have an
1230   /// ISD::CondCode instead of an SDValue.
1231   SDValue getSetCC(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS,
1232                    ISD::CondCode Cond, SDValue Chain = SDValue(),
1233                    bool IsSignaling = false) {
1234     assert(LHS.getValueType().isVector() == RHS.getValueType().isVector() &&
1235            "Vector/scalar operand type mismatch for setcc");
1236     assert(LHS.getValueType().isVector() == VT.isVector() &&
1237            "Vector/scalar result type mismatch for setcc");
1238     assert(Cond != ISD::SETCC_INVALID &&
1239            "Cannot create a setCC of an invalid node.");
1240     if (Chain)
1241       return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
1242                      {VT, MVT::Other}, {Chain, LHS, RHS, getCondCode(Cond)});
1243     return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond));
1244   }
1245 
1246   /// Helper function to make it easier to build VP_SETCCs if you just have an
1247   /// ISD::CondCode instead of an SDValue.
1248   SDValue getSetCCVP(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS,
1249                      ISD::CondCode Cond, SDValue Mask, SDValue EVL) {
1250     assert(LHS.getValueType().isVector() && RHS.getValueType().isVector() &&
1251            "Cannot compare scalars");
1252     assert(Cond != ISD::SETCC_INVALID &&
1253            "Cannot create a setCC of an invalid node.");
1254     return getNode(ISD::VP_SETCC, DL, VT, LHS, RHS, getCondCode(Cond), Mask,
1255                    EVL);
1256   }
1257 
1258   /// Helper function to make it easier to build Select's if you just have
1259   /// operands and don't want to check for vector.
1260   SDValue getSelect(const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS,
1261                     SDValue RHS, SDNodeFlags Flags = SDNodeFlags()) {
1262     assert(LHS.getValueType() == VT && RHS.getValueType() == VT &&
1263            "Cannot use select on differing types");
1264     auto Opcode = Cond.getValueType().isVector() ? ISD::VSELECT : ISD::SELECT;
1265     return getNode(Opcode, DL, VT, Cond, LHS, RHS, Flags);
1266   }
1267 
1268   /// Helper function to make it easier to build SelectCC's if you just have an
1269   /// ISD::CondCode instead of an SDValue.
1270   SDValue getSelectCC(const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue True,
1271                       SDValue False, ISD::CondCode Cond) {
1272     return getNode(ISD::SELECT_CC, DL, True.getValueType(), LHS, RHS, True,
1273                    False, getCondCode(Cond));
1274   }
1275 
1276   /// Try to simplify a select/vselect into 1 of its operands or a constant.
1277   SDValue simplifySelect(SDValue Cond, SDValue TVal, SDValue FVal);
1278 
1279   /// Try to simplify a shift into 1 of its operands or a constant.
1280   SDValue simplifyShift(SDValue X, SDValue Y);
1281 
1282   /// Try to simplify a floating-point binary operation into 1 of its operands
1283   /// or a constant.
1284   SDValue simplifyFPBinop(unsigned Opcode, SDValue X, SDValue Y,
1285                           SDNodeFlags Flags);
1286 
1287   /// VAArg produces a result and token chain, and takes a pointer
1288   /// and a source value as input.
1289   SDValue getVAArg(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
1290                    SDValue SV, unsigned Align);
1291 
1292   /// Gets a node for an atomic cmpxchg op. There are two
1293   /// valid Opcodes. ISD::ATOMIC_CMO_SWAP produces the value loaded and a
1294   /// chain result. ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS produces the value loaded,
1295   /// a success flag (initially i1), and a chain.
1296   SDValue getAtomicCmpSwap(unsigned Opcode, const SDLoc &dl, EVT MemVT,
1297                            SDVTList VTs, SDValue Chain, SDValue Ptr,
1298                            SDValue Cmp, SDValue Swp, MachineMemOperand *MMO);
1299 
1300   /// Gets a node for an atomic op, produces result (if relevant)
1301   /// and chain and takes 2 operands.
1302   SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain,
1303                     SDValue Ptr, SDValue Val, MachineMemOperand *MMO);
1304 
1305   /// Gets a node for an atomic op, produces result and chain and
1306   /// takes 1 operand.
1307   SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, EVT VT,
1308                     SDValue Chain, SDValue Ptr, MachineMemOperand *MMO);
1309 
1310   /// Gets a node for an atomic op, produces result and chain and takes N
1311   /// operands.
1312   SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
1313                     SDVTList VTList, ArrayRef<SDValue> Ops,
1314                     MachineMemOperand *MMO);
1315 
1316   /// Creates a MemIntrinsicNode that may produce a
1317   /// result and takes a list of operands. Opcode may be INTRINSIC_VOID,
1318   /// INTRINSIC_W_CHAIN, or a target-specific opcode with a value not
1319   /// less than FIRST_TARGET_MEMORY_OPCODE.
1320   SDValue getMemIntrinsicNode(
1321       unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops,
1322       EVT MemVT, MachinePointerInfo PtrInfo, Align Alignment,
1323       MachineMemOperand::Flags Flags = MachineMemOperand::MOLoad |
1324                                        MachineMemOperand::MOStore,
1325       LocationSize Size = 0, const AAMDNodes &AAInfo = AAMDNodes());
1326 
1327   inline SDValue getMemIntrinsicNode(
1328       unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops,
1329       EVT MemVT, MachinePointerInfo PtrInfo,
1330       MaybeAlign Alignment = std::nullopt,
1331       MachineMemOperand::Flags Flags = MachineMemOperand::MOLoad |
1332                                        MachineMemOperand::MOStore,
1333       LocationSize Size = 0, const AAMDNodes &AAInfo = AAMDNodes()) {
1334     // Ensure that codegen never sees alignment 0
1335     return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, PtrInfo,
1336                                Alignment.value_or(getEVTAlign(MemVT)), Flags,
1337                                Size, AAInfo);
1338   }
1339 
1340   SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl, SDVTList VTList,
1341                               ArrayRef<SDValue> Ops, EVT MemVT,
1342                               MachineMemOperand *MMO);
1343 
1344   /// Creates a LifetimeSDNode that starts (`IsStart==true`) or ends
1345   /// (`IsStart==false`) the lifetime of the portion of `FrameIndex` between
1346   /// offsets `Offset` and `Offset + Size`.
1347   SDValue getLifetimeNode(bool IsStart, const SDLoc &dl, SDValue Chain,
1348                           int FrameIndex, int64_t Size, int64_t Offset = -1);
1349 
1350   /// Creates a PseudoProbeSDNode with function GUID `Guid` and
1351   /// the index of the block `Index` it is probing, as well as the attributes
1352   /// `attr` of the probe.
1353   SDValue getPseudoProbeNode(const SDLoc &Dl, SDValue Chain, uint64_t Guid,
1354                              uint64_t Index, uint32_t Attr);
1355 
1356   /// Create a MERGE_VALUES node from the given operands.
1357   SDValue getMergeValues(ArrayRef<SDValue> Ops, const SDLoc &dl);
1358 
1359   /// Loads are not normal binary operators: their result type is not
1360   /// determined by their operands, and they produce a value AND a token chain.
1361   ///
1362   /// This function will set the MOLoad flag on MMOFlags, but you can set it if
1363   /// you want.  The MOStore flag must not be set.
1364   SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
1365                   MachinePointerInfo PtrInfo,
1366                   MaybeAlign Alignment = MaybeAlign(),
1367                   MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
1368                   const AAMDNodes &AAInfo = AAMDNodes(),
1369                   const MDNode *Ranges = nullptr);
1370   SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
1371                   MachineMemOperand *MMO);
1372   SDValue
1373   getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain,
1374              SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT,
1375              MaybeAlign Alignment = MaybeAlign(),
1376              MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
1377              const AAMDNodes &AAInfo = AAMDNodes());
1378   SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1379                      SDValue Chain, SDValue Ptr, EVT MemVT,
1380                      MachineMemOperand *MMO);
1381   SDValue getIndexedLoad(SDValue OrigLoad, const SDLoc &dl, SDValue Base,
1382                          SDValue Offset, ISD::MemIndexedMode AM);
1383   SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1384                   const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
1385                   MachinePointerInfo PtrInfo, EVT MemVT, Align Alignment,
1386                   MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
1387                   const AAMDNodes &AAInfo = AAMDNodes(),
1388                   const MDNode *Ranges = nullptr);
1389   inline SDValue getLoad(
1390       ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl,
1391       SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo,
1392       EVT MemVT, MaybeAlign Alignment = MaybeAlign(),
1393       MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
1394       const AAMDNodes &AAInfo = AAMDNodes(), const MDNode *Ranges = nullptr) {
1395     // Ensures that codegen never sees a None Alignment.
1396     return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, PtrInfo, MemVT,
1397                    Alignment.value_or(getEVTAlign(MemVT)), MMOFlags, AAInfo,
1398                    Ranges);
1399   }
1400   SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1401                   const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
1402                   EVT MemVT, MachineMemOperand *MMO);
1403 
1404   /// Helper function to build ISD::STORE nodes.
1405   ///
1406   /// This function will set the MOStore flag on MMOFlags, but you can set it if
1407   /// you want.  The MOLoad and MOInvariant flags must not be set.
1408 
1409   SDValue
1410   getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
1411            MachinePointerInfo PtrInfo, Align Alignment,
1412            MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
1413            const AAMDNodes &AAInfo = AAMDNodes());
1414   inline SDValue
1415   getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
1416            MachinePointerInfo PtrInfo, MaybeAlign Alignment = MaybeAlign(),
1417            MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
1418            const AAMDNodes &AAInfo = AAMDNodes()) {
1419     return getStore(Chain, dl, Val, Ptr, PtrInfo,
1420                     Alignment.value_or(getEVTAlign(Val.getValueType())),
1421                     MMOFlags, AAInfo);
1422   }
1423   SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
1424                    MachineMemOperand *MMO);
1425   SDValue
1426   getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
1427                 MachinePointerInfo PtrInfo, EVT SVT, Align Alignment,
1428                 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
1429                 const AAMDNodes &AAInfo = AAMDNodes());
1430   inline SDValue
1431   getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
1432                 MachinePointerInfo PtrInfo, EVT SVT,
1433                 MaybeAlign Alignment = MaybeAlign(),
1434                 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
1435                 const AAMDNodes &AAInfo = AAMDNodes()) {
1436     return getTruncStore(Chain, dl, Val, Ptr, PtrInfo, SVT,
1437                          Alignment.value_or(getEVTAlign(SVT)), MMOFlags,
1438                          AAInfo);
1439   }
1440   SDValue getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val,
1441                         SDValue Ptr, EVT SVT, MachineMemOperand *MMO);
1442   SDValue getIndexedStore(SDValue OrigStore, const SDLoc &dl, SDValue Base,
1443                           SDValue Offset, ISD::MemIndexedMode AM);
1444 
1445   SDValue getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1446                     const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
1447                     SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo,
1448                     EVT MemVT, Align Alignment,
1449                     MachineMemOperand::Flags MMOFlags, const AAMDNodes &AAInfo,
1450                     const MDNode *Ranges = nullptr, bool IsExpanding = false);
1451   inline SDValue
1452   getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1453             const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
1454             SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT,
1455             MaybeAlign Alignment = MaybeAlign(),
1456             MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
1457             const AAMDNodes &AAInfo = AAMDNodes(),
1458             const MDNode *Ranges = nullptr, bool IsExpanding = false) {
1459     // Ensures that codegen never sees a None Alignment.
1460     return getLoadVP(AM, ExtType, VT, dl, Chain, Ptr, Offset, Mask, EVL,
1461                      PtrInfo, MemVT, Alignment.value_or(getEVTAlign(MemVT)),
1462                      MMOFlags, AAInfo, Ranges, IsExpanding);
1463   }
1464   SDValue getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1465                     const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
1466                     SDValue Mask, SDValue EVL, EVT MemVT,
1467                     MachineMemOperand *MMO, bool IsExpanding = false);
1468   SDValue getLoadVP(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
1469                     SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo,
1470                     MaybeAlign Alignment, MachineMemOperand::Flags MMOFlags,
1471                     const AAMDNodes &AAInfo, const MDNode *Ranges = nullptr,
1472                     bool IsExpanding = false);
1473   SDValue getLoadVP(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
1474                     SDValue Mask, SDValue EVL, MachineMemOperand *MMO,
1475                     bool IsExpanding = false);
1476   SDValue getExtLoadVP(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1477                        SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL,
1478                        MachinePointerInfo PtrInfo, EVT MemVT,
1479                        MaybeAlign Alignment, MachineMemOperand::Flags MMOFlags,
1480                        const AAMDNodes &AAInfo, bool IsExpanding = false);
1481   SDValue getExtLoadVP(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1482                        SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL,
1483                        EVT MemVT, MachineMemOperand *MMO,
1484                        bool IsExpanding = false);
1485   SDValue getIndexedLoadVP(SDValue OrigLoad, const SDLoc &dl, SDValue Base,
1486                            SDValue Offset, ISD::MemIndexedMode AM);
1487   SDValue getStoreVP(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
1488                      SDValue Offset, SDValue Mask, SDValue EVL, EVT MemVT,
1489                      MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1490                      bool IsTruncating = false, bool IsCompressing = false);
1491   SDValue getTruncStoreVP(SDValue Chain, const SDLoc &dl, SDValue Val,
1492                           SDValue Ptr, SDValue Mask, SDValue EVL,
1493                           MachinePointerInfo PtrInfo, EVT SVT, Align Alignment,
1494                           MachineMemOperand::Flags MMOFlags,
1495                           const AAMDNodes &AAInfo, bool IsCompressing = false);
1496   SDValue getTruncStoreVP(SDValue Chain, const SDLoc &dl, SDValue Val,
1497                           SDValue Ptr, SDValue Mask, SDValue EVL, EVT SVT,
1498                           MachineMemOperand *MMO, bool IsCompressing = false);
1499   SDValue getIndexedStoreVP(SDValue OrigStore, const SDLoc &dl, SDValue Base,
1500                             SDValue Offset, ISD::MemIndexedMode AM);
1501 
1502   SDValue getStridedLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
1503                            EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr,
1504                            SDValue Offset, SDValue Stride, SDValue Mask,
1505                            SDValue EVL, EVT MemVT, MachineMemOperand *MMO,
1506                            bool IsExpanding = false);
1507   SDValue getStridedLoadVP(EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr,
1508                            SDValue Stride, SDValue Mask, SDValue EVL,
1509                            MachineMemOperand *MMO, bool IsExpanding = false);
1510   SDValue getExtStridedLoadVP(ISD::LoadExtType ExtType, const SDLoc &DL, EVT VT,
1511                               SDValue Chain, SDValue Ptr, SDValue Stride,
1512                               SDValue Mask, SDValue EVL, EVT MemVT,
1513                               MachineMemOperand *MMO, bool IsExpanding = false);
1514   SDValue getStridedStoreVP(SDValue Chain, const SDLoc &DL, SDValue Val,
1515                             SDValue Ptr, SDValue Offset, SDValue Stride,
1516                             SDValue Mask, SDValue EVL, EVT MemVT,
1517                             MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1518                             bool IsTruncating = false,
1519                             bool IsCompressing = false);
1520   SDValue getTruncStridedStoreVP(SDValue Chain, const SDLoc &DL, SDValue Val,
1521                                  SDValue Ptr, SDValue Stride, SDValue Mask,
1522                                  SDValue EVL, EVT SVT, MachineMemOperand *MMO,
1523                                  bool IsCompressing = false);
1524 
1525   SDValue getGatherVP(SDVTList VTs, EVT VT, const SDLoc &dl,
1526                       ArrayRef<SDValue> Ops, MachineMemOperand *MMO,
1527                       ISD::MemIndexType IndexType);
1528   SDValue getScatterVP(SDVTList VTs, EVT VT, const SDLoc &dl,
1529                        ArrayRef<SDValue> Ops, MachineMemOperand *MMO,
1530                        ISD::MemIndexType IndexType);
1531 
1532   SDValue getMaskedLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Base,
1533                         SDValue Offset, SDValue Mask, SDValue Src0, EVT MemVT,
1534                         MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1535                         ISD::LoadExtType, bool IsExpanding = false);
1536   SDValue getIndexedMaskedLoad(SDValue OrigLoad, const SDLoc &dl, SDValue Base,
1537                                SDValue Offset, ISD::MemIndexedMode AM);
1538   SDValue getMaskedStore(SDValue Chain, const SDLoc &dl, SDValue Val,
1539                          SDValue Base, SDValue Offset, SDValue Mask, EVT MemVT,
1540                          MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1541                          bool IsTruncating = false, bool IsCompressing = false);
1542   SDValue getIndexedMaskedStore(SDValue OrigStore, const SDLoc &dl,
1543                                 SDValue Base, SDValue Offset,
1544                                 ISD::MemIndexedMode AM);
1545   SDValue getMaskedGather(SDVTList VTs, EVT MemVT, const SDLoc &dl,
1546                           ArrayRef<SDValue> Ops, MachineMemOperand *MMO,
1547                           ISD::MemIndexType IndexType, ISD::LoadExtType ExtTy);
1548   SDValue getMaskedScatter(SDVTList VTs, EVT MemVT, const SDLoc &dl,
1549                            ArrayRef<SDValue> Ops, MachineMemOperand *MMO,
1550                            ISD::MemIndexType IndexType,
1551                            bool IsTruncating = false);
1552   SDValue getMaskedHistogram(SDVTList VTs, EVT MemVT, const SDLoc &dl,
1553                              ArrayRef<SDValue> Ops, MachineMemOperand *MMO,
1554                              ISD::MemIndexType IndexType);
1555 
1556   SDValue getGetFPEnv(SDValue Chain, const SDLoc &dl, SDValue Ptr, EVT MemVT,
1557                       MachineMemOperand *MMO);
1558   SDValue getSetFPEnv(SDValue Chain, const SDLoc &dl, SDValue Ptr, EVT MemVT,
1559                       MachineMemOperand *MMO);
1560 
1561   /// Construct a node to track a Value* through the backend.
1562   SDValue getSrcValue(const Value *v);
1563 
1564   /// Return an MDNodeSDNode which holds an MDNode.
1565   SDValue getMDNode(const MDNode *MD);
1566 
1567   /// Return a bitcast using the SDLoc of the value operand, and casting to the
1568   /// provided type. Use getNode to set a custom SDLoc.
1569   SDValue getBitcast(EVT VT, SDValue V);
1570 
1571   /// Return an AddrSpaceCastSDNode.
1572   SDValue getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr, unsigned SrcAS,
1573                            unsigned DestAS);
1574 
1575   /// Return a freeze using the SDLoc of the value operand.
1576   SDValue getFreeze(SDValue V);
1577 
1578   /// Return an AssertAlignSDNode.
1579   SDValue getAssertAlign(const SDLoc &DL, SDValue V, Align A);
1580 
1581   /// Swap N1 and N2 if Opcode is a commutative binary opcode
1582   /// and the canonical form expects the opposite order.
1583   void canonicalizeCommutativeBinop(unsigned Opcode, SDValue &N1,
1584                                     SDValue &N2) const;
1585 
1586   /// Return the specified value casted to
1587   /// the target's desired shift amount type.
1588   SDValue getShiftAmountOperand(EVT LHSTy, SDValue Op);
1589 
1590   /// Expand the specified \c ISD::VAARG node as the Legalize pass would.
1591   SDValue expandVAArg(SDNode *Node);
1592 
1593   /// Expand the specified \c ISD::VACOPY node as the Legalize pass would.
1594   SDValue expandVACopy(SDNode *Node);
1595 
1596   /// Return a GlobalAddress of the function from the current module with
1597   /// name matching the given ExternalSymbol. Additionally can provide the
1598   /// matched function.
1599   /// Panic if the function doesn't exist.
1600   SDValue getSymbolFunctionGlobalAddress(SDValue Op,
1601                                          Function **TargetFunction = nullptr);
1602 
1603   /// *Mutate* the specified node in-place to have the
1604   /// specified operands.  If the resultant node already exists in the DAG,
1605   /// this does not modify the specified node, instead it returns the node that
1606   /// already exists.  If the resultant node does not exist in the DAG, the
1607   /// input node is returned.  As a degenerate case, if you specify the same
1608   /// input operands as the node already has, the input node is returned.
1609   SDNode *UpdateNodeOperands(SDNode *N, SDValue Op);
1610   SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2);
1611   SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
1612                                SDValue Op3);
1613   SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
1614                                SDValue Op3, SDValue Op4);
1615   SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
1616                                SDValue Op3, SDValue Op4, SDValue Op5);
1617   SDNode *UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops);
1618 
1619   /// Creates a new TokenFactor containing \p Vals. If \p Vals contains 64k
1620   /// values or more, move values into new TokenFactors in 64k-1 blocks, until
1621   /// the final TokenFactor has less than 64k operands.
1622   SDValue getTokenFactor(const SDLoc &DL, SmallVectorImpl<SDValue> &Vals);
1623 
1624   /// *Mutate* the specified machine node's memory references to the provided
1625   /// list.
1626   void setNodeMemRefs(MachineSDNode *N,
1627                       ArrayRef<MachineMemOperand *> NewMemRefs);
1628 
1629   // Calculate divergence of node \p N based on its operands.
1630   bool calculateDivergence(SDNode *N);
1631 
1632   // Propagates the change in divergence to users
1633   void updateDivergence(SDNode * N);
1634 
1635   /// These are used for target selectors to *mutate* the
1636   /// specified node to have the specified return type, Target opcode, and
1637   /// operands.  Note that target opcodes are stored as
1638   /// ~TargetOpcode in the node opcode field.  The resultant node is returned.
1639   SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT);
1640   SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1);
1641   SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
1642                        SDValue Op1, SDValue Op2);
1643   SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
1644                        SDValue Op1, SDValue Op2, SDValue Op3);
1645   SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
1646                        ArrayRef<SDValue> Ops);
1647   SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2);
1648   SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1649                        EVT VT2, ArrayRef<SDValue> Ops);
1650   SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1651                        EVT VT2, EVT VT3, ArrayRef<SDValue> Ops);
1652   SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1653                        EVT VT2, SDValue Op1, SDValue Op2);
1654   SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, SDVTList VTs,
1655                        ArrayRef<SDValue> Ops);
1656 
1657   /// This *mutates* the specified node to have the specified
1658   /// return type, opcode, and operands.
1659   SDNode *MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs,
1660                       ArrayRef<SDValue> Ops);
1661 
1662   /// Mutate the specified strict FP node to its non-strict equivalent,
1663   /// unlinking the node from its chain and dropping the metadata arguments.
1664   /// The node must be a strict FP node.
1665   SDNode *mutateStrictFPToFP(SDNode *Node);
1666 
1667   /// These are used for target selectors to create a new node
1668   /// with specified return type(s), MachineInstr opcode, and operands.
1669   ///
1670   /// Note that getMachineNode returns the resultant node.  If there is already
1671   /// a node of the specified opcode and operands, it returns that node instead
1672   /// of the current one.
1673   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
1674   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
1675                                 SDValue Op1);
1676   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
1677                                 SDValue Op1, SDValue Op2);
1678   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
1679                                 SDValue Op1, SDValue Op2, SDValue Op3);
1680   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
1681                                 ArrayRef<SDValue> Ops);
1682   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
1683                                 EVT VT2, SDValue Op1, SDValue Op2);
1684   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
1685                                 EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
1686   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
1687                                 EVT VT2, ArrayRef<SDValue> Ops);
1688   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
1689                                 EVT VT2, EVT VT3, SDValue Op1, SDValue Op2);
1690   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
1691                                 EVT VT2, EVT VT3, SDValue Op1, SDValue Op2,
1692                                 SDValue Op3);
1693   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
1694                                 EVT VT2, EVT VT3, ArrayRef<SDValue> Ops);
1695   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
1696                                 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops);
1697   MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
1698                                 ArrayRef<SDValue> Ops);
1699 
1700   /// A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes.
1701   SDValue getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT,
1702                                  SDValue Operand);
1703 
1704   /// A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes.
1705   SDValue getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT,
1706                                 SDValue Operand, SDValue Subreg);
1707 
1708   /// Get the specified node if it's already available, or else return NULL.
1709   SDNode *getNodeIfExists(unsigned Opcode, SDVTList VTList,
1710                           ArrayRef<SDValue> Ops, const SDNodeFlags Flags);
1711   SDNode *getNodeIfExists(unsigned Opcode, SDVTList VTList,
1712                           ArrayRef<SDValue> Ops);
1713 
1714   /// Check if a node exists without modifying its flags.
1715   bool doesNodeExist(unsigned Opcode, SDVTList VTList, ArrayRef<SDValue> Ops);
1716 
1717   /// Creates a SDDbgValue node.
1718   SDDbgValue *getDbgValue(DIVariable *Var, DIExpression *Expr, SDNode *N,
1719                           unsigned R, bool IsIndirect, const DebugLoc &DL,
1720                           unsigned O);
1721 
1722   /// Creates a constant SDDbgValue node.
1723   SDDbgValue *getConstantDbgValue(DIVariable *Var, DIExpression *Expr,
1724                                   const Value *C, const DebugLoc &DL,
1725                                   unsigned O);
1726 
1727   /// Creates a FrameIndex SDDbgValue node.
1728   SDDbgValue *getFrameIndexDbgValue(DIVariable *Var, DIExpression *Expr,
1729                                     unsigned FI, bool IsIndirect,
1730                                     const DebugLoc &DL, unsigned O);
1731 
1732   /// Creates a FrameIndex SDDbgValue node.
1733   SDDbgValue *getFrameIndexDbgValue(DIVariable *Var, DIExpression *Expr,
1734                                     unsigned FI,
1735                                     ArrayRef<SDNode *> Dependencies,
1736                                     bool IsIndirect, const DebugLoc &DL,
1737                                     unsigned O);
1738 
1739   /// Creates a VReg SDDbgValue node.
1740   SDDbgValue *getVRegDbgValue(DIVariable *Var, DIExpression *Expr,
1741                               unsigned VReg, bool IsIndirect,
1742                               const DebugLoc &DL, unsigned O);
1743 
1744   /// Creates a SDDbgValue node from a list of locations.
1745   SDDbgValue *getDbgValueList(DIVariable *Var, DIExpression *Expr,
1746                               ArrayRef<SDDbgOperand> Locs,
1747                               ArrayRef<SDNode *> Dependencies, bool IsIndirect,
1748                               const DebugLoc &DL, unsigned O, bool IsVariadic);
1749 
1750   /// Creates a SDDbgLabel node.
1751   SDDbgLabel *getDbgLabel(DILabel *Label, const DebugLoc &DL, unsigned O);
1752 
1753   /// Transfer debug values from one node to another, while optionally
1754   /// generating fragment expressions for split-up values. If \p InvalidateDbg
1755   /// is set, debug values are invalidated after they are transferred.
1756   void transferDbgValues(SDValue From, SDValue To, unsigned OffsetInBits = 0,
1757                          unsigned SizeInBits = 0, bool InvalidateDbg = true);
1758 
1759   /// Remove the specified node from the system. If any of its
1760   /// operands then becomes dead, remove them as well. Inform UpdateListener
1761   /// for each node deleted.
1762   void RemoveDeadNode(SDNode *N);
1763 
1764   /// This method deletes the unreachable nodes in the
1765   /// given list, and any nodes that become unreachable as a result.
1766   void RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes);
1767 
1768   /// Modify anything using 'From' to use 'To' instead.
1769   /// This can cause recursive merging of nodes in the DAG.  Use the first
1770   /// version if 'From' is known to have a single result, use the second
1771   /// if you have two nodes with identical results (or if 'To' has a superset
1772   /// of the results of 'From'), use the third otherwise.
1773   ///
1774   /// These methods all take an optional UpdateListener, which (if not null) is
1775   /// informed about nodes that are deleted and modified due to recursive
1776   /// changes in the dag.
1777   ///
1778   /// These functions only replace all existing uses. It's possible that as
1779   /// these replacements are being performed, CSE may cause the From node
1780   /// to be given new uses. These new uses of From are left in place, and
1781   /// not automatically transferred to To.
1782   ///
1783   void ReplaceAllUsesWith(SDValue From, SDValue To);
1784   void ReplaceAllUsesWith(SDNode *From, SDNode *To);
1785   void ReplaceAllUsesWith(SDNode *From, const SDValue *To);
1786 
1787   /// Replace any uses of From with To, leaving
1788   /// uses of other values produced by From.getNode() alone.
1789   void ReplaceAllUsesOfValueWith(SDValue From, SDValue To);
1790 
1791   /// Like ReplaceAllUsesOfValueWith, but for multiple values at once.
1792   /// This correctly handles the case where
1793   /// there is an overlap between the From values and the To values.
1794   void ReplaceAllUsesOfValuesWith(const SDValue *From, const SDValue *To,
1795                                   unsigned Num);
1796 
1797   /// If an existing load has uses of its chain, create a token factor node with
1798   /// that chain and the new memory node's chain and update users of the old
1799   /// chain to the token factor. This ensures that the new memory node will have
1800   /// the same relative memory dependency position as the old load. Returns the
1801   /// new merged load chain.
1802   SDValue makeEquivalentMemoryOrdering(SDValue OldChain, SDValue NewMemOpChain);
1803 
1804   /// If an existing load has uses of its chain, create a token factor node with
1805   /// that chain and the new memory node's chain and update users of the old
1806   /// chain to the token factor. This ensures that the new memory node will have
1807   /// the same relative memory dependency position as the old load. Returns the
1808   /// new merged load chain.
1809   SDValue makeEquivalentMemoryOrdering(LoadSDNode *OldLoad, SDValue NewMemOp);
1810 
1811   /// Topological-sort the AllNodes list and a
1812   /// assign a unique node id for each node in the DAG based on their
1813   /// topological order. Returns the number of nodes.
1814   unsigned AssignTopologicalOrder();
1815 
1816   /// Move node N in the AllNodes list to be immediately
1817   /// before the given iterator Position. This may be used to update the
1818   /// topological ordering when the list of nodes is modified.
1819   void RepositionNode(allnodes_iterator Position, SDNode *N) {
1820     AllNodes.insert(Position, AllNodes.remove(N));
1821   }
1822 
1823   /// Returns an APFloat semantics tag appropriate for the given type. If VT is
1824   /// a vector type, the element semantics are returned.
1825   static const fltSemantics &EVTToAPFloatSemantics(EVT VT) {
1826     switch (VT.getScalarType().getSimpleVT().SimpleTy) {
1827     default: llvm_unreachable("Unknown FP format");
1828     case MVT::f16:     return APFloat::IEEEhalf();
1829     case MVT::bf16:    return APFloat::BFloat();
1830     case MVT::f32:     return APFloat::IEEEsingle();
1831     case MVT::f64:     return APFloat::IEEEdouble();
1832     case MVT::f80:     return APFloat::x87DoubleExtended();
1833     case MVT::f128:    return APFloat::IEEEquad();
1834     case MVT::ppcf128: return APFloat::PPCDoubleDouble();
1835     }
1836   }
1837 
1838   /// Add a dbg_value SDNode. If SD is non-null that means the
1839   /// value is produced by SD.
1840   void AddDbgValue(SDDbgValue *DB, bool isParameter);
1841 
1842   /// Add a dbg_label SDNode.
1843   void AddDbgLabel(SDDbgLabel *DB);
1844 
1845   /// Get the debug values which reference the given SDNode.
1846   ArrayRef<SDDbgValue*> GetDbgValues(const SDNode* SD) const {
1847     return DbgInfo->getSDDbgValues(SD);
1848   }
1849 
1850 public:
1851   /// Return true if there are any SDDbgValue nodes associated
1852   /// with this SelectionDAG.
1853   bool hasDebugValues() const { return !DbgInfo->empty(); }
1854 
1855   SDDbgInfo::DbgIterator DbgBegin() const { return DbgInfo->DbgBegin(); }
1856   SDDbgInfo::DbgIterator DbgEnd() const  { return DbgInfo->DbgEnd(); }
1857 
1858   SDDbgInfo::DbgIterator ByvalParmDbgBegin() const {
1859     return DbgInfo->ByvalParmDbgBegin();
1860   }
1861   SDDbgInfo::DbgIterator ByvalParmDbgEnd() const {
1862     return DbgInfo->ByvalParmDbgEnd();
1863   }
1864 
1865   SDDbgInfo::DbgLabelIterator DbgLabelBegin() const {
1866     return DbgInfo->DbgLabelBegin();
1867   }
1868   SDDbgInfo::DbgLabelIterator DbgLabelEnd() const {
1869     return DbgInfo->DbgLabelEnd();
1870   }
1871 
1872   /// To be invoked on an SDNode that is slated to be erased. This
1873   /// function mirrors \c llvm::salvageDebugInfo.
1874   void salvageDebugInfo(SDNode &N);
1875 
1876   void dump() const;
1877 
1878   /// In most cases this function returns the ABI alignment for a given type,
1879   /// except for illegal vector types where the alignment exceeds that of the
1880   /// stack. In such cases we attempt to break the vector down to a legal type
1881   /// and return the ABI alignment for that instead.
1882   Align getReducedAlign(EVT VT, bool UseABI);
1883 
1884   /// Create a stack temporary based on the size in bytes and the alignment
1885   SDValue CreateStackTemporary(TypeSize Bytes, Align Alignment);
1886 
1887   /// Create a stack temporary, suitable for holding the specified value type.
1888   /// If minAlign is specified, the slot size will have at least that alignment.
1889   SDValue CreateStackTemporary(EVT VT, unsigned minAlign = 1);
1890 
1891   /// Create a stack temporary suitable for holding either of the specified
1892   /// value types.
1893   SDValue CreateStackTemporary(EVT VT1, EVT VT2);
1894 
1895   SDValue FoldSymbolOffset(unsigned Opcode, EVT VT,
1896                            const GlobalAddressSDNode *GA,
1897                            const SDNode *N2);
1898 
1899   SDValue FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL, EVT VT,
1900                                  ArrayRef<SDValue> Ops,
1901                                  SDNodeFlags Flags = SDNodeFlags());
1902 
1903   /// Fold floating-point operations when all operands are constants and/or
1904   /// undefined.
1905   SDValue foldConstantFPMath(unsigned Opcode, const SDLoc &DL, EVT VT,
1906                              ArrayRef<SDValue> Ops);
1907 
1908   /// Constant fold a setcc to true or false.
1909   SDValue FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond,
1910                     const SDLoc &dl);
1911 
1912   /// Return true if the sign bit of Op is known to be zero.
1913   /// We use this predicate to simplify operations downstream.
1914   bool SignBitIsZero(SDValue Op, unsigned Depth = 0) const;
1915 
1916   /// Return true if 'Op & Mask' is known to be zero.  We
1917   /// use this predicate to simplify operations downstream.  Op and Mask are
1918   /// known to be the same type.
1919   bool MaskedValueIsZero(SDValue Op, const APInt &Mask,
1920                          unsigned Depth = 0) const;
1921 
1922   /// Return true if 'Op & Mask' is known to be zero in DemandedElts.  We
1923   /// use this predicate to simplify operations downstream.  Op and Mask are
1924   /// known to be the same type.
1925   bool MaskedValueIsZero(SDValue Op, const APInt &Mask,
1926                          const APInt &DemandedElts, unsigned Depth = 0) const;
1927 
1928   /// Return true if 'Op' is known to be zero in DemandedElts.  We
1929   /// use this predicate to simplify operations downstream.
1930   bool MaskedVectorIsZero(SDValue Op, const APInt &DemandedElts,
1931                           unsigned Depth = 0) const;
1932 
1933   /// Return true if '(Op & Mask) == Mask'.
1934   /// Op and Mask are known to be the same type.
1935   bool MaskedValueIsAllOnes(SDValue Op, const APInt &Mask,
1936                             unsigned Depth = 0) const;
1937 
1938   /// For each demanded element of a vector, see if it is known to be zero.
1939   APInt computeVectorKnownZeroElements(SDValue Op, const APInt &DemandedElts,
1940                                        unsigned Depth = 0) const;
1941 
1942   /// Determine which bits of Op are known to be either zero or one and return
1943   /// them in Known. For vectors, the known bits are those that are shared by
1944   /// every vector element.
1945   /// Targets can implement the computeKnownBitsForTargetNode method in the
1946   /// TargetLowering class to allow target nodes to be understood.
1947   KnownBits computeKnownBits(SDValue Op, unsigned Depth = 0) const;
1948 
1949   /// Determine which bits of Op are known to be either zero or one and return
1950   /// them in Known. The DemandedElts argument allows us to only collect the
1951   /// known bits that are shared by the requested vector elements.
1952   /// Targets can implement the computeKnownBitsForTargetNode method in the
1953   /// TargetLowering class to allow target nodes to be understood.
1954   KnownBits computeKnownBits(SDValue Op, const APInt &DemandedElts,
1955                              unsigned Depth = 0) const;
1956 
1957   /// Used to represent the possible overflow behavior of an operation.
1958   /// Never: the operation cannot overflow.
1959   /// Always: the operation will always overflow.
1960   /// Sometime: the operation may or may not overflow.
1961   enum OverflowKind {
1962     OFK_Never,
1963     OFK_Sometime,
1964     OFK_Always,
1965   };
1966 
1967   /// Determine if the result of the signed addition of 2 nodes can overflow.
1968   OverflowKind computeOverflowForSignedAdd(SDValue N0, SDValue N1) const;
1969 
1970   /// Determine if the result of the unsigned addition of 2 nodes can overflow.
1971   OverflowKind computeOverflowForUnsignedAdd(SDValue N0, SDValue N1) const;
1972 
1973   /// Determine if the result of the addition of 2 nodes can overflow.
1974   OverflowKind computeOverflowForAdd(bool IsSigned, SDValue N0,
1975                                      SDValue N1) const {
1976     return IsSigned ? computeOverflowForSignedAdd(N0, N1)
1977                     : computeOverflowForUnsignedAdd(N0, N1);
1978   }
1979 
1980   /// Determine if the result of the addition of 2 nodes can never overflow.
1981   bool willNotOverflowAdd(bool IsSigned, SDValue N0, SDValue N1) const {
1982     return computeOverflowForAdd(IsSigned, N0, N1) == OFK_Never;
1983   }
1984 
1985   /// Determine if the result of the signed sub of 2 nodes can overflow.
1986   OverflowKind computeOverflowForSignedSub(SDValue N0, SDValue N1) const;
1987 
1988   /// Determine if the result of the unsigned sub of 2 nodes can overflow.
1989   OverflowKind computeOverflowForUnsignedSub(SDValue N0, SDValue N1) const;
1990 
1991   /// Determine if the result of the sub of 2 nodes can overflow.
1992   OverflowKind computeOverflowForSub(bool IsSigned, SDValue N0,
1993                                      SDValue N1) const {
1994     return IsSigned ? computeOverflowForSignedSub(N0, N1)
1995                     : computeOverflowForUnsignedSub(N0, N1);
1996   }
1997 
1998   /// Determine if the result of the sub of 2 nodes can never overflow.
1999   bool willNotOverflowSub(bool IsSigned, SDValue N0, SDValue N1) const {
2000     return computeOverflowForSub(IsSigned, N0, N1) == OFK_Never;
2001   }
2002 
2003   /// Determine if the result of the signed mul of 2 nodes can overflow.
2004   OverflowKind computeOverflowForSignedMul(SDValue N0, SDValue N1) const;
2005 
2006   /// Determine if the result of the unsigned mul of 2 nodes can overflow.
2007   OverflowKind computeOverflowForUnsignedMul(SDValue N0, SDValue N1) const;
2008 
2009   /// Determine if the result of the mul of 2 nodes can overflow.
2010   OverflowKind computeOverflowForMul(bool IsSigned, SDValue N0,
2011                                      SDValue N1) const {
2012     return IsSigned ? computeOverflowForSignedMul(N0, N1)
2013                     : computeOverflowForUnsignedMul(N0, N1);
2014   }
2015 
2016   /// Determine if the result of the mul of 2 nodes can never overflow.
2017   bool willNotOverflowMul(bool IsSigned, SDValue N0, SDValue N1) const {
2018     return computeOverflowForMul(IsSigned, N0, N1) == OFK_Never;
2019   }
2020 
2021   /// Test if the given value is known to have exactly one bit set. This differs
2022   /// from computeKnownBits in that it doesn't necessarily determine which bit
2023   /// is set.
2024   bool isKnownToBeAPowerOfTwo(SDValue Val, unsigned Depth = 0) const;
2025 
2026   /// Test if the given _fp_ value is known to be an integer power-of-2, either
2027   /// positive or negative.
2028   bool isKnownToBeAPowerOfTwoFP(SDValue Val, unsigned Depth = 0) const;
2029 
2030   /// Return the number of times the sign bit of the register is replicated into
2031   /// the other bits. We know that at least 1 bit is always equal to the sign
2032   /// bit (itself), but other cases can give us information. For example,
2033   /// immediately after an "SRA X, 2", we know that the top 3 bits are all equal
2034   /// to each other, so we return 3. Targets can implement the
2035   /// ComputeNumSignBitsForTarget method in the TargetLowering class to allow
2036   /// target nodes to be understood.
2037   unsigned ComputeNumSignBits(SDValue Op, unsigned Depth = 0) const;
2038 
2039   /// Return the number of times the sign bit of the register is replicated into
2040   /// the other bits. We know that at least 1 bit is always equal to the sign
2041   /// bit (itself), but other cases can give us information. For example,
2042   /// immediately after an "SRA X, 2", we know that the top 3 bits are all equal
2043   /// to each other, so we return 3. The DemandedElts argument allows
2044   /// us to only collect the minimum sign bits of the requested vector elements.
2045   /// Targets can implement the ComputeNumSignBitsForTarget method in the
2046   /// TargetLowering class to allow target nodes to be understood.
2047   unsigned ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
2048                               unsigned Depth = 0) const;
2049 
2050   /// Get the upper bound on bit size for this Value \p Op as a signed integer.
2051   /// i.e.  x == sext(trunc(x to MaxSignedBits) to bitwidth(x)).
2052   /// Similar to the APInt::getSignificantBits function.
2053   /// Helper wrapper to ComputeNumSignBits.
2054   unsigned ComputeMaxSignificantBits(SDValue Op, unsigned Depth = 0) const;
2055 
2056   /// Get the upper bound on bit size for this Value \p Op as a signed integer.
2057   /// i.e.  x == sext(trunc(x to MaxSignedBits) to bitwidth(x)).
2058   /// Similar to the APInt::getSignificantBits function.
2059   /// Helper wrapper to ComputeNumSignBits.
2060   unsigned ComputeMaxSignificantBits(SDValue Op, const APInt &DemandedElts,
2061                                      unsigned Depth = 0) const;
2062 
2063   /// Return true if this function can prove that \p Op is never poison
2064   /// and, if \p PoisonOnly is false, does not have undef bits.
2065   bool isGuaranteedNotToBeUndefOrPoison(SDValue Op, bool PoisonOnly = false,
2066                                         unsigned Depth = 0) const;
2067 
2068   /// Return true if this function can prove that \p Op is never poison
2069   /// and, if \p PoisonOnly is false, does not have undef bits. The DemandedElts
2070   /// argument limits the check to the requested vector elements.
2071   bool isGuaranteedNotToBeUndefOrPoison(SDValue Op, const APInt &DemandedElts,
2072                                         bool PoisonOnly = false,
2073                                         unsigned Depth = 0) const;
2074 
2075   /// Return true if this function can prove that \p Op is never poison.
2076   bool isGuaranteedNotToBePoison(SDValue Op, unsigned Depth = 0) const {
2077     return isGuaranteedNotToBeUndefOrPoison(Op, /*PoisonOnly*/ true, Depth);
2078   }
2079 
2080   /// Return true if this function can prove that \p Op is never poison. The
2081   /// DemandedElts argument limits the check to the requested vector elements.
2082   bool isGuaranteedNotToBePoison(SDValue Op, const APInt &DemandedElts,
2083                                  unsigned Depth = 0) const {
2084     return isGuaranteedNotToBeUndefOrPoison(Op, DemandedElts,
2085                                             /*PoisonOnly*/ true, Depth);
2086   }
2087 
2088   /// Return true if Op can create undef or poison from non-undef & non-poison
2089   /// operands. The DemandedElts argument limits the check to the requested
2090   /// vector elements.
2091   ///
2092   /// \p ConsiderFlags controls whether poison producing flags on the
2093   /// instruction are considered.  This can be used to see if the instruction
2094   /// could still introduce undef or poison even without poison generating flags
2095   /// which might be on the instruction.  (i.e. could the result of
2096   /// Op->dropPoisonGeneratingFlags() still create poison or undef)
2097   bool canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
2098                               bool PoisonOnly = false,
2099                               bool ConsiderFlags = true,
2100                               unsigned Depth = 0) const;
2101 
2102   /// Return true if Op can create undef or poison from non-undef & non-poison
2103   /// operands.
2104   ///
2105   /// \p ConsiderFlags controls whether poison producing flags on the
2106   /// instruction are considered.  This can be used to see if the instruction
2107   /// could still introduce undef or poison even without poison generating flags
2108   /// which might be on the instruction.  (i.e. could the result of
2109   /// Op->dropPoisonGeneratingFlags() still create poison or undef)
2110   bool canCreateUndefOrPoison(SDValue Op, bool PoisonOnly = false,
2111                               bool ConsiderFlags = true,
2112                               unsigned Depth = 0) const;
2113 
2114   /// Return true if the specified operand is an ISD::OR or ISD::XOR node
2115   /// that can be treated as an ISD::ADD node.
2116   /// or(x,y) == add(x,y) iff haveNoCommonBitsSet(x,y)
2117   /// xor(x,y) == add(x,y) iff isMinSignedConstant(y) && !NoWrap
2118   /// If \p NoWrap is true, this will not match ISD::XOR.
2119   bool isADDLike(SDValue Op, bool NoWrap = false) const;
2120 
2121   /// Return true if the specified operand is an ISD::ADD with a ConstantSDNode
2122   /// on the right-hand side, or if it is an ISD::OR with a ConstantSDNode that
2123   /// is guaranteed to have the same semantics as an ADD. This handles the
2124   /// equivalence:
2125   ///     X|Cst == X+Cst iff X&Cst = 0.
2126   bool isBaseWithConstantOffset(SDValue Op) const;
2127 
2128   /// Test whether the given SDValue (or all elements of it, if it is a
2129   /// vector) is known to never be NaN. If \p SNaN is true, returns if \p Op is
2130   /// known to never be a signaling NaN (it may still be a qNaN).
2131   bool isKnownNeverNaN(SDValue Op, bool SNaN = false, unsigned Depth = 0) const;
2132 
2133   /// \returns true if \p Op is known to never be a signaling NaN.
2134   bool isKnownNeverSNaN(SDValue Op, unsigned Depth = 0) const {
2135     return isKnownNeverNaN(Op, true, Depth);
2136   }
2137 
2138   /// Test whether the given floating point SDValue is known to never be
2139   /// positive or negative zero.
2140   bool isKnownNeverZeroFloat(SDValue Op) const;
2141 
2142   /// Test whether the given SDValue is known to contain non-zero value(s).
2143   bool isKnownNeverZero(SDValue Op, unsigned Depth = 0) const;
2144 
2145   /// Test whether the given float value is known to be positive. +0.0, +inf and
2146   /// +nan are considered positive, -0.0, -inf and -nan are not.
2147   bool cannotBeOrderedNegativeFP(SDValue Op) const;
2148 
2149   /// Test whether two SDValues are known to compare equal. This
2150   /// is true if they are the same value, or if one is negative zero and the
2151   /// other positive zero.
2152   bool isEqualTo(SDValue A, SDValue B) const;
2153 
2154   /// Return true if A and B have no common bits set. As an example, this can
2155   /// allow an 'add' to be transformed into an 'or'.
2156   bool haveNoCommonBitsSet(SDValue A, SDValue B) const;
2157 
2158   /// Test whether \p V has a splatted value for all the demanded elements.
2159   ///
2160   /// On success \p UndefElts will indicate the elements that have UNDEF
2161   /// values instead of the splat value, this is only guaranteed to be correct
2162   /// for \p DemandedElts.
2163   ///
2164   /// NOTE: The function will return true for a demanded splat of UNDEF values.
2165   bool isSplatValue(SDValue V, const APInt &DemandedElts, APInt &UndefElts,
2166                     unsigned Depth = 0) const;
2167 
2168   /// Test whether \p V has a splatted value.
2169   bool isSplatValue(SDValue V, bool AllowUndefs = false) const;
2170 
2171   /// If V is a splatted value, return the source vector and its splat index.
2172   SDValue getSplatSourceVector(SDValue V, int &SplatIndex);
2173 
2174   /// If V is a splat vector, return its scalar source operand by extracting
2175   /// that element from the source vector. If LegalTypes is true, this method
2176   /// may only return a legally-typed splat value. If it cannot legalize the
2177   /// splatted value it will return SDValue().
2178   SDValue getSplatValue(SDValue V, bool LegalTypes = false);
2179 
2180   /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the
2181   /// element bit-width of the shift node, return the valid constant range.
2182   std::optional<ConstantRange>
2183   getValidShiftAmountRange(SDValue V, const APInt &DemandedElts,
2184                            unsigned Depth) const;
2185 
2186   /// If a SHL/SRA/SRL node \p V has a uniform shift amount
2187   /// that is less than the element bit-width of the shift node, return it.
2188   std::optional<uint64_t> getValidShiftAmount(SDValue V,
2189                                               const APInt &DemandedElts,
2190                                               unsigned Depth = 0) const;
2191 
2192   /// If a SHL/SRA/SRL node \p V has a uniform shift amount
2193   /// that is less than the element bit-width of the shift node, return it.
2194   std::optional<uint64_t> getValidShiftAmount(SDValue V,
2195                                               unsigned Depth = 0) const;
2196 
2197   /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the
2198   /// element bit-width of the shift node, return the minimum possible value.
2199   std::optional<uint64_t> getValidMinimumShiftAmount(SDValue V,
2200                                                      const APInt &DemandedElts,
2201                                                      unsigned Depth = 0) const;
2202 
2203   /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the
2204   /// element bit-width of the shift node, return the minimum possible value.
2205   std::optional<uint64_t> getValidMinimumShiftAmount(SDValue V,
2206                                                      unsigned Depth = 0) const;
2207 
2208   /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the
2209   /// element bit-width of the shift node, return the maximum possible value.
2210   std::optional<uint64_t> getValidMaximumShiftAmount(SDValue V,
2211                                                      const APInt &DemandedElts,
2212                                                      unsigned Depth = 0) const;
2213 
2214   /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the
2215   /// element bit-width of the shift node, return the maximum possible value.
2216   std::optional<uint64_t> getValidMaximumShiftAmount(SDValue V,
2217                                                      unsigned Depth = 0) const;
2218 
2219   /// Match a binop + shuffle pyramid that represents a horizontal reduction
2220   /// over the elements of a vector starting from the EXTRACT_VECTOR_ELT node /p
2221   /// Extract. The reduction must use one of the opcodes listed in /p
2222   /// CandidateBinOps and on success /p BinOp will contain the matching opcode.
2223   /// Returns the vector that is being reduced on, or SDValue() if a reduction
2224   /// was not matched. If \p AllowPartials is set then in the case of a
2225   /// reduction pattern that only matches the first few stages, the extracted
2226   /// subvector of the start of the reduction is returned.
2227   SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
2228                               ArrayRef<ISD::NodeType> CandidateBinOps,
2229                               bool AllowPartials = false);
2230 
2231   /// Utility function used by legalize and lowering to
2232   /// "unroll" a vector operation by splitting out the scalars and operating
2233   /// on each element individually.  If the ResNE is 0, fully unroll the vector
2234   /// op. If ResNE is less than the width of the vector op, unroll up to ResNE.
2235   /// If the  ResNE is greater than the width of the vector op, unroll the
2236   /// vector op and fill the end of the resulting vector with UNDEFS.
2237   SDValue UnrollVectorOp(SDNode *N, unsigned ResNE = 0);
2238 
2239   /// Like UnrollVectorOp(), but for the [US](ADD|SUB|MUL)O family of opcodes.
2240   /// This is a separate function because those opcodes have two results.
2241   std::pair<SDValue, SDValue> UnrollVectorOverflowOp(SDNode *N,
2242                                                      unsigned ResNE = 0);
2243 
2244   /// Return true if loads are next to each other and can be
2245   /// merged. Check that both are nonvolatile and if LD is loading
2246   /// 'Bytes' bytes from a location that is 'Dist' units away from the
2247   /// location that the 'Base' load is loading from.
2248   bool areNonVolatileConsecutiveLoads(LoadSDNode *LD, LoadSDNode *Base,
2249                                       unsigned Bytes, int Dist) const;
2250 
2251   /// Infer alignment of a load / store address. Return std::nullopt if it
2252   /// cannot be inferred.
2253   MaybeAlign InferPtrAlign(SDValue Ptr) const;
2254 
2255   /// Split the scalar node with EXTRACT_ELEMENT using the provided VTs and
2256   /// return the low/high part.
2257   std::pair<SDValue, SDValue> SplitScalar(const SDValue &N, const SDLoc &DL,
2258                                           const EVT &LoVT, const EVT &HiVT);
2259 
2260   /// Compute the VTs needed for the low/hi parts of a type
2261   /// which is split (or expanded) into two not necessarily identical pieces.
2262   std::pair<EVT, EVT> GetSplitDestVTs(const EVT &VT) const;
2263 
2264   /// Compute the VTs needed for the low/hi parts of a type, dependent on an
2265   /// enveloping VT that has been split into two identical pieces. Sets the
2266   /// HisIsEmpty flag when hi type has zero storage size.
2267   std::pair<EVT, EVT> GetDependentSplitDestVTs(const EVT &VT, const EVT &EnvVT,
2268                                                bool *HiIsEmpty) const;
2269 
2270   /// Split the vector with EXTRACT_SUBVECTOR using the provided
2271   /// VTs and return the low/high part.
2272   std::pair<SDValue, SDValue> SplitVector(const SDValue &N, const SDLoc &DL,
2273                                           const EVT &LoVT, const EVT &HiVT);
2274 
2275   /// Split the vector with EXTRACT_SUBVECTOR and return the low/high part.
2276   std::pair<SDValue, SDValue> SplitVector(const SDValue &N, const SDLoc &DL) {
2277     EVT LoVT, HiVT;
2278     std::tie(LoVT, HiVT) = GetSplitDestVTs(N.getValueType());
2279     return SplitVector(N, DL, LoVT, HiVT);
2280   }
2281 
2282   /// Split the explicit vector length parameter of a VP operation.
2283   std::pair<SDValue, SDValue> SplitEVL(SDValue N, EVT VecVT, const SDLoc &DL);
2284 
2285   /// Split the node's operand with EXTRACT_SUBVECTOR and
2286   /// return the low/high part.
2287   std::pair<SDValue, SDValue> SplitVectorOperand(const SDNode *N, unsigned OpNo)
2288   {
2289     return SplitVector(N->getOperand(OpNo), SDLoc(N));
2290   }
2291 
2292   /// Widen the vector up to the next power of two using INSERT_SUBVECTOR.
2293   SDValue WidenVector(const SDValue &N, const SDLoc &DL);
2294 
2295   /// Append the extracted elements from Start to Count out of the vector Op in
2296   /// Args. If Count is 0, all of the elements will be extracted. The extracted
2297   /// elements will have type EVT if it is provided, and otherwise their type
2298   /// will be Op's element type.
2299   void ExtractVectorElements(SDValue Op, SmallVectorImpl<SDValue> &Args,
2300                              unsigned Start = 0, unsigned Count = 0,
2301                              EVT EltVT = EVT());
2302 
2303   /// Compute the default alignment value for the given type.
2304   Align getEVTAlign(EVT MemoryVT) const;
2305 
2306   /// Test whether the given value is a constant int or similar node.
2307   SDNode *isConstantIntBuildVectorOrConstantInt(SDValue N) const;
2308 
2309   /// Test whether the given value is a constant FP or similar node.
2310   SDNode *isConstantFPBuildVectorOrConstantFP(SDValue N) const ;
2311 
2312   /// \returns true if \p N is any kind of constant or build_vector of
2313   /// constants, int or float. If a vector, it may not necessarily be a splat.
2314   inline bool isConstantValueOfAnyType(SDValue N) const {
2315     return isConstantIntBuildVectorOrConstantInt(N) ||
2316            isConstantFPBuildVectorOrConstantFP(N);
2317   }
2318 
2319   /// Set CallSiteInfo to be associated with Node.
2320   void addCallSiteInfo(const SDNode *Node, CallSiteInfo &&CallInfo) {
2321     SDEI[Node].CSInfo = std::move(CallInfo);
2322   }
2323   /// Return CallSiteInfo associated with Node, or a default if none exists.
2324   CallSiteInfo getCallSiteInfo(const SDNode *Node) {
2325     auto I = SDEI.find(Node);
2326     return I != SDEI.end() ? std::move(I->second).CSInfo : CallSiteInfo();
2327   }
2328   /// Set HeapAllocSite to be associated with Node.
2329   void addHeapAllocSite(const SDNode *Node, MDNode *MD) {
2330     SDEI[Node].HeapAllocSite = MD;
2331   }
2332   /// Return HeapAllocSite associated with Node, or nullptr if none exists.
2333   MDNode *getHeapAllocSite(const SDNode *Node) const {
2334     auto I = SDEI.find(Node);
2335     return I != SDEI.end() ? I->second.HeapAllocSite : nullptr;
2336   }
2337   /// Set PCSections to be associated with Node.
2338   void addPCSections(const SDNode *Node, MDNode *MD) {
2339     SDEI[Node].PCSections = MD;
2340   }
2341   /// Set MMRAMetadata to be associated with Node.
2342   void addMMRAMetadata(const SDNode *Node, MDNode *MMRA) {
2343     SDEI[Node].MMRA = MMRA;
2344   }
2345   /// Return PCSections associated with Node, or nullptr if none exists.
2346   MDNode *getPCSections(const SDNode *Node) const {
2347     auto It = SDEI.find(Node);
2348     return It != SDEI.end() ? It->second.PCSections : nullptr;
2349   }
2350   /// Return the MMRA MDNode associated with Node, or nullptr if none
2351   /// exists.
2352   MDNode *getMMRAMetadata(const SDNode *Node) const {
2353     auto It = SDEI.find(Node);
2354     return It != SDEI.end() ? It->second.MMRA : nullptr;
2355   }
2356   /// Set NoMergeSiteInfo to be associated with Node if NoMerge is true.
2357   void addNoMergeSiteInfo(const SDNode *Node, bool NoMerge) {
2358     if (NoMerge)
2359       SDEI[Node].NoMerge = NoMerge;
2360   }
2361   /// Return NoMerge info associated with Node.
2362   bool getNoMergeSiteInfo(const SDNode *Node) const {
2363     auto I = SDEI.find(Node);
2364     return I != SDEI.end() ? I->second.NoMerge : false;
2365   }
2366 
2367   /// Copy extra info associated with one node to another.
2368   void copyExtraInfo(SDNode *From, SDNode *To);
2369 
2370   /// Return the current function's default denormal handling kind for the given
2371   /// floating point type.
2372   DenormalMode getDenormalMode(EVT VT) const {
2373     return MF->getDenormalMode(EVTToAPFloatSemantics(VT));
2374   }
2375 
2376   bool shouldOptForSize() const;
2377 
2378   /// Get the (commutative) neutral element for the given opcode, if it exists.
2379   SDValue getNeutralElement(unsigned Opcode, const SDLoc &DL, EVT VT,
2380                             SDNodeFlags Flags);
2381 
2382   /// Some opcodes may create immediate undefined behavior when used with some
2383   /// values (integer division-by-zero for example). Therefore, these operations
2384   /// are not generally safe to move around or change.
2385   bool isSafeToSpeculativelyExecute(unsigned Opcode) const {
2386     switch (Opcode) {
2387     case ISD::SDIV:
2388     case ISD::SREM:
2389     case ISD::SDIVREM:
2390     case ISD::UDIV:
2391     case ISD::UREM:
2392     case ISD::UDIVREM:
2393       return false;
2394     default:
2395       return true;
2396     }
2397   }
2398 
2399   /// Check if the provided node is save to speculatively executed given its
2400   /// current arguments. So, while `udiv` the opcode is not safe to
2401   /// speculatively execute, a given `udiv` node may be if the denominator is
2402   /// known nonzero.
2403   bool isSafeToSpeculativelyExecuteNode(const SDNode *N) const {
2404     switch (N->getOpcode()) {
2405     case ISD::UDIV:
2406       return isKnownNeverZero(N->getOperand(1));
2407     default:
2408       return isSafeToSpeculativelyExecute(N->getOpcode());
2409     }
2410   }
2411 
2412   SDValue makeStateFunctionCall(unsigned LibFunc, SDValue Ptr, SDValue InChain,
2413                                 const SDLoc &DLoc);
2414 
2415 private:
2416   void InsertNode(SDNode *N);
2417   bool RemoveNodeFromCSEMaps(SDNode *N);
2418   void AddModifiedNodeToCSEMaps(SDNode *N);
2419   SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op, void *&InsertPos);
2420   SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op1, SDValue Op2,
2421                                void *&InsertPos);
2422   SDNode *FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
2423                                void *&InsertPos);
2424   SDNode *UpdateSDLocOnMergeSDNode(SDNode *N, const SDLoc &loc);
2425 
2426   void DeleteNodeNotInCSEMaps(SDNode *N);
2427   void DeallocateNode(SDNode *N);
2428 
2429   void allnodes_clear();
2430 
2431   /// Look up the node specified by ID in CSEMap.  If it exists, return it.  If
2432   /// not, return the insertion token that will make insertion faster.  This
2433   /// overload is for nodes other than Constant or ConstantFP, use the other one
2434   /// for those.
2435   SDNode *FindNodeOrInsertPos(const FoldingSetNodeID &ID, void *&InsertPos);
2436 
2437   /// Look up the node specified by ID in CSEMap.  If it exists, return it.  If
2438   /// not, return the insertion token that will make insertion faster.  Performs
2439   /// additional processing for constant nodes.
2440   SDNode *FindNodeOrInsertPos(const FoldingSetNodeID &ID, const SDLoc &DL,
2441                               void *&InsertPos);
2442 
2443   /// Maps to auto-CSE operations.
2444   std::vector<CondCodeSDNode*> CondCodeNodes;
2445 
2446   std::vector<SDNode*> ValueTypeNodes;
2447   std::map<EVT, SDNode*, EVT::compareRawBits> ExtendedValueTypeNodes;
2448   StringMap<SDNode*> ExternalSymbols;
2449 
2450   std::map<std::pair<std::string, unsigned>, SDNode *> TargetExternalSymbols;
2451   DenseMap<MCSymbol *, SDNode *> MCSymbols;
2452 
2453   FlagInserter *Inserter = nullptr;
2454 };
2455 
2456 template <> struct GraphTraits<SelectionDAG*> : public GraphTraits<SDNode*> {
2457   using nodes_iterator = pointer_iterator<SelectionDAG::allnodes_iterator>;
2458 
2459   static nodes_iterator nodes_begin(SelectionDAG *G) {
2460     return nodes_iterator(G->allnodes_begin());
2461   }
2462 
2463   static nodes_iterator nodes_end(SelectionDAG *G) {
2464     return nodes_iterator(G->allnodes_end());
2465   }
2466 };
2467 
2468 } // end namespace llvm
2469 
2470 #endif // LLVM_CODEGEN_SELECTIONDAG_H
2471