| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVVectorPeephole.cpp | 448 Register FalseReg = MI.getOperand(2).getReg(); in convertSameMaskVMergeToVMv() local
722 Register FalseReg = MI.getOperand(2).getReg(); in foldVMergeToMask() local
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| H A D | RISCVInstrInfo.cpp | 1770 MachineOperand FalseReg = MI.getOperand(Invert ? 5 : 4); in optimizeSelect() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CmovConversion.cpp | 729 Register FalseReg = in convertCmovInstsToBranches() local
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| H A D | X86InstrInfo.cpp | 4159 Register FalseReg, int &CondCycles, in canInsertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelperCasts.cpp | 213 Register FalseReg = Select->getFalseReg(); in matchCastOfSelect() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 506 MachineOperand FalseReg = MI.getOperand(Invert ? 1 : 2); in optimizeSelect() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 959 Register TrueReg, Register FalseReg, in canInsertSelect()
983 Register TrueReg, Register FalseReg) const { in insertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 931 Register FalseReg = getRegForValue(Select->getFalseValue()); in selectSelect() local
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| H A D | WebAssemblyISelLowering.cpp | 550 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; in LowerFPToInt() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 790 auto FalseReg = MIB.getReg(3); in selectSelect() local
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| H A D | ARMBaseInstrInfo.cpp | 2198 MachineOperand FalseReg = MI.getOperand(Invert ? 2 : 1); in optimizeSelect() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1521 Register FalseReg, int &CondCycles, in canInsertSelect()
3285 unsigned TrueReg, unsigned FalseReg, in selectReg()
4640 Register FalseReg = CompareUseMI.getOperand(2).getReg(); in simplifyToLI() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 601 Register FalseReg, int &CondCycles, in canInsertSelect()
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| H A D | SystemZISelLowering.cpp | 9581 Register FalseReg = MI->getOperand(2).getReg(); in createPHIsForSelects() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 765 Register FalseReg, int &CondCycles, in canInsertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 3285 Register FalseReg, int &CondCycles, in canInsertSelect()
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