Searched defs:FalseReg (Results 1 – 15 of 15) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVVectorPeephole.cpp | 179 Register FalseReg = MI.getOperand(2).getReg(); in convertVMergeToVMv() local
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| H A D | RISCVInstrInfo.cpp | 1415 MachineOperand FalseReg = MI.getOperand(Invert ? 5 : 4); in optimizeSelect() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CmovConversion.cpp | 732 Register FalseReg = in convertCmovInstsToBranches() local
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| H A D | X86InstrInfo.cpp | 4100 Register FalseReg, int &CondCycles, in canInsertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 505 MachineOperand FalseReg = MI.getOperand(Invert ? 1 : 2); in optimizeSelect() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 936 Register TrueReg, Register FalseReg, in canInsertSelect()
960 Register TrueReg, Register FalseReg) const { in insertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 925 Register FalseReg = getRegForValue(Select->getFalseValue()); in selectSelect() local
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| H A D | WebAssemblyISelLowering.cpp | 503 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; in LowerFPToInt() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 790 auto FalseReg = MIB.getReg(3); in selectSelect() local
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| H A D | ARMBaseInstrInfo.cpp | 2355 MachineOperand FalseReg = MI.getOperand(Invert ? 2 : 1); in optimizeSelect() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1523 Register FalseReg, int &CondCycles, in canInsertSelect()
3254 unsigned TrueReg, unsigned FalseReg, in selectReg()
4609 Register FalseReg = CompareUseMI.getOperand(2).getReg(); in simplifyToLI() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 553 Register FalseReg, int &CondCycles, in canInsertSelect()
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| H A D | SystemZISelLowering.cpp | 8257 Register FalseReg = MI->getOperand(2).getReg(); in createPHIsForSelects() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 705 Register FalseReg, int &CondCycles, in canInsertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 3224 Register FalseReg, int &CondCycles, in canInsertSelect()
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