1 /* SPDX-License-Identifier: BSD-2-Clause AND BSD-3-Clause */ 2 /* $NetBSD: qat_hw15reg.h,v 1.1 2019/11/20 09:37:46 hikaru Exp $ */ 3 4 /* 5 * Copyright (c) 2019 Internet Initiative Japan, Inc. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Copyright(c) 2007-2013 Intel Corporation. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 37 * * Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * * Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in 41 * the documentation and/or other materials provided with the 42 * distribution. 43 * * Neither the name of Intel Corporation nor the names of its 44 * contributors may be used to endorse or promote products derived 45 * from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 48 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 49 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 50 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 51 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 52 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 53 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 54 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 55 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 56 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 57 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 61 #ifndef _DEV_PCI_QAT_HW15REG_H_ 62 #define _DEV_PCI_QAT_HW15REG_H_ 63 64 /* Default message size in bytes */ 65 #define FW_REQ_DEFAULT_SZ_HW15 64 66 #define FW_RESP_DEFAULT_SZ_HW15 64 67 68 #define ADMIN_RING_SIZE 256 69 #define RING_NUM_ADMIN_TX 0 70 #define RING_NUM_ADMIN_RX 1 71 72 /* -------------------------------------------------------------------------- */ 73 /* accel */ 74 75 #define ARCH_IF_FLAGS_VALID_FLAG __BIT(7) 76 #define ARCH_IF_FLAGS_RESP_RING_TYPE __BITS(4, 3) 77 #define ARCH_IF_FLAGS_RESP_RING_TYPE_SHIFT 3 78 #define ARCH_IF_FLAGS_RESP_RING_TYPE_SCRATCH (0 << ARCH_IF_FLAGS_RESP_RING_TYPE_SHIFT) 79 #define ARCH_IF_FLAGS_RESP_RING_TYPE_NN (1 << ARCH_IF_FLAGS_RESP_RING_TYPE_SHIFT) 80 #define ARCH_IF_FLAGS_RESP_RING_TYPE_ET (2 << ARCH_IF_FLAGS_RESP_RING_TYPE_SHIFT) 81 #define ARCH_IF_FLAGS_RESP_TYPE __BITS(2, 0) 82 #define ARCH_IF_FLAGS_RESP_TYPE_SHIFT 0 83 #define ARCH_IF_FLAGS_RESP_TYPE_A (0 << ARCH_IF_FLAGS_RESP_TYPE_SHIFT) 84 #define ARCH_IF_FLAGS_RESP_TYPE_B (1 << ARCH_IF_FLAGS_RESP_TYPE_SHIFT) 85 #define ARCH_IF_FLAGS_RESP_TYPE_C (2 << ARCH_IF_FLAGS_RESP_TYPE_SHIFT) 86 #define ARCH_IF_FLAGS_RESP_TYPE_S (3 << ARCH_IF_FLAGS_RESP_TYPE_SHIFT) 87 88 enum arch_if_req { 89 ARCH_IF_REQ_NULL, /* NULL request type */ 90 91 /* QAT-AE Service Request Type IDs - 01 to 20 */ 92 ARCH_IF_REQ_QAT_FW_INIT, /* QAT-FW Initialization Request */ 93 ARCH_IF_REQ_QAT_FW_ADMIN, /* QAT-FW Administration Request */ 94 ARCH_IF_REQ_QAT_FW_PKE, /* QAT-FW PKE Request */ 95 ARCH_IF_REQ_QAT_FW_LA, /* QAT-FW Lookaside Request */ 96 ARCH_IF_REQ_QAT_FW_IPSEC, /* QAT-FW IPSec Request */ 97 ARCH_IF_REQ_QAT_FW_SSL, /* QAT-FW SSL Request */ 98 ARCH_IF_REQ_QAT_FW_DMA, /* QAT-FW DMA Request */ 99 ARCH_IF_REQ_QAT_FW_STORAGE, /* QAT-FW Storage Request */ 100 ARCH_IF_REQ_QAT_FW_COMPRESS, /* QAT-FW Compression Request */ 101 ARCH_IF_REQ_QAT_FW_PATMATCH, /* QAT-FW Pattern Matching Request */ 102 103 /* IP Service (Range Match and Exception) Blocks Request Type IDs 21 - 30 */ 104 ARCH_IF_REQ_RM_FLOW_MISS = 21, /* RM flow miss request */ 105 ARCH_IF_REQ_RM_FLOW_TIMER_EXP, /* RM flow timer exp Request */ 106 ARCH_IF_REQ_IP_SERVICES_RFC_LOOKUP_UPDATE, /* RFC Lookup request */ 107 ARCH_IF_REQ_IP_SERVICES_CONFIG_UPDATE, /* Config Update request */ 108 ARCH_IF_REQ_IP_SERVICES_FCT_CONFIG, /* FCT Config request */ 109 ARCH_IF_REQ_IP_SERVICES_NEXT_HOP_TIMER_EXPIRY, /* NH Timer expiry request */ 110 ARCH_IF_REQ_IP_SERVICES_EXCEPTION, /* Exception processign request */ 111 ARCH_IF_REQ_IP_SERVICES_STACK_DRIVER, /* Send to SD request */ 112 ARCH_IF_REQ_IP_SERVICES_ACTION_HANDLER, /* Send to AH request */ 113 ARCH_IF_REQ_IP_SERVICES_EVENT_HANDLER, /* Send to EH request */ 114 ARCH_IF_REQ_DELIMITER /* End delimiter */ 115 }; 116 117 struct arch_if_req_hdr { 118 uint8_t resp_dest_id; 119 /* Opaque identifier passed from the request to response to allow 120 * response handler perform any further processing */ 121 uint8_t resp_pipe_id; 122 /* Response pipe to write the response associated with this request to */ 123 uint8_t req_type; 124 /* Definition of the service described by the request */ 125 uint8_t flags; 126 /* Request and response control flags */ 127 }; 128 129 struct arch_if_resp_hdr { 130 uint8_t dest_id; 131 /* Opaque identifier passed from the request to response to allow 132 * response handler perform any further processing */ 133 uint8_t serv_id; 134 /* Definition of the service id generating the response */ 135 uint8_t resp_type; 136 /* Definition of the service described by the request */ 137 uint8_t flags; 138 /* Request and response control flags */ 139 }; 140 141 struct fw_comn_req_hdr { 142 struct arch_if_req_hdr arch_if; 143 /* Common arch fields used by all ICP interface requests. Remaining 144 * fields are specific to the common QAT FW service. */ 145 uint16_t comn_req_flags; 146 /* Flags used to describe common processing required by the request and 147 * the meaning of parameters in it i.e. differentiating between a buffer 148 * descriptor and a flat buffer pointer in the source (src) and destination 149 * (dest) data address fields. Full definition of the fields is given 150 * below */ 151 uint8_t content_desc_params_sz; 152 /* Size of the content descriptor parameters in quad words. These 153 * parameters describe the session setup configuration info for the 154 * slices that this request relies upon i.e. the configuration word and 155 * cipher key needed by the cipher slice if there is a request for cipher 156 * processing. The format of the parameters are contained in icp_qat_hw.h 157 * and vary depending on the algorithm and mode being used. It is the 158 * clients responsibility to ensure this structure is correctly packed */ 159 uint8_t content_desc_hdr_sz; 160 /* Size of the content descriptor header in quad words. This information 161 * is read into the QAT AE xfr registers */ 162 uint64_t content_desc_addr; 163 /* Address of the content descriptor containing both the content header 164 * the size of which is defined by content_desc_hdr_sz followed by the 165 * content parameters whose size is described bycontent_desc_params_sz 166 */ 167 }; 168 169 struct fw_comn_req_mid { 170 uint64_t opaque_data; 171 /* Opaque data passed unmodified from the request to response messages 172 * by firmware (fw) */ 173 uint64_t src_data_addr; 174 /* Generic definition of the source data supplied to the QAT AE. The 175 * common flags are used to further describe the attributes of this 176 * field */ 177 uint64_t dest_data_addr; 178 /* Generic definition of the destination data supplied to the QAT AE. 179 * The common flags are used to further describe the attributes of this 180 * field */ 181 }; 182 183 union fw_comn_req_ftr { 184 uint64_t next_request_addr; 185 /* Overloaded field, for stateful requests, this field is the pointer to 186 next request descriptor */ 187 struct { 188 uint32_t src_length; 189 /* Length of source flat buffer incase src buffer type is flat */ 190 uint32_t dst_length; 191 /* Length of source flat buffer incase dst buffer type is flat */ 192 } s; 193 }; 194 195 union fw_comn_error { 196 struct { 197 uint8_t resrvd; /* 8 bit reserved field */ 198 uint8_t comn_err_code; /**< 8 bit common error code */ 199 } s; 200 /* Structure which is used for non-compression responses */ 201 202 struct { 203 uint8_t xlat_err_code; /* 8 bit translator error field */ 204 uint8_t cmp_err_code; /* 8 bit compression error field */ 205 } s1; 206 /* Structure which is used for compression responses */ 207 }; 208 209 struct fw_comn_resp_hdr { 210 struct arch_if_resp_hdr arch_if; 211 /* Common arch fields used by all ICP interface response messages. The 212 * remaining fields are specific to the QAT FW */ 213 union fw_comn_error comn_error; 214 /* This field is overloaded to allow for one 8 bit common error field 215 * or two 8 bit error fields from compression and translator */ 216 uint8_t comn_status; 217 /* Status field which specifies which slice(s) report an error */ 218 uint8_t serv_cmd_id; 219 /* For services that define multiple commands this field represents the 220 * command. If only 1 command is supported then this field will be 0 */ 221 uint64_t opaque_data; 222 /* Opaque data passed from the request to the response message */ 223 }; 224 225 226 #define RING_MASK_TABLE_ENTRY_LOG_SZ (5) 227 228 #define FW_INIT_RING_MASK_SET(table, id) \ 229 table->firt_ring_mask[id >> RING_MASK_TABLE_ENTRY_LOG_SZ] =\ 230 table->firt_ring_mask[id >> RING_MASK_TABLE_ENTRY_LOG_SZ] | \ 231 (1 << (id & 0x1f)) 232 233 struct fw_init_ring_params { 234 uint8_t firp_curr_weight; /* Current ring weight (working copy), 235 * has to be equal to init_weight */ 236 uint8_t firp_init_weight; /* Initial ring weight: -1 ... 0 237 * -1 is equal to FF, -2 is equal to FE, 238 * the weighting uses negative logic 239 * where FF means poll the ring once, 240 * -2 is poll the ring twice, 241 * 0 is poll the ring 255 times */ 242 uint8_t firp_ring_pvl; /* Ring Privilege Level. */ 243 uint8_t firp_reserved; /* Reserved field which must be set 244 * to 0 by the client */ 245 }; 246 247 #define INIT_RING_TABLE_SZ 128 248 #define INIT_RING_TABLE_LW_SZ 4 249 250 struct fw_init_ring_table { 251 struct fw_init_ring_params firt_bulk_rings[INIT_RING_TABLE_SZ]; 252 /* array of ring parameters */ 253 uint32_t firt_ring_mask[INIT_RING_TABLE_LW_SZ]; 254 /* Structure to hold the bit masks for 255 * 128 rings. */ 256 }; 257 258 struct fw_init_set_ae_info_hdr { 259 uint16_t init_slice_mask; /* Init time flags to set the ownership of the slices */ 260 uint16_t resrvd; /* Reserved field and must be set to 0 by the client */ 261 uint8_t init_qat_id; /* Init time qat id described in the request */ 262 uint8_t init_ring_cluster_id; /* Init time ring cluster Id */ 263 uint8_t init_trgt_id; /* Init time target AE id described in the request */ 264 uint8_t init_cmd_id; /* Init time command that is described in the request */ 265 }; 266 267 struct fw_init_set_ae_info { 268 uint64_t init_shram_mask; /* Init time shram mask to set the page ownership in page pool of AE*/ 269 uint64_t resrvd; /* Reserved field and must be set to 0 by the client */ 270 }; 271 272 struct fw_init_set_ring_info_hdr { 273 uint32_t resrvd; /* Reserved field and must be set to 0 by the client */ 274 uint16_t init_ring_tbl_sz; /* Init time information to state size of the ring table */ 275 uint8_t init_trgt_id; /* Init time target AE id described in the request */ 276 uint8_t init_cmd_id; /* Init time command that is described in the request */ 277 }; 278 279 struct fw_init_set_ring_info { 280 uint64_t init_ring_table_ptr; /* Pointer to weighting information for 128 rings */ 281 uint64_t resrvd; /* Reserved field and must be set to 0 by the client */ 282 }; 283 284 struct fw_init_trng_hdr { 285 uint32_t resrvd; /* Reserved field and must be set to 0 by the client */ 286 union { 287 uint8_t resrvd; /* Reserved field set to if cmd type is trng disable */ 288 uint8_t init_trng_cfg_sz; /* Size of the trng config word in QW*/ 289 } u; 290 uint8_t resrvd1; /* Reserved field and must be set to 0 by the client */ 291 uint8_t init_trgt_id; /* Init time target AE id described in the request */ 292 uint8_t init_cmd_id; /* Init time command that is described in the request */ 293 }; 294 295 struct fw_init_trng { 296 union { 297 uint64_t resrvd; /* Reserved field set to 0 if cmd type is trng disable */ 298 uint64_t init_trng_cfg_ptr; /* Pointer to TRNG Slice config word*/ 299 } u; 300 uint64_t resrvd; /* Reserved field and must be set to 0 by the client */ 301 }; 302 303 struct fw_init_req { 304 struct fw_comn_req_hdr comn_hdr; /* Common request header */ 305 union { 306 struct fw_init_set_ae_info_hdr set_ae_info; 307 /* INIT SET_AE_INFO request header structure */ 308 struct fw_init_set_ring_info_hdr set_ring_info; 309 /* INIT SET_RING_INFO request header structure */ 310 struct fw_init_trng_hdr init_trng; 311 /* INIT TRNG ENABLE/DISABLE request header structure */ 312 } u; 313 struct fw_comn_req_mid comn_mid; /* Common request middle section */ 314 union { 315 struct fw_init_set_ae_info set_ae_info; 316 /* INIT SET_AE_INFO request data structure */ 317 struct fw_init_set_ring_info set_ring_info; 318 /* INIT SET_RING_INFO request data structure */ 319 struct fw_init_trng init_trng; 320 /* INIT TRNG ENABLE/DISABLE request data structure */ 321 } u1; 322 }; 323 324 enum fw_init_cmd_id { 325 FW_INIT_CMD_SET_AE_INFO, /* Setup AE Info command type */ 326 FW_INIT_CMD_SET_RING_INFO, /* Setup Ring Info command type */ 327 FW_INIT_CMD_TRNG_ENABLE, /* TRNG Enable command type */ 328 FW_INIT_CMD_TRNG_DISABLE, /* TRNG Disable command type */ 329 FW_INIT_CMD_DELIMITER /* Delimiter type */ 330 }; 331 332 struct fw_init_resp { 333 struct fw_comn_resp_hdr comn_resp; /* Common interface response */ 334 uint8_t resrvd[64 - sizeof(struct fw_comn_resp_hdr)]; 335 /* XXX FW_RESP_DEFAULT_SZ_HW15 */ 336 /* Reserved padding out to the default response size */ 337 }; 338 339 /* -------------------------------------------------------------------------- */ 340 /* look aside */ 341 342 #define COMN_REQ_ORD UINT16_C(0x8000) 343 #define COMN_REQ_ORD_SHIFT 15 344 #define COMN_REQ_ORD_NONE (0 << COMN_REQ_ORD_SHIFT) 345 #define COMN_REQ_ORD_STRICT (1 << COMN_REQ_ORD_SHIFT) 346 #define COMN_REQ_PTR_TYPE UINT16_C(0x4000) 347 #define COMN_REQ_PTR_TYPE_SHIFT 14 348 #define COMN_REQ_PTR_TYPE_FLAT (0 << COMN_REQ_PTR_TYPE_SHIFT) 349 #define COMN_REQ_PTR_TYPE_SGL (1 << COMN_REQ_PTR_TYPE_SHIFT) 350 #define COMN_REQ_RESERVED UINT16_C(0x2000) 351 #define COMN_REQ_SHRAM_INIT UINT16_C(0x1000) 352 #define COMN_REQ_SHRAM_INIT_SHIFT 12 353 #define COMN_REQ_SHRAM_INIT_REQUIRED (1 << COMN_REQ_SHRAM_INIT_SHIFT) 354 #define COMN_REQ_REGEX_SLICE UINT16_C(0x0800) 355 #define COMN_REQ_REGEX_SLICE_SHIFT 11 356 #define COMN_REQ_REGEX_SLICE_REQUIRED (1 << COMN_REQ_REGEX_SLICE_SHIFT) 357 #define COMN_REQ_XLAT_SLICE UINT16_C(0x0400) 358 #define COMN_REQ_XLAT_SLICE_SHIFT 10 359 #define COMN_REQ_XLAT_SLICE_REQUIRED (1 << COMN_REQ_XLAT_SLICE_SHIFT) 360 #define COMN_REQ_CPR_SLICE UINT16_C(0x0200) 361 #define COMN_REQ_CPR_SLICE_SHIFT 9 362 #define COMN_REQ_CPR_SLICE_REQUIRED (1 << COMN_REQ_CPR_SLICE_SHIFT) 363 #define COMN_REQ_BULK_SLICE UINT16_C(0x0100) 364 #define COMN_REQ_BULK_SLICE_SHIFT 8 365 #define COMN_REQ_BULK_SLICE_REQUIRED (1 << COMN_REQ_BULK_SLICE_SHIFT) 366 #define COMN_REQ_STORAGE_SLICE UINT16_C(0x0080) 367 #define COMN_REQ_STORAGE_SLICE_SHIFT 7 368 #define COMN_REQ_STORAGE_SLICE_REQUIRED (1 << COMN_REQ_STORAGE_SLICE_SHIFT) 369 #define COMN_REQ_RND_SLICE UINT16_C(0x0040) 370 #define COMN_REQ_RND_SLICE_SHIFT 6 371 #define COMN_REQ_RND_SLICE_REQUIRED (1 << COMN_REQ_RND_SLICE_SHIFT) 372 #define COMN_REQ_PKE1_SLICE UINT16_C(0x0020) 373 #define COMN_REQ_PKE1_SLICE_SHIFT 5 374 #define COMN_REQ_PKE1_SLICE_REQUIRED (1 << COMN_REQ_PKE1_SLICE_SHIFT) 375 #define COMN_REQ_PKE0_SLICE UINT16_C(0x0010) 376 #define COMN_REQ_PKE0_SLICE_SHIFT 4 377 #define COMN_REQ_PKE0_SLICE_REQUIRED (1 << COMN_REQ_PKE0_SLICE_SHIFT) 378 #define COMN_REQ_AUTH1_SLICE UINT16_C(0x0008) 379 #define COMN_REQ_AUTH1_SLICE_SHIFT 3 380 #define COMN_REQ_AUTH1_SLICE_REQUIRED (1 << COMN_REQ_AUTH1_SLICE_SHIFT) 381 #define COMN_REQ_AUTH0_SLICE UINT16_C(0x0004) 382 #define COMN_REQ_AUTH0_SLICE_SHIFT 2 383 #define COMN_REQ_AUTH0_SLICE_REQUIRED (1 << COMN_REQ_AUTH0_SLICE_SHIFT) 384 #define COMN_REQ_CIPHER1_SLICE UINT16_C(0x0002) 385 #define COMN_REQ_CIPHER1_SLICE_SHIFT 1 386 #define COMN_REQ_CIPHER1_SLICE_REQUIRED (1 << COMN_REQ_CIPHER1_SLICE_SHIFT) 387 #define COMN_REQ_CIPHER0_SLICE UINT16_C(0x0001) 388 #define COMN_REQ_CIPHER0_SLICE_SHIFT 0 389 #define COMN_REQ_CIPHER0_SLICE_REQUIRED (1 << COMN_REQ_CIPHER0_SLICE_SHIFT) 390 391 #define COMN_REQ_CY0_ONLY(shram) \ 392 COMN_REQ_ORD_STRICT | \ 393 COMN_REQ_PTR_TYPE_FLAT | \ 394 (shram) | \ 395 COMN_REQ_RND_SLICE_REQUIRED | \ 396 COMN_REQ_PKE0_SLICE_REQUIRED | \ 397 COMN_REQ_AUTH0_SLICE_REQUIRED | \ 398 COMN_REQ_CIPHER0_SLICE_REQUIRED; 399 #define COMN_REQ_CY1_ONLY(shram) \ 400 COMN_REQ_ORD_STRICT | \ 401 COMN_REQ_PTR_TYPE_FLAT | \ 402 (shram) | \ 403 COMN_REQ_PKE1_SLICE_REQUIRED | \ 404 COMN_REQ_AUTH1_SLICE_REQUIRED | \ 405 COMN_REQ_CIPHER1_SLICE_REQUIRED; 406 407 #define COMN_RESP_CRYPTO_STATUS __BIT(7) 408 #define COMN_RESP_PKE_STATUS __BIT(6) 409 #define COMN_RESP_CMP_STATUS __BIT(5) 410 #define COMN_RESP_XLAT_STATUS __BIT(4) 411 #define COMN_RESP_PM_STATUS __BIT(3) 412 #define COMN_RESP_INIT_ADMIN_STATUS __BIT(2) 413 414 #define COMN_STATUS_FLAG_OK 0 415 #define COMN_STATUS_FLAG_ERROR 1 416 417 struct fw_la_ssl_tls_common { 418 uint8_t out_len; /* Number of bytes of key material to output. */ 419 uint8_t label_len; /* Number of bytes of label for SSL and bytes 420 * for TLS key generation */ 421 }; 422 423 struct fw_la_mgf_common { 424 uint8_t hash_len; 425 /* Number of bytes of hash output by the QAT per iteration */ 426 uint8_t seed_len; 427 /* Number of bytes of seed provided in src buffer for MGF1 */ 428 }; 429 430 struct fw_cipher_hdr { 431 uint8_t state_sz; 432 /* State size in quad words of the cipher algorithm used in this session. 433 * Set to zero if the algorithm doesnt provide any state */ 434 uint8_t offset; 435 /* Quad word offset from the content descriptor parameters address i.e. 436 * (content_address + (cd_hdr_sz << 3)) to the parameters for the cipher 437 * processing */ 438 uint8_t curr_id; 439 /* Initialised with the cipher slice type */ 440 uint8_t next_id; 441 /* Set to the next slice to pass the ciphered data through. 442 * Set to ICP_QAT_FW_SLICE_DRAM_WR if the data is not to go through 443 * anymore slices after cipher */ 444 uint16_t resrvd; 445 /* Reserved padding byte to bring the struct to the word boundary. MUST be 446 * set to 0 */ 447 uint8_t state_padding_sz; 448 /* State padding size in quad words. Set to 0 if no padding is required. */ 449 uint8_t key_sz; 450 /* Key size in quad words of the cipher algorithm used in this session */ 451 }; 452 453 struct fw_auth_hdr { 454 uint8_t hash_flags; 455 /* General flags defining the processing to perform. 0 is normal processing 456 * and 1 means there is a nested hash processing loop to go through */ 457 uint8_t offset; 458 /* Quad word offset from the content descriptor parameters address to the 459 * parameters for the auth processing */ 460 uint8_t curr_id; 461 /* Initialised with the auth slice type */ 462 uint8_t next_id; 463 /* Set to the next slice to pass data through. 464 * Set to ICP_QAT_FW_SLICE_DRAM_WR if the data is not to go through 465 * anymore slices after auth */ 466 union { 467 uint8_t inner_prefix_sz; 468 /* Size in bytes of the inner prefix data */ 469 uint8_t aad_sz; 470 /* Size in bytes of padded AAD data to prefix to the packet for CCM 471 * or GCM processing */ 472 } u; 473 474 uint8_t outer_prefix_sz; 475 /* Size in bytes of outer prefix data */ 476 uint8_t final_sz; 477 /* Size in bytes of digest to be returned to the client if requested */ 478 uint8_t inner_res_sz; 479 /* Size in bytes of the digest from the inner hash algorithm */ 480 uint8_t resrvd; 481 /* This field is unused, assumed value is zero. */ 482 uint8_t inner_state1_sz; 483 /* Size in bytes of inner hash state1 data. Must be a qword multiple */ 484 uint8_t inner_state2_off; 485 /* Quad word offset from the content descriptor parameters pointer to the 486 * inner state2 value */ 487 uint8_t inner_state2_sz; 488 /* Size in bytes of inner hash state2 data. Must be a qword multiple */ 489 uint8_t outer_config_off; 490 /* Quad word offset from the content descriptor parameters pointer to the 491 * outer configuration information */ 492 uint8_t outer_state1_sz; 493 /* Size in bytes of the outer state1 value */ 494 uint8_t outer_res_sz; 495 /* Size in bytes of digest from the outer auth algorithm */ 496 uint8_t outer_prefix_off; 497 /* Quad word offset from the start of the inner prefix data to the outer 498 * prefix information. Should equal the rounded inner prefix size, converted 499 * to qwords */ 500 }; 501 502 #define FW_AUTH_HDR_FLAG_DO_NESTED 1 503 #define FW_AUTH_HDR_FLAG_NO_NESTED 0 504 505 struct fw_la_comn_req { 506 union { 507 uint16_t la_flags; 508 /* Definition of the common LA processing flags used for the 509 * bulk processing */ 510 union { 511 struct fw_la_ssl_tls_common ssl_tls_common; 512 /* For TLS or SSL Key Generation, this field is 513 * overloaded with ssl_tls common information */ 514 struct fw_la_mgf_common mgf_common; 515 /* For MGF Key Generation, this field is overloaded with 516 mgf information */ 517 } u; 518 } u; 519 520 union { 521 uint8_t resrvd; 522 /* If not useRd by a request this field must be set to 0 */ 523 uint8_t tls_seed_len; 524 /* Byte Len of tls seed */ 525 uint8_t req_params_blk_sz; 526 /* For bulk processing this field represents the request 527 * parameters block size */ 528 uint8_t trng_cfg_sz; 529 /* This field is used for TRNG_ENABLE requests to indicate the 530 * size of the TRNG Slice configuration word. Size is in QW's */ 531 } u1; 532 uint8_t la_cmd_id; 533 /* Definition of the LA command defined by this request */ 534 }; 535 536 #define LA_FLAGS_GCM_IV_LEN_FLAG __BIT(9) 537 #define LA_FLAGS_PROTO __BITS(8, 6) 538 #define LA_FLAGS_PROTO_SNOW_3G __SHIFTIN(4, LA_FLAGS_PROTO) 539 #define LA_FLAGS_PROTO_GCM __SHIFTIN(2, LA_FLAGS_PROTO) 540 #define LA_FLAGS_PROTO_CCM __SHIFTIN(1, LA_FLAGS_PROTO) 541 #define LA_FLAGS_PROTO_NO __SHIFTIN(0, LA_FLAGS_PROTO) 542 #define LA_FLAGS_DIGEST_IN_BUFFER __BIT(5) 543 #define LA_FLAGS_CMP_AUTH_RES __BIT(4) 544 #define LA_FLAGS_RET_AUTH_RES __BIT(3) 545 #define LA_FLAGS_UPDATE_STATE __BIT(2) 546 #define LA_FLAGS_PARTIAL __BITS(1, 0) 547 548 struct fw_la_bulk_req { 549 struct fw_comn_req_hdr comn_hdr; 550 /* Common request header */ 551 uint32_t flow_id; 552 /* Field used by Firmware to limit the number of stateful requests 553 * for a session being processed at a given point of time */ 554 struct fw_la_comn_req comn_la_req; 555 /* Common LA request parameters */ 556 struct fw_comn_req_mid comn_mid; 557 /* Common request middle section */ 558 uint64_t req_params_addr; 559 /* Memory address of the request parameters */ 560 union fw_comn_req_ftr comn_ftr; 561 /* Common request footer */ 562 }; 563 564 struct fw_la_resp { 565 struct fw_comn_resp_hdr comn_resp; 566 uint8_t resrvd[64 - sizeof(struct fw_comn_resp_hdr)]; 567 /* FW_RESP_DEFAULT_SZ_HW15 */ 568 }; 569 570 struct fw_la_cipher_req_params { 571 uint8_t resrvd; 572 /* Reserved field and assumed set to 0 */ 573 uint8_t cipher_state_sz; 574 /* Number of quad words of state data for the cipher algorithm */ 575 uint8_t curr_id; 576 /* Initialised with the cipher slice type */ 577 uint8_t next_id; 578 /* Set to the next slice to pass the ciphered data through. 579 * Set to ICP_QAT_FW_SLICE_DRAM_WR if the data is not to go through 580 * anymore slices after cipher */ 581 uint16_t resrvd1; 582 /* Reserved field, should be set to zero*/ 583 uint8_t resrvd2; 584 /* Reserved field, should be set to zero*/ 585 uint8_t next_offset; 586 /* Offset in bytes to the next request parameter block */ 587 uint32_t cipher_off; 588 /* Byte offset from the start of packet to the cipher data region */ 589 uint32_t cipher_len; 590 /* Byte length of the cipher data region */ 591 uint64_t state_address; 592 /* Flat buffer address in memory of the cipher state information. Unused 593 * if the state size is 0 */ 594 }; 595 596 struct fw_la_auth_req_params { 597 uint8_t auth_res_sz; 598 /* Size in quad words of digest information to validate */ 599 uint8_t hash_state_sz; 600 /* Number of quad words of inner and outer hash prefix data to process */ 601 uint8_t curr_id; 602 /* Initialised with the auth slice type */ 603 uint8_t next_id; 604 /* Set to the next slice to pass the auth data through. 605 * Set to ICP_QAT_FW_SLICE_NULL for in-place auth-only requests 606 * Set to ICP_QAT_FW_SLICE_DRAM_WR for all other request types 607 * if the data is not to go through anymore slices after auth */ 608 union { 609 uint16_t resrvd; 610 /* Reserved field should be set to zero for bulk services */ 611 uint16_t tls_secret_len; 612 /* Length of Secret information for TLS. */ 613 } u; 614 uint8_t resrvd; 615 /* Reserved field, should be set to zero*/ 616 uint8_t next_offset; 617 /* offset in bytes to the next request parameter block */ 618 uint32_t auth_off; 619 /* Byte offset from the start of packet to the auth data region */ 620 uint32_t auth_len; 621 /* Byte length of the auth data region */ 622 union { 623 uint64_t prefix_addr; 624 /* Address of the prefix information */ 625 uint64_t aad_addr; 626 /* Address of the AAD info in DRAM. Used for the CCM and GCM 627 * protocols */ 628 } u1; 629 uint64_t auth_res_address; 630 /* Address of the auth result information to validate or the location to 631 * writeback the digest information to */ 632 }; 633 634 #endif 635